diff options
Diffstat (limited to 'src/mem')
| -rw-r--r-- | src/mem/slicc/ast/FuncCallExprAST.py | 4 | ||||
| -rw-r--r-- | src/mem/slicc/ast/InPortDeclAST.py | 17 |
2 files changed, 0 insertions, 21 deletions
diff --git a/src/mem/slicc/ast/FuncCallExprAST.py b/src/mem/slicc/ast/FuncCallExprAST.py index ff9ab6f3d..d1daf1f9f 100644 --- a/src/mem/slicc/ast/FuncCallExprAST.py +++ b/src/mem/slicc/ast/FuncCallExprAST.py @@ -160,10 +160,6 @@ if (!(${{cvec[0]}})) { #endif ''') - elif self.proc_name == "continueProcessing": - code("counter++;") - code("continue; // Check the first port again") - elif self.proc_name == "set_cache_entry": code("set_cache_entry(m_cache_entry_ptr, %s);" %(cvec[0])); elif self.proc_name == "unset_cache_entry": diff --git a/src/mem/slicc/ast/InPortDeclAST.py b/src/mem/slicc/ast/InPortDeclAST.py index 376315eed..c88d353d3 100644 --- a/src/mem/slicc/ast/InPortDeclAST.py +++ b/src/mem/slicc/ast/InPortDeclAST.py @@ -109,23 +109,6 @@ class InPortDeclAST(DeclAST): param_types.append(type) - # Add the doubleTrigger method - this hack supports tiggering - # two simulateous events - # - # The key is that the second transistion cannot fail because - # the first event cannot be undone therefore you must do some - # checks before calling double trigger to ensure that won't - # happen - func = Func(self.symtab, "doubleTrigger", self.location, void_type, - param_types, [], "", pairs) - symtab.newSymbol(func) - - # Add the continueProcessing method - this hack supports - # messages that don't trigger events - func = Func(self.symtab, "continueProcessing", self.location, - void_type, [], [], "", pairs) - symtab.newSymbol(func) - if self.statements is not None: rcode = self.slicc.codeFormatter() rcode.indent() |