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-rw-r--r--src/mem/RubyMemory.py4
-rw-r--r--src/mem/SConscript1
-rw-r--r--src/mem/ruby/config/MI_example-homogeneous.rb3
-rw-r--r--src/mem/ruby/system/System.hh5
-rw-r--r--src/mem/rubymem.cc214
-rw-r--r--src/mem/rubymem.hh24
6 files changed, 212 insertions, 39 deletions
diff --git a/src/mem/RubyMemory.py b/src/mem/RubyMemory.py
index fbbbeebe4..ddd97572c 100644
--- a/src/mem/RubyMemory.py
+++ b/src/mem/RubyMemory.py
@@ -42,4 +42,6 @@ class RubyMemory(PhysicalMemory):
debug = Param.Bool(False, "Use ruby debug")
debug_file = Param.String("ruby.debug",
"path to the Ruby debug output file (stdout if blank)")
-
+ num_dmas = Param.Int(0, "Number of DMA ports connected to the Ruby memory")
+ dma_port = VectorPort("Ruby_dma_ports")
+ pio_port = Port("Ruby_pio_port")
diff --git a/src/mem/SConscript b/src/mem/SConscript
index 21335a709..2188850e0 100644
--- a/src/mem/SConscript
+++ b/src/mem/SConscript
@@ -63,3 +63,4 @@ TraceFlag('BusBridge')
TraceFlag('LLSC')
TraceFlag('MMU')
TraceFlag('MemoryAccess')
+TraceFlag('Ruby')
diff --git a/src/mem/ruby/config/MI_example-homogeneous.rb b/src/mem/ruby/config/MI_example-homogeneous.rb
index 2b416e647..b7842aaaf 100644
--- a/src/mem/ruby/config/MI_example-homogeneous.rb
+++ b/src/mem/ruby/config/MI_example-homogeneous.rb
@@ -37,6 +37,9 @@ for i in 0..$*.size-1 do
elsif $*[i] == "-s"
memory_size_mb = $*[i+1].to_i
i = i + 1
+ elsif $*[i] == "-D"
+ num_dma = $*[i+1].to_i
+ i = i + 1
end
end
diff --git a/src/mem/ruby/system/System.hh b/src/mem/ruby/system/System.hh
index 38ef09177..1d36de878 100644
--- a/src/mem/ruby/system/System.hh
+++ b/src/mem/ruby/system/System.hh
@@ -107,7 +107,10 @@ public:
if (m_ports.count(name) != 1){
cerr << "Port " << name << " has " << m_ports.count(name) << " instances" << endl;
}
- assert(m_ports.count(name) == 1); m_ports[name]->registerHitCallback(hit_callback); return m_ports[name]; }
+ assert(m_ports.count(name) == 1);
+ m_ports[name]->registerHitCallback(hit_callback);
+ return m_ports[name];
+ }
static Network* getNetwork() { assert(m_network_ptr != NULL); return m_network_ptr; }
static Topology* getTopology(const string & name) { assert(m_topologies.count(name) == 1); return m_topologies[name]; }
static CacheMemory* getCache(const string & name) { assert(m_caches.count(name) == 1); return m_caches[name]; }
diff --git a/src/mem/rubymem.cc b/src/mem/rubymem.cc
index 14b2048a0..70077e7da 100644
--- a/src/mem/rubymem.cc
+++ b/src/mem/rubymem.cc
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2001-2005 The Regents of The University of Michigan
+ * Copyright (c) 2009 Advanced Micro Devices, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -26,6 +27,7 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Daniel Sanchez
+ * Brad Beckmann
*/
#include <iostream>
@@ -63,6 +65,7 @@ RubyMemory::RubyMemory(const Params *p)
char buffer[65536];
config.getline(buffer, sizeof(buffer));
string line = buffer;
+ DPRINTF(Ruby, "%s %d\n", line, line.empty());
if (line.empty())
continue;
vector<string> tokens;
@@ -81,11 +84,27 @@ RubyMemory::RubyMemory(const Params *p)
RubySystem::create(sys_conf);
+ //
+ // Create the necessary ruby_ports to connect to the sequencers.
+ // This code should be fixed when the configuration systems are unified
+ // and the ruby configuration text files no longer exist. Also,
+ // it would be great to remove the single ruby_hit_callback func with
+ // separate pointers to particular ports to rubymem. However, functional
+ // access currently prevent the improvement.
+ //
for (int i = 0; i < params()->num_cpus; i++) {
RubyPort *p = RubySystem::getPort(csprintf("Sequencer_%d", i),
ruby_hit_callback);
ruby_ports.push_back(p);
}
+
+ for (int i = 0; i < params()->num_dmas; i++) {
+ RubyPort *p = RubySystem::getPort(csprintf("DMASequencer_%d", i),
+ ruby_hit_callback);
+ ruby_dma_ports.push_back(p);
+ }
+
+ pio_port = NULL;
}
void
@@ -106,7 +125,6 @@ RubyMemory::init()
//g_debug_ptr->setDebugTime(1);
//g_debug_ptr->setDebugOutputFile("ruby.debug");
-
g_system_ptr->clearStats();
if (ports.size() == 0) {
@@ -118,6 +136,15 @@ RubyMemory::init()
(*pi)->sendStatusChange(Port::RangeChange);
}
+ for (PortIterator pi = dma_ports.begin(); pi != dma_ports.end(); ++pi) {
+ if (*pi)
+ (*pi)->sendStatusChange(Port::RangeChange);
+ }
+
+ if (pio_port != NULL) {
+ pio_port->sendStatusChange(Port::RangeChange);
+ }
+
//Print stats at exit
rubyExitCB = new RubyExitCallback(this);
registerExitCallback(rubyExitCB);
@@ -141,35 +168,45 @@ RubyMemory::~RubyMemory()
delete g_system_ptr;
}
-void
-RubyMemory::hitCallback(PacketPtr pkt, Port *port)
-{
- DPRINTF(MemoryAccess, "Hit callback\n");
-
- bool needsResponse = pkt->needsResponse();
- doAtomicAccess(pkt);
-
- // turn packet around to go back to requester if response expected
- if (needsResponse) {
- // recvAtomic() should already have turned packet into
- // atomic response
- assert(pkt->isResponse());
- DPRINTF(MemoryAccess, "Sending packet back over port\n");
- port->sendTiming(pkt);
- } else {
- delete pkt;
- }
- DPRINTF(MemoryAccess, "Hit callback done!\n");
-}
-
Port *
RubyMemory::getPort(const std::string &if_name, int idx)
{
+ DPRINTF(Ruby, "getting port %d %s\n", idx, if_name);
+ DPRINTF(Ruby,
+ "number of ruby ports %d and dma ports %d\n",
+ ruby_ports.size(),
+ ruby_dma_ports.size());
+
// Accept request for "functional" port for backwards compatibility
// with places where this function is called from C++. I'd prefer
// to move all these into Python someday.
if (if_name == "functional") {
- return new Port(csprintf("%s-functional", name()), this);
+ return new Port(csprintf("%s-functional", name()),
+ this,
+ ruby_ports[idx]);
+ }
+
+ //
+ // if dma port request, allocate the appropriate prot
+ //
+ if (if_name == "dma_port") {
+ assert(idx < ruby_dma_ports.size());
+ RubyMemory::Port* dma_port =
+ new Port(csprintf("%s-dma_port%d", name(), idx),
+ this,
+ ruby_dma_ports[idx]);
+ dma_ports.push_back(dma_port);
+ return dma_port;
+ }
+
+ //
+ // if pio port, ensure that there is only one
+ //
+ if (if_name == "pio_port") {
+ assert(pio_port == NULL);
+ pio_port =
+ new RubyMemory::Port("ruby_pio_port", this, NULL);
+ return pio_port;
}
if (if_name != "port") {
@@ -184,30 +221,68 @@ RubyMemory::getPort(const std::string &if_name, int idx)
panic("RubyMemory::getPort: port %d already assigned", idx);
}
- Port *port = new Port(csprintf("%s-port%d", name(), idx), this);
+ //
+ // Currently this code assumes that each cpu has both a
+ // icache and dcache port and therefore divides by two. This will be
+ // fixed once we unify the configuration systems and Ruby sequencers
+ // directly support M5 ports.
+ //
+ assert(idx/2 < ruby_ports.size());
+ Port *port = new Port(csprintf("%s-port%d", name(), idx),
+ this,
+ ruby_ports[idx/2]);
ports[idx] = port;
return port;
}
-RubyMemory::Port::Port(const std::string &_name, RubyMemory *_memory)
+RubyMemory::Port::Port(const std::string &_name,
+ RubyMemory *_memory,
+ RubyPort *_port)
: PhysicalMemory::MemoryPort::MemoryPort(_name, _memory)
{
+ DPRINTF(Ruby, "creating port to ruby memory %s\n", _name);
ruby_mem = _memory;
+ ruby_port = _port;
}
bool
RubyMemory::Port::recvTiming(PacketPtr pkt)
{
- DPRINTF(MemoryAccess, "Timing access caught\n");
+ DPRINTF(MemoryAccess,
+ "Timing access caught for address %#x\n",
+ pkt->getAddr());
//dsm: based on SimpleTimingPort::recvTiming(pkt);
- // If the device is only a slave, it should only be sending
- // responses, which should never get nacked. There used to be
- // code to hanldle nacks here, but I'm pretty sure it didn't work
- // correctly with the drain code, so that would need to be fixed
- // if we ever added it back.
+ //
+ // In FS mode, ruby memory will receive pio responses from devices and
+ // it must forward these responses back to the particular CPU.
+ //
+ if (pkt->isResponse() != false && isPioAddress(pkt->getAddr()) != false) {
+ DPRINTF(MemoryAccess,
+ "Pio Response callback %#x\n",
+ pkt->getAddr());
+ RubyMemory::SenderState *senderState =
+ safe_cast<RubyMemory::SenderState *>(pkt->senderState);
+ RubyMemory::Port *port = senderState->port;
+
+ // pop the sender state from the packet
+ pkt->senderState = senderState->saved;
+ delete senderState;
+
+ port->sendTiming(pkt);
+
+ return true;
+ }
+
+ //
+ // After checking for pio responses, the remainder of packets
+ // received by ruby should only be M5 requests, which should never
+ // get nacked. There used to be code to hanldle nacks here, but
+ // I'm pretty sure it didn't work correctly with the drain code,
+ // so that would need to be fixed if we ever added it back.
+ //
assert(pkt->isRequest());
if (pkt->memInhibitAsserted()) {
@@ -221,6 +296,18 @@ RubyMemory::Port::recvTiming(PacketPtr pkt)
// Save the port in the sender state object
pkt->senderState = new SenderState(this, pkt->senderState);
+ //
+ // Check for pio requests and directly send them to the dedicated
+ // pio_port.
+ //
+ if (isPioAddress(pkt->getAddr()) != false) {
+ return ruby_mem->pio_port->sendTiming(pkt);
+ }
+
+ //
+ // For DMA and CPU requests, translate them to ruby requests before
+ // sending them to our assigned ruby port.
+ //
RubyRequestType type = RubyRequestType_NULL;
Addr pc = 0;
if (pkt->isRead()) {
@@ -241,7 +328,6 @@ RubyMemory::Port::recvTiming(PacketPtr pkt)
RubyAccessMode_Supervisor);
// Submit the ruby request
- RubyPort *ruby_port = ruby_mem->ruby_ports[pkt->req->contextId()];
int64_t req_id = ruby_port->makeRequest(ruby_request);
if (req_id == -1) {
RubyMemory::SenderState *senderState =
@@ -262,6 +348,12 @@ RubyMemory::Port::recvTiming(PacketPtr pkt)
void
ruby_hit_callback(int64_t req_id)
{
+ //
+ // Note: This single fuction can be called by cpu and dma ports,
+ // as well as the functional port. The functional port prevents
+ // us from replacing this single function with separate port
+ // functions.
+ //
typedef map<int64_t, PacketPtr> map_t;
map_t &prm = RubyMemory::pending_requests;
@@ -280,13 +372,58 @@ ruby_hit_callback(int64_t req_id)
pkt->senderState = senderState->saved;
delete senderState;
- port->ruby_mem->hitCallback(pkt, port);
+ port->hitCallback(pkt);
}
void
+RubyMemory::Port::hitCallback(PacketPtr pkt)
+{
+
+ bool needsResponse = pkt->needsResponse();
+
+ DPRINTF(MemoryAccess, "Hit callback needs response %d\n",
+ needsResponse);
+
+ ruby_mem->doAtomicAccess(pkt);
+
+ // turn packet around to go back to requester if response expected
+ if (needsResponse) {
+ // recvAtomic() should already have turned packet into
+ // atomic response
+ assert(pkt->isResponse());
+ DPRINTF(MemoryAccess, "Sending packet back over port\n");
+ sendTiming(pkt);
+ } else {
+ delete pkt;
+ }
+ DPRINTF(MemoryAccess, "Hit callback done!\n");
+}
+
+bool
RubyMemory::Port::sendTiming(PacketPtr pkt)
{
schedSendTiming(pkt, curTick + 1); //minimum latency, must be > 0
+ return true;
+}
+
+bool
+RubyMemory::Port::isPioAddress(Addr addr)
+{
+ AddrRangeList pioAddrList;
+ bool snoop = false;
+ if (ruby_mem->pio_port == NULL) {
+ return false;
+ }
+
+ ruby_mem->pio_port->getPeerAddressRanges(pioAddrList, snoop);
+ for(AddrRangeIter iter = pioAddrList.begin(); iter != pioAddrList.end(); iter++) {
+ if (addr >= iter->start && addr <= iter->end) {
+ DPRINTF(MemoryAccess, "Pio request found in %#llx - %#llx range\n",
+ iter->start, iter->end);
+ return true;
+ }
+ }
+ return false;
}
void RubyMemory::printConfigStats()
@@ -313,6 +450,17 @@ void RubyMemory::printConfig(std::ostream & out) const {
//g_system_ptr->printConfig(out);
}
+void RubyMemory::serialize(ostream &os)
+{
+ PhysicalMemory::serialize(os);
+}
+
+void RubyMemory::unserialize(Checkpoint *cp, const string &section)
+{
+ DPRINTF(Config, "Ruby memory being restored\n");
+ reschedule(rubyTickEvent, curTick + ruby_clock + ruby_phase);
+ PhysicalMemory::unserialize(cp, section);
+}
//Python-interface code
RubyMemory *
diff --git a/src/mem/rubymem.hh b/src/mem/rubymem.hh
index 1bfb135e8..dd0a492f5 100644
--- a/src/mem/rubymem.hh
+++ b/src/mem/rubymem.hh
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2001-2005 The Regents of The University of Michigan
+ * Copyright (c) 2009 Advanced Micro Devices, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -39,6 +40,7 @@
#include "mem/physical.hh"
#include "mem/ruby/system/RubyPort.hh"
#include "params/RubyMemory.hh"
+#include "mem/port.hh"
class RubyExitCallback;
@@ -46,18 +48,26 @@ class RubyMemory : public PhysicalMemory
{
public:
std::vector<RubyPort *> ruby_ports;
+ std::vector<RubyPort *> ruby_dma_ports;
class Port : public MemoryPort
{
friend void ruby_hit_callback(int64_t req_id);
RubyMemory *ruby_mem;
+ RubyPort *ruby_port;
public:
- Port(const std::string &_name, RubyMemory *_memory);
- void sendTiming(PacketPtr pkt);
+ Port(const std::string &_name,
+ RubyMemory *_memory,
+ RubyPort *_port);
+ bool sendTiming(PacketPtr pkt);
+ void hitCallback(PacketPtr pkt);
protected:
virtual bool recvTiming(PacketPtr pkt);
+
+ private:
+ bool isPioAddress(Addr addr);
};
class RubyEvent : public Event
@@ -110,8 +120,6 @@ class RubyMemory : public PhysicalMemory
//options change & M5 determines the
//stats file to use
- void hitCallback(PacketPtr pkt, Port *port);
-
void printStats(std::ostream & out) const;
void clearStats();
void printConfig(std::ostream & out) const;
@@ -125,6 +133,14 @@ class RubyMemory : public PhysicalMemory
public:
static std::map<int64_t, PacketPtr> pending_requests;
+ RubyMemory::Port* pio_port;
+
+ protected:
+ std::vector<MemoryPort*> dma_ports;
+
+ public:
+ virtual void serialize(std::ostream &os);
+ virtual void unserialize(Checkpoint *cp, const std::string &section);
};
void ruby_hit_callback(int64_t);
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-23 14:30:02 +0000