summaryrefslogtreecommitdiff
path: root/src/python/m5/objects/BaseCPU.py
diff options
context:
space:
mode:
Diffstat (limited to 'src/python/m5/objects/BaseCPU.py')
-rw-r--r--src/python/m5/objects/BaseCPU.py4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/python/m5/objects/BaseCPU.py b/src/python/m5/objects/BaseCPU.py
index 41e90b12b..3dd0bda01 100644
--- a/src/python/m5/objects/BaseCPU.py
+++ b/src/python/m5/objects/BaseCPU.py
@@ -1,5 +1,7 @@
+from m5.SimObject import SimObject
+from m5.params import *
+from m5.proxy import *
from m5 import build_env
-from m5.config import *
from AlphaTLB import AlphaDTB, AlphaITB
from Bus import Bus