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-rw-r--r--src/python/m5/objects/BaseCPU.py6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/python/m5/objects/BaseCPU.py b/src/python/m5/objects/BaseCPU.py
index b6e05627d..36474a6a4 100644
--- a/src/python/m5/objects/BaseCPU.py
+++ b/src/python/m5/objects/BaseCPU.py
@@ -15,6 +15,12 @@ class BaseCPU(SimObject):
cpu_id = Param.Int("CPU identifier")
if build_env['FULL_SYSTEM']:
+ do_qiesce = Param.Bool(True, "enable quiesce instructions")
+ do_checkpoint_insts = Param.Bool(True,
+ "enable checkpoint pseudo instructions")
+ do_statistics_insts = Param.Bool(True,
+ "enable statistics pseudo instructions")
+
if build_env['TARGET_ISA'] == 'sparc':
dtb = Param.SparcDTB(SparcDTB(), "Data TLB")
itb = Param.SparcITB(SparcITB(), "Instruction TLB")