diff options
Diffstat (limited to 'src/python/m5/objects/O3CPU.py')
| -rw-r--r-- | src/python/m5/objects/O3CPU.py | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/python/m5/objects/O3CPU.py b/src/python/m5/objects/O3CPU.py index 41208929a..900bbf28c 100644 --- a/src/python/m5/objects/O3CPU.py +++ b/src/python/m5/objects/O3CPU.py @@ -22,6 +22,7 @@ class DerivO3CPU(BaseCPU): cachePorts = Param.Unsigned("Cache Ports") icache_port = Port("Instruction Port") dcache_port = Port("Data Port") + _mem_ports = ['icache_port', 'dcache_port'] decodeToFetchDelay = Param.Unsigned(1, "Decode to fetch delay") renameToFetchDelay = Param.Unsigned(1 ,"Rename to fetch delay") |