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-rw-r--r--src/python/m5/objects/O3CPU.py5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/python/m5/objects/O3CPU.py b/src/python/m5/objects/O3CPU.py
index 20eef383f..5fba4e96f 100644
--- a/src/python/m5/objects/O3CPU.py
+++ b/src/python/m5/objects/O3CPU.py
@@ -116,3 +116,8 @@ class DerivO3CPU(BaseCPU):
smtROBPolicy = Param.String("SMT ROB Sharing Policy")
smtROBThreshold = Param.String("SMT ROB Threshold Sharing Parameter")
smtCommitPolicy = Param.String("SMT Commit Policy")
+
+ def addPrivateSplitL1Caches(self, ic, dc):
+ BaseCPU.addPrivateSplitL1Caches(self, ic, dc)
+ self.icache.tgts_per_mshr = 20
+ self.dcache.tgts_per_mshr = 20