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-rw-r--r--src/python/m5/params.py12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/python/m5/params.py b/src/python/m5/params.py
index ac777fad2..ae2b74a23 100644
--- a/src/python/m5/params.py
+++ b/src/python/m5/params.py
@@ -386,7 +386,7 @@ class VectorParamDesc(ParamDesc):
code('%import "${{self.swig_module_name()}}.i"')
def swig_decl(self, code):
- code('%module(package="m5.internal") ${{self.swig_module_name()}}')
+ code('%module(package="_m5") ${{self.swig_module_name()}}')
code('%{')
self.ptype.cxx_predecls(code)
code('%}')
@@ -619,7 +619,7 @@ class Cycles(CheckedInt):
unsigned = True
def getValue(self):
- from m5.internal.core import Cycles
+ from _m5.core import Cycles
return Cycles(self.value)
@classmethod
@@ -828,7 +828,7 @@ class AddrRange(ParamValue):
def getValue(self):
# Go from the Python class to the wrapped C++ class generated
# by swig
- from m5.internal.range import AddrRange
+ from _m5.range import AddrRange
return AddrRange(long(self.start), long(self.end),
int(self.intlvHighBit), int(self.xorHighBit),
@@ -1378,7 +1378,7 @@ $wrapper $wrapper_name {
def swig_decl(cls, code):
name = cls.__name__
code('''\
-%module(package="m5.internal") enum_$name
+%module(package="_m5") enum_$name
%{
#include "enums/$name.hh"
@@ -1419,7 +1419,7 @@ class Enum(ParamValue):
@classmethod
def swig_predecls(cls, code):
- code('%import "python/m5/internal/enum_$0.i"', cls.__name__)
+ code('%import "python/_m5/enum_$0.i"', cls.__name__)
@classmethod
def cxx_ini_parse(cls, code, src, dest, ret):
@@ -1909,7 +1909,7 @@ class PortRef(object):
# Call C++ to create corresponding port connection between C++ objects
def ccConnect(self):
- from m5.internal.pyobject import connectPorts
+ from _m5.pyobject import connectPorts
if self.role == 'SLAVE':
# do nothing and let the master take care of it