diff options
Diffstat (limited to 'src/python/m5')
| -rw-r--r-- | src/python/m5/objects/Pci.py | 3 | ||||
| -rw-r--r-- | src/python/m5/objects/Tsunami.py | 6 |
2 files changed, 4 insertions, 5 deletions
diff --git a/src/python/m5/objects/Pci.py b/src/python/m5/objects/Pci.py index 55bf23534..9d40adbfe 100644 --- a/src/python/m5/objects/Pci.py +++ b/src/python/m5/objects/Pci.py @@ -57,6 +57,3 @@ class PciDevice(DmaDevice): pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks") configdata = Param.PciConfigData(Parent.any, "PCI Config data") config_latency = Param.Latency('20ns', "Config read or write latency") - -class PciFake(PciDevice): - type = 'PciFake' diff --git a/src/python/m5/objects/Tsunami.py b/src/python/m5/objects/Tsunami.py index 42bcab089..78ab65b31 100644 --- a/src/python/m5/objects/Tsunami.py +++ b/src/python/m5/objects/Tsunami.py @@ -14,9 +14,11 @@ class TsunamiCChip(BasicPioDevice): class IsaFake(BasicPioDevice): type = 'IsaFake' pio_size = Param.Addr(0x8, "Size of address range") + ret_data = Param.UInt8(0xFF, "Default data to return") + ret_bad_addr = Param.Bool(False, "Return pkt status bad address on access") -class BadAddr(BasicPioDevice): - type = 'BadAddr' +class BadAddr(IsaFake): + ret_bad_addr = Param.Bool(True, "Return pkt status bad address on access") class TsunamiIO(BasicPioDevice): type = 'TsunamiIO' |