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-rw-r--r--src/python/swig/pyobject.cc2
-rw-r--r--src/python/swig/pyobject.hh3
2 files changed, 4 insertions, 1 deletions
diff --git a/src/python/swig/pyobject.cc b/src/python/swig/pyobject.cc
index fc4435781..f534623f8 100644
--- a/src/python/swig/pyobject.cc
+++ b/src/python/swig/pyobject.cc
@@ -35,10 +35,10 @@
#include "base/inifile.hh"
#include "base/output.hh"
#include "dev/etherdevice.hh"
-#include "dev/etherint.hh"
#include "dev/etherobject.hh"
#include "mem/mem_object.hh"
#include "mem/port.hh"
+#include "python/swig/pyobject.hh"
#include "sim/full_system.hh"
#include "sim/sim_object.hh"
diff --git a/src/python/swig/pyobject.hh b/src/python/swig/pyobject.hh
index ab22df864..8debcc82c 100644
--- a/src/python/swig/pyobject.hh
+++ b/src/python/swig/pyobject.hh
@@ -31,12 +31,15 @@
#include <Python.h>
#include "base/types.hh"
+#include "dev/etherint.hh"
#include "sim/serialize.hh"
#include "sim/sim_object.hh"
extern "C" SimObject *convertSwigSimObjectPtr(PyObject *);
SimObject *resolveSimObject(const std::string &name);
+EtherInt * lookupEthPort(SimObject *so, const std::string &name, int i);
+
/**
* Connect the described MemObject ports. Called from Python via SWIG.
*/