diff options
Diffstat (limited to 'src/python')
| -rw-r--r-- | src/python/m5/objects/PhysicalMemory.py | 3 | ||||
| -rw-r--r-- | src/python/swig/pyobject.cc | 1 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/python/m5/objects/PhysicalMemory.py b/src/python/m5/objects/PhysicalMemory.py index c389e4a7f..83dbc7710 100644 --- a/src/python/m5/objects/PhysicalMemory.py +++ b/src/python/m5/objects/PhysicalMemory.py @@ -4,8 +4,7 @@ from MemObject import * class PhysicalMemory(MemObject): type = 'PhysicalMemory' - port = Port("the access port") - functional = Port("Functional Access Port") + port = VectorPort("the access port") range = Param.AddrRange(AddrRange('128MB'), "Device Address") file = Param.String('', "memory mapped file") latency = Param.Latency('1t', "latency of an access") diff --git a/src/python/swig/pyobject.cc b/src/python/swig/pyobject.cc index 11141fa84..2a5f2b9fb 100644 --- a/src/python/swig/pyobject.cc +++ b/src/python/swig/pyobject.cc @@ -62,6 +62,7 @@ lookupPort(SimObject *so, const std::string &name, int i) /** * Connect the described MemObject ports. Called from Python via SWIG. + * The indices i1 & i2 will be -1 for regular ports, >= 0 for vector ports. */ int connectPorts(SimObject *o1, const std::string &name1, int i1, |