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Diffstat (limited to 'src/sim/ClockedObject.py')
| -rw-r--r-- | src/sim/ClockedObject.py | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/sim/ClockedObject.py b/src/sim/ClockedObject.py index e393dc467..b933ea07a 100644 --- a/src/sim/ClockedObject.py +++ b/src/sim/ClockedObject.py @@ -66,9 +66,6 @@ class ClockedObject(SimObject): # parent's clock domain by default clk_domain = Param.ClockDomain(Parent.clk_domain, "Clock domain") - # Power model for this ClockedObject - power_model = Param.PowerModel(NULL, "Power model") - # Provide initial power state, should ideally get redefined in startup # routine default_p_state = Param.PwrState("UNDEFINED", "Default Power State") |