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-rw-r--r--src/sim/SConscript3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/sim/SConscript b/src/sim/SConscript
index 093130f24..7aa4702cd 100644
--- a/src/sim/SConscript
+++ b/src/sim/SConscript
@@ -34,6 +34,7 @@ SimObject('BaseTLB.py')
SimObject('ClockedObject.py')
SimObject('Root.py')
SimObject('InstTracer.py')
+SimObject('ClockDomain.py')
Source('arguments.cc')
Source('async.cc')
@@ -50,6 +51,7 @@ Source('sim_object.cc')
Source('simulate.cc')
Source('stat_control.cc')
Source('syscall_emul.cc')
+Source('clock_domain.cc')
if env['TARGET_ISA'] != 'no':
SimObject('Process.py')
@@ -81,3 +83,4 @@ DebugFlag('Thread')
DebugFlag('Timer')
DebugFlag('VtoPhys')
DebugFlag('WorkItems')
+DebugFlag('ClockDomain')