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-rw-r--r--src/sim/SConscript12
1 files changed, 5 insertions, 7 deletions
diff --git a/src/sim/SConscript b/src/sim/SConscript
index 041c3ac10..25b965d59 100644
--- a/src/sim/SConscript
+++ b/src/sim/SConscript
@@ -34,6 +34,7 @@ SimObject('BaseTLB.py')
SimObject('Root.py')
SimObject('InstTracer.py')
+Source('arguments.cc')
Source('async.cc')
Source('core.cc')
Source('debug.cc')
@@ -46,21 +47,18 @@ Source('sim_events.cc')
Source('sim_object.cc')
Source('simulate.cc')
Source('stat_control.cc')
+Source('syscall_emul.cc')
if env['TARGET_ISA'] != 'no':
+ SimObject('Process.py')
SimObject('System.py')
Source('faults.cc')
+ Source('process.cc')
Source('pseudo_inst.cc')
Source('system.cc')
-if env['FULL_SYSTEM']:
- Source('arguments.cc')
-elif env['TARGET_ISA'] != 'no':
+if env['TARGET_ISA'] != 'no':
Source('tlb.cc')
- SimObject('Process.py')
-
- Source('process.cc')
- Source('syscall_emul.cc')
DebugFlag('Checkpoint')
DebugFlag('Config')