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Diffstat (limited to 'src/sim/System.py')
| -rw-r--r-- | src/sim/System.py | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/sim/System.py b/src/sim/System.py index 2cc171881..302e2fa60 100644 --- a/src/sim/System.py +++ b/src/sim/System.py @@ -63,6 +63,8 @@ class System(MemObject): # I/O bridge or cache mem_ranges = VectorParam.AddrRange([], "Ranges that constitute main memory") + cache_line_size = Param.Unsigned(64, "Cache line size in bytes") + work_item_id = Param.Int(-1, "specific work item id") num_work_ids = Param.Int(16, "Number of distinct work item types") work_begin_cpu_id_exit = Param.Int(-1, |