diff options
Diffstat (limited to 'src/sim/System.py')
| -rw-r--r-- | src/sim/System.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/sim/System.py b/src/sim/System.py index c012cb256..9928887b9 100644 --- a/src/sim/System.py +++ b/src/sim/System.py @@ -51,7 +51,7 @@ from m5.objects.SimpleMemory import * class MemoryMode(Enum): vals = ['invalid', 'atomic', 'timing', 'atomic_noncaching'] -class System(MemObject): +class System(SimObject): type = 'System' cxx_header = "sim/system.hh" system_port = MasterPort("System port") |