summaryrefslogtreecommitdiff
path: root/src/sim/clock_domain.cc
diff options
context:
space:
mode:
Diffstat (limited to 'src/sim/clock_domain.cc')
-rw-r--r--src/sim/clock_domain.cc7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/sim/clock_domain.cc b/src/sim/clock_domain.cc
index 60c688b1a..1ccee7f1d 100644
--- a/src/sim/clock_domain.cc
+++ b/src/sim/clock_domain.cc
@@ -147,6 +147,11 @@ SrcClockDomain::perfLevel(PerfLevel perf_level)
_perfLevel = perf_level;
+ signalPerfLevelUpdate();
+}
+
+void SrcClockDomain::signalPerfLevelUpdate()
+{
// Signal the voltage domain that we have changed our perf level so that the
// voltage domain can recompute its performance level
voltageDomain()->sanitiseVoltages();
@@ -174,7 +179,7 @@ SrcClockDomain::startup()
{
// Perform proper clock update when all related components have been
// created (i.e. after unserialization / object creation)
- perfLevel(_perfLevel);
+ signalPerfLevelUpdate();
}
SrcClockDomain *