diff options
Diffstat (limited to 'src/sim/clock_domain.hh')
-rw-r--r-- | src/sim/clock_domain.hh | 91 |
1 files changed, 87 insertions, 4 deletions
diff --git a/src/sim/clock_domain.hh b/src/sim/clock_domain.hh index b597b6611..946e5bd27 100644 --- a/src/sim/clock_domain.hh +++ b/src/sim/clock_domain.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013 ARM Limited + * Copyright (c) 2013-2014 ARM Limited * Copyright (c) 2013 Cornell University * All rights reserved * @@ -38,6 +38,7 @@ * Authors: Vasileios Spiliopoulos * Akash Bagdia * Christopher Torng + * Stephan Diestelhorst */ /** @@ -119,7 +120,7 @@ class ClockDomain : public SimObject * * @return Clock period in ticks */ - inline Tick clockPeriod() const { return _clockPeriod; } + Tick clockPeriod() const { return _clockPeriod; } /** * Register a ClockedObject to this ClockDomain. @@ -146,7 +147,7 @@ class ClockDomain : public SimObject * * @return Voltage applied to the clock domain */ - inline double voltage() const; + double voltage() const; /** * Add a derived domain. @@ -161,7 +162,11 @@ class ClockDomain : public SimObject /** * The source clock domains provides the notion of a clock domain that is * connected to a tunable clock source. It maintains the clock period and - * provides methods for setting/getting the clock. + * provides methods for setting/getting the clock and configuration parameters + * for clock domain that handler is going to manage. This includes frequency + * values at various performance levels, domain id, and current performance + * level. Note that a performance level as requested by the software corresponds + * to one of the frequency operational points the domain can operate at. */ class SrcClockDomain : public ClockDomain { @@ -179,6 +184,84 @@ class SrcClockDomain : public ClockDomain // Explicitly import the otherwise hidden clockPeriod using ClockDomain::clockPeriod; + + typedef int32_t DomainID; + static const DomainID emptyDomainID = -1; + + /** + * @return the domainID of the domain + */ + uint32_t domainID() const { return _domainID; } + + typedef uint32_t PerfLevel; + /** + * Checks whether the performance level requested exists in the current + * domain configuration + * + * @param the target performance level of the domain + * + * @return validity status of the given performance level + */ + bool validPerfLevel(PerfLevel perf_level) const { + return perf_level < numPerfLevels(); + } + + /** + * Sets the current performance level of the domain + * + * @param perf_level the target performance level + */ + void perfLevel(PerfLevel perf_level); + + /** + * @return the current performance level of the domain + */ + PerfLevel perfLevel() const { return _perfLevel; } + + /** + * Get the number of available performance levels for this clock domain. + * + * @return Number of perf levels configured for this domain. + */ + PerfLevel numPerfLevels() const {return freqOpPoints.size();} + + /** + * @returns the clock period (expressed in ticks) for the current + * performance level + */ + Tick clkPeriodAtPerfLevel() const { return freqOpPoints[perfLevel()]; } + + Tick clkPeriodAtPerfLevel(PerfLevel perf_level) const + { + assert(validPerfLevel(perf_level)); + return freqOpPoints[perf_level]; + } + + void serialize(std::ostream &os); + void unserialize(Checkpoint *cp, const std::string §ion); + + private: + /** + * List of possible frequency operational points, should be in + * descending order + * An empty list corresponds to default frequency specified for its + * clock domain, overall implying NO DVFS + */ + const std::vector<Tick> freqOpPoints; + + /** + * Software recognizable id number for the domain, should be unique for + * each domain + */ + const uint32_t _domainID; + + /** + * Current performance level the domain is set to. + * The performance level corresponds to one selected frequency (and related + * voltage) from the supplied list of frequencies, with perfLevel = 0 being + * the fastest performance state. + */ + PerfLevel _perfLevel; }; /** |