3 files changed, 8 insertions, 1 deletions
diff --git a/src/sim/Process.py b/src/sim/Process.py
index 55ccc50d0..6f2322805 100644
--- a/src/sim/Process.py
+++ b/src/sim/Process.py
@@ -38,6 +38,8 @@ class Process(SimObject):
     output = Param.String('cout', 'filename for stdout')
     errout = Param.String('cerr', 'filename for stderr')
     system = Param.System(Parent.any, "system process will run on")
+    useArchPT = Param.Bool('false', 'maintain an in-memory version of the page\
+                            table in an architecture-specific format')
     max_stack_size = Param.MemorySize('64MB', 'maximum size of the stack')
 
     @classmethod
diff --git a/src/sim/process.cc b/src/sim/process.cc
index d9f9a0fe6..a738908e1 100644
--- a/src/sim/process.cc
+++ b/src/sim/process.cc
@@ -106,7 +106,10 @@ Process::Process(ProcessParams * params)
     : SimObject(params), system(params->system),
       max_stack_size(params->max_stack_size),
       M5_pid(system->allocatePID()),
-      pTable(new FuncPageTable(name(), M5_pid)),
+      useArchPT(params->useArchPT),
+      pTable(useArchPT ?
+        static_cast<PageTableBase *>(new ArchPageTable(name(), M5_pid, system)) :
+        static_cast<PageTableBase *>(new FuncPageTable(name(), M5_pid)) ),
       initVirtMem(system->getSystemPort(), this,
                   SETranslatingPortProxy::Always)
 {
diff --git a/src/sim/process.hh b/src/sim/process.hh
index 361e07bca..03380acf7 100644
--- a/src/sim/process.hh
+++ b/src/sim/process.hh
@@ -125,6 +125,8 @@ class Process : public SimObject
     //separated.
     uint64_t M5_pid;
 
+    // flag for using architecture specific page table
+    bool useArchPT;
     PageTableBase* pTable;
 
     class FdMap