diff options
Diffstat (limited to 'src/sim')
| -rw-r--r-- | src/sim/SConscript | 1 | ||||
| -rw-r--r-- | src/sim/process.cc | 1 | ||||
| -rw-r--r-- | src/sim/process.hh | 4 | ||||
| -rw-r--r-- | src/sim/system.cc | 1 | ||||
| -rw-r--r-- | src/sim/system.hh | 9 | ||||
| -rw-r--r-- | src/sim/tlb.cc | 54 | ||||
| -rw-r--r-- | src/sim/tlb.hh | 66 |
7 files changed, 136 insertions, 0 deletions
diff --git a/src/sim/SConscript b/src/sim/SConscript index bfa0c9a0c..1753b33c0 100644 --- a/src/sim/SConscript +++ b/src/sim/SConscript @@ -48,6 +48,7 @@ Source('simulate.cc') Source('startup.cc') Source('stat_control.cc') Source('system.cc') +Source('tlb.cc') if env['FULL_SYSTEM']: Source('arguments.cc') diff --git a/src/sim/process.cc b/src/sim/process.cc index 7343039df..1e6395d55 100644 --- a/src/sim/process.cc +++ b/src/sim/process.cc @@ -90,6 +90,7 @@ Process::Process(const string &nm, int stderr_fd) : SimObject(nm), system(_system) { + M5_pid = system->allocatePID(); // initialize first 3 fds (stdin, stdout, stderr) fd_map[STDIN_FILENO] = stdin_fd; fd_map[STDOUT_FILENO] = stdout_fd; diff --git a/src/sim/process.hh b/src/sim/process.hh index 8c702da60..83c00a676 100644 --- a/src/sim/process.hh +++ b/src/sim/process.hh @@ -137,6 +137,10 @@ class Process : public SimObject public: PageTable *pTable; + //This id is assigned by m5 and is used to keep process' tlb entries + //separated. + uint64_t M5_pid; + private: // file descriptor remapping support static const int MAX_FD = 256; // max legal fd value diff --git a/src/sim/system.cc b/src/sim/system.cc index eb0655aa5..512d4bdb5 100644 --- a/src/sim/system.cc +++ b/src/sim/system.cc @@ -64,6 +64,7 @@ System::System(Params *p) virtPort(p->name + "-vport"), #else page_ptr(0), + next_PID(0), #endif memoryMode(p->mem_mode), _params(p) { diff --git a/src/sim/system.hh b/src/sim/system.hh index 197d9027b..cdd5bebb0 100644 --- a/src/sim/system.hh +++ b/src/sim/system.hh @@ -125,6 +125,15 @@ class System : public SimObject int page_ptr; + protected: + uint64_t next_PID; + + public: + uint64_t allocatePID() + { + return next_PID++; + } + #endif // FULL_SYSTEM diff --git a/src/sim/tlb.cc b/src/sim/tlb.cc new file mode 100644 index 000000000..9c3166280 --- /dev/null +++ b/src/sim/tlb.cc @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2001-2005 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Gabe Black + */ + +#include "cpu/thread_context.hh" +#include "mem/page_table.hh" +#include "sim/process.hh" +#include "sim/tlb.hh" + +Fault +GenericITB::translate(RequestPtr &req, ThreadContext *tc) +{ +#if FULL_SYSTEM + panic("Generic ITB translation shouldn't be used in full system mode.\n"); +#else + return tc->getProcessPtr()->pTable->translate(req); +#endif +} + +Fault +GenericDTB::translate(RequestPtr &req, ThreadContext *tc, bool write) +{ +#if FULL_SYSTEM + panic("Generic DTB translation shouldn't be used in full system mode.\n"); +#else + return tc->getProcessPtr()->pTable->translate(req); +#endif +}; diff --git a/src/sim/tlb.hh b/src/sim/tlb.hh new file mode 100644 index 000000000..8e291ecc9 --- /dev/null +++ b/src/sim/tlb.hh @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2006 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Gabe Black + */ + +#ifndef __SIM_TLB_HH__ +#define __SIM_TLB_HH__ + +#include "mem/request.hh" +#include "sim/sim_object.hh" +#include "sim/faults.hh" + +class ThreadContext; +class Packet; + +class GenericTLB : public SimObject +{ + public: + GenericTLB(const std::string &name) : SimObject(name) + {} +}; + +class GenericITB : public GenericTLB +{ + public: + GenericITB(const std::string &name) : GenericTLB(name) + {} + + Fault translate(RequestPtr &req, ThreadContext *tc); +}; + +class GenericDTB : public GenericTLB +{ + public: + GenericDTB(const std::string &name) : GenericTLB(name) + {} + + Fault translate(RequestPtr &req, ThreadContext *tc, bool write); +}; + +#endif // __ARCH_SPARC_TLB_HH__ |