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-rw-r--r--src/sim/pseudo_inst.cc12
-rw-r--r--src/sim/pseudo_inst.hh1
2 files changed, 13 insertions, 0 deletions
diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc
index 92886dacb..53892b5d1 100644
--- a/src/sim/pseudo_inst.cc
+++ b/src/sim/pseudo_inst.cc
@@ -586,6 +586,18 @@ switchcpu(ThreadContext *tc)
exitSimLoop("switchcpu");
}
+/*
+ * This function is executed when the simulation is executing the syscall
+ * handler in System Emulation mode.
+ */
+void
+m5Syscall(ThreadContext *tc)
+{
+ DPRINTF(PseudoInst, "PseudoInst::m5Syscall()\n");
+ Fault fault;
+ tc->syscall(&fault);
+}
+
void
togglesync(ThreadContext *tc)
{
diff --git a/src/sim/pseudo_inst.hh b/src/sim/pseudo_inst.hh
index d9b981f94..977ed1d39 100644
--- a/src/sim/pseudo_inst.hh
+++ b/src/sim/pseudo_inst.hh
@@ -88,6 +88,7 @@ void debugbreak(ThreadContext *tc);
void switchcpu(ThreadContext *tc);
void workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid);
void workend(ThreadContext *tc, uint64_t workid, uint64_t threadid);
+void m5Syscall(ThreadContext *tc);
void togglesync(ThreadContext *tc);
} // namespace PseudoInst