diff options
Diffstat (limited to 'src/systemc/dt/bit')
| -rw-r--r-- | src/systemc/dt/bit/SConscript | 34 | ||||
| -rw-r--r-- | src/systemc/dt/bit/sc_bit.cc | 127 | ||||
| -rw-r--r-- | src/systemc/dt/bit/sc_bv_base.cc | 231 | ||||
| -rw-r--r-- | src/systemc/dt/bit/sc_logic.cc | 166 | ||||
| -rw-r--r-- | src/systemc/dt/bit/sc_lv_base.cc | 180 |
5 files changed, 738 insertions, 0 deletions
diff --git a/src/systemc/dt/bit/SConscript b/src/systemc/dt/bit/SConscript new file mode 100644 index 000000000..ed6eb35a0 --- /dev/null +++ b/src/systemc/dt/bit/SConscript @@ -0,0 +1,34 @@ +# Copyright 2018 Google, Inc. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Gabe Black + +Import('*') + +if env['USE_SYSTEMC']: + Source('sc_bit.cc') + Source('sc_bv_base.cc') + Source('sc_logic.cc') + Source('sc_lv_base.cc') diff --git a/src/systemc/dt/bit/sc_bit.cc b/src/systemc/dt/bit/sc_bit.cc new file mode 100644 index 000000000..7300b0d0b --- /dev/null +++ b/src/systemc/dt/bit/sc_bit.cc @@ -0,0 +1,127 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sc_bit.cpp -- Bit class. + + Original Author: Gene Bushuyev, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +// $Log: sc_bit.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:20:04 acg +// SystemC 2.3 +// +// Revision 1.6 2006/04/12 20:17:52 acg +// Andy Goodrich: enabled deprecation message for sc_bit. +// +// Revision 1.5 2006/01/25 00:31:15 acg +// Andy Goodrich: Changed over to use a standard message id of +// SC_ID_IEEE_1666_DEPRECATION for all deprecation messages. +// +// Revision 1.4 2006/01/24 20:50:55 acg +// Andy Goodrich: added warnings indicating that sc_bit is deprecated and that +// the C bool data type should be used in its place. +// +// Revision 1.3 2006/01/13 18:53:53 acg +// Andy Goodrich: added $Log command so that CVS comments are reproduced in +// the source. +// + +#include <sstream> + +#include "systemc/ext/dt/bit/sc_bit.hh" +#include "systemc/ext/dt/bit/sc_logic.hh" +#include "systemc/ext/utils/sc_report_handler.hh" + +namespace sc_dt +{ + +// ---------------------------------------------------------------------------- +// CLASS : sc_bit +// +// Bit class. +// Note: VSIA compatibility indicated. +// ---------------------------------------------------------------------------- + +// support methods +void +sc_bit::invalid_value(char c) +{ + std::stringstream msg; + msg << "sc_bit('" << c << "')"; + SC_REPORT_ERROR("value is not valid", msg.str().c_str()); + sc_core::sc_abort(); // can't recover from here +} + +void +sc_bit::invalid_value(int i) +{ + std::stringstream msg; + msg << "sc_bit(" << i << ")"; + SC_REPORT_ERROR("value is not valid", msg.str().c_str()); + sc_core::sc_abort(); // can't recover from here +} + +// constructors +sc_bit::sc_bit(const sc_logic &a) : m_val(a.to_bool()) // non-VSIA +{ + sc_deprecated_sc_bit(); +} + +// assignment operators +sc_bit & +sc_bit::operator = (const sc_logic &b) // non-VSIA +{ + return (*this = sc_bit(b)); +} + +// other methods +void +sc_bit::scan(::std::istream &is) +{ + bool b; + is >> b; + *this = b; +} + +void +sc_deprecated_sc_bit() +{ + static bool warn_sc_bit_deprecated = true; + if (warn_sc_bit_deprecated) { + warn_sc_bit_deprecated = false; + SC_REPORT_INFO("/IEEE_Std_1666/deprecated", + "sc_bit is deprecated, use bool instead"); + } +} + +} // namespace sc_dt diff --git a/src/systemc/dt/bit/sc_bv_base.cc b/src/systemc/dt/bit/sc_bv_base.cc new file mode 100644 index 000000000..84265af8d --- /dev/null +++ b/src/systemc/dt/bit/sc_bv_base.cc @@ -0,0 +1,231 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sc_bv_base.cpp -- Arbitrary size bit vector class. + + Original Author: Gene Bushuyev, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +// $Log: sc_bv_base.cpp,v $ +// Revision 1.2 2011/08/24 22:05:40 acg +// Torsten Maehne: initialization changes to remove warnings. +// +// Revision 1.1.1.1 2006/12/15 20:20:04 acg +// SystemC 2.3 +// +// Revision 1.4 2006/04/11 23:12:26 acg +// Andy Goodrich: Fixed bug in parsing of extended string constants like +// 0bus1110011. +// +// Revision 1.3 2006/01/13 18:53:53 acg +// Andy Goodrich: added $Log command so that CVS comments are reproduced in +// the source. +// + +#include <cstring> +#include <sstream> + +#include "systemc/ext/dt/bit/sc_bv_base.hh" +#include "systemc/ext/dt/fx/sc_fix.hh" +#include "systemc/ext/dt/fx/sc_ufix.hh" +#include "systemc/ext/utils/sc_report.hh" + +namespace sc_dt +{ + +// ---------------------------------------------------------------------------- +// CLASS : sc_bv_base +// +// Arbitrary size bit vector base class. +// ---------------------------------------------------------------------------- + +void +sc_bv_base::init(int length_, bool init_value) +{ + // check the length + if (length_ <= 0) { + SC_REPORT_ERROR("zero length", 0); + sc_core::sc_abort(); // can't recover from here + } + // allocate memory for the data and control words + m_len = length_; + m_size = (m_len - 1) / SC_DIGIT_SIZE + 1; + m_data = new sc_digit[m_size]; + // initialize the bits to 'init_value' + sc_digit dw = init_value ? ~SC_DIGIT_ZERO : SC_DIGIT_ZERO; + int sz = m_size; + for (int i = 0; i < sz; ++i) { + m_data[i] = dw; + } + clean_tail(); +} + +void +sc_bv_base::assign_from_string(const std::string &s) +{ + // s must have been converted to bin + int len = m_len; + int s_len = s.length() - 1; + int min_len = sc_min(len, s_len); + int i = 0; + for (; i < min_len; ++i) { + char c = s[s_len - i - 1]; + if (c != '0' && c != '1') { + SC_REPORT_ERROR("cannot perform conversion", + "string can contain only '0' and '1' characters"); + // may continue, if suppressed + c = '0'; + } + set_bit(i, sc_logic_value_t(c - '0')); + } + // if formatted, fill the rest with sign(s), otherwise fill with zeros + sc_logic_value_t fill = (s[s_len] == 'F' ? sc_logic_value_t(s[0] - '0') + : sc_logic_value_t(0)); + for (; i < len; ++i) { + set_bit(i, fill); + } +} + +// constructors +sc_bv_base::sc_bv_base(const char *a) : m_len(0), m_size(0), m_data(0) +{ + std::string s = convert_to_bin(a); + init(s.length() - 1); + assign_from_string(s); +} + +sc_bv_base::sc_bv_base(const char *a, int length_) : + m_len(0), m_size(0), m_data(0) +{ + init(length_); + assign_from_string(convert_to_bin(a)); +} + +sc_bv_base::sc_bv_base(const sc_bv_base &a) : + sc_proxy<sc_bv_base>(), m_len(a.m_len), m_size(a.m_size), + m_data(new sc_digit[m_size]) +{ + // copy the bits + int sz = m_size; + for (int i = 0; i < sz; ++i) { + m_data[i] = a.m_data[i]; + } +} + +// assignment operators +sc_bv_base & +sc_bv_base::operator = (const char *a) +{ + assign_from_string(convert_to_bin(a)); + return *this; +} + + +// ---------------------------------------------------------------------------- +// convert formatted string to binary string + +const std::string +convert_to_bin(const char *s) +{ + // Beware: logic character strings cannot start with '0x' or '0X', + // because this is seen as a hexadecimal encoding prefix! + + if (s == 0) { + SC_REPORT_ERROR("cannot perform conversion", + "character string is zero"); + return std::string(); + } + if (*s == 0) { + SC_REPORT_ERROR("cannot perform conversion", + "character string is empty"); + return std::string(); + } + + int n = strlen(s); + int i = 0; + if (s[0] == '-' || s[0] == '+') { + ++i; + } + if (n > (i + 2) && s[i] == '0') { + if (s[i + 1] == 'b' || s[i + 1] == 'B') { + if (s[i + 2] == '0' || s[i + 2] == '1') { + std::string str(&s[2]); + str += "F"; + return str; + } + } + if (s[i + 1] == 'b' || s[i + 1] == 'B' || + s[i + 1] == 'c' || s[i + 1] == 'C' || + s[i + 1] == 'd' || s[i + 1] == 'D' || + s[i + 1] == 'o' || s[i + 1] == 'O' || + s[i + 1] == 'x' || s[i + 1] == 'X') { + try { + // worst case length = n * 4 + sc_fix a(s, n * 4, n * 4, SC_TRN, SC_WRAP, 0, SC_ON); + std::string str = a.to_bin(); + str += "F"; // mark the string as formatted + // get rid of prefix (0b) and redundant leading bits + const char *p = str.c_str() + 2; + while (p[1] && p[0] == p[1]) { + ++p; + } + return std::string(p); + } catch (const sc_core::sc_report &) { + std::stringstream msg; + msg << "character string '" << s << "' is not valid"; + SC_REPORT_ERROR("cannot perform conversion", + msg.str().c_str()); + return std::string(); + } + } + } + + // bin by default + std::string str(s); + str += "U"; // mark the string as unformatted + return str; +} + +// convert binary string to formatted string +const std::string +convert_to_fmt(const std::string &s, sc_numrep numrep, bool w_prefix) +{ + int n = s.length(); + std::string str("0bus"); + // str += "0bus"; + str += s; + sc_ufix a(str.c_str(), n, n, SC_TRN, SC_WRAP, 0, SC_ON); + return a.to_string(numrep, w_prefix); +} + +} // namespace sc_dt diff --git a/src/systemc/dt/bit/sc_logic.cc b/src/systemc/dt/bit/sc_logic.cc new file mode 100644 index 000000000..81663fcee --- /dev/null +++ b/src/systemc/dt/bit/sc_logic.cc @@ -0,0 +1,166 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sc_logic.cpp -- C++ implementation of logic type. Behaves + pretty much the same way as HDLs logic type. + + Original Author: Stan Y. Liao, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +// $Log: sc_logic.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:20:04 acg +// SystemC 2.3 +// +// Revision 1.3 2006/01/13 18:53:53 acg +// Andy Goodrich: added $Log command so that CVS comments are reproduced in +// the source. +// + +#include <sstream> + +#include "systemc/ext/dt/bit/sc_logic.hh" +#include "systemc/ext/utils/sc_report_handler.hh" + +namespace sc_dt +{ + +// ---------------------------------------------------------------------------- +// CLASS : sc_logic +// +// Four-valued logic type. +// ---------------------------------------------------------------------------- + +// support methods +void +sc_logic::invalid_value(sc_logic_value_t v) +{ + invalid_value((int)v); +} + +void +sc_logic::invalid_value(char c) +{ + std::stringstream msg; + msg << "sc_logic('" << c << "')"; + SC_REPORT_ERROR("value is not valid", msg.str().c_str()); +} + +void +sc_logic::invalid_value(int i) +{ + std::stringstream msg; + msg << "sc_logic(" << i << ")"; + SC_REPORT_ERROR("value is not valid", msg.str().c_str()); +} + + +void +sc_logic::invalid_01() const +{ + if ((int)m_val == Log_Z) { + SC_REPORT_WARNING("sc_logic value 'Z' cannot be converted to bool", 0); + } else { + SC_REPORT_WARNING("sc_logic value 'X' cannot be converted to bool", 0); + } +} + + +// conversion tables +const sc_logic_value_t sc_logic::char_to_logic[128] = { + Log_0, Log_1, Log_Z, Log_X, Log_X, Log_X, Log_X, Log_X, + Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, + Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, + Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, + Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, + Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, + Log_0, Log_1, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, + Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, + Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, + Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, + Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, + Log_X, Log_X, Log_Z, Log_X, Log_X, Log_X, Log_X, Log_X, + Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, + Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, + Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, Log_X, + Log_X, Log_X, Log_Z, Log_X, Log_X, Log_X, Log_X, Log_X +}; + +const char sc_logic::logic_to_char[4] = { '0', '1', 'Z', 'X' }; + +const sc_logic_value_t sc_logic::and_table[4][4] = { + { Log_0, Log_0, Log_0, Log_0 }, + { Log_0, Log_1, Log_X, Log_X }, + { Log_0, Log_X, Log_X, Log_X }, + { Log_0, Log_X, Log_X, Log_X } +}; + +const sc_logic_value_t sc_logic::or_table[4][4] = { + { Log_0, Log_1, Log_X, Log_X }, + { Log_1, Log_1, Log_1, Log_1 }, + { Log_X, Log_1, Log_X, Log_X }, + { Log_X, Log_1, Log_X, Log_X } +}; + +const sc_logic_value_t sc_logic::xor_table[4][4] = { + { Log_0, Log_1, Log_X, Log_X }, + { Log_1, Log_0, Log_X, Log_X }, + { Log_X, Log_X, Log_X, Log_X }, + { Log_X, Log_X, Log_X, Log_X } +}; + +const sc_logic_value_t sc_logic::not_table[4] = { + Log_1, Log_0, Log_X, Log_X +}; + +// other methods +void +sc_logic::scan(::std::istream &is) +{ + char c; + is >> c; + *this = c; +} + +// #ifdef SC_DT_DEPRECATED +const sc_logic sc_logic_0(Log_0); +const sc_logic sc_logic_1(Log_1); +const sc_logic sc_logic_Z(Log_Z); +const sc_logic sc_logic_X(Log_X); +// #endif + +const sc_logic SC_LOGIC_0(Log_0); +const sc_logic SC_LOGIC_1(Log_1); +const sc_logic SC_LOGIC_Z(Log_Z); +const sc_logic SC_LOGIC_X(Log_X); + +} // namespace sc_dt diff --git a/src/systemc/dt/bit/sc_lv_base.cc b/src/systemc/dt/bit/sc_lv_base.cc new file mode 100644 index 000000000..9ffa50597 --- /dev/null +++ b/src/systemc/dt/bit/sc_lv_base.cc @@ -0,0 +1,180 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sc_lv_base.cpp -- Arbitrary size logic vector class. + + Original Author: Gene Bushuyev, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +// $Log: sc_lv_base.cpp,v $ +// Revision 1.2 2011/08/24 22:05:40 acg +// Torsten Maehne: initialization changes to remove warnings. +// +// Revision 1.1.1.1 2006/12/15 20:20:04 acg +// SystemC 2.3 +// +// Revision 1.3 2006/01/13 18:53:53 acg +// Andy Goodrich: added $Log command so that CVS comments are reproduced in +// the source. +// + +#include <sstream> + +#include "systemc/ext/dt/bit/sc_lv_base.hh" + +namespace sc_dt +{ + +// explicit template instantiations +template class sc_proxy<sc_lv_base>; +template class sc_proxy<sc_bv_base>; + +void +sc_proxy_out_of_bounds(const char *msg, int64 val) +{ + std::stringstream ss; + if (msg != NULL) + ss << msg; + if (val != 0) + ss << val; + SC_REPORT_ERROR("out of bounds", ss.str().c_str()); +} + +// ---------------------------------------------------------------------------- +// CLASS : sc_lv_base +// +// Arbitrary size logic vector base class. +// ---------------------------------------------------------------------------- + +static const sc_digit data_array[] = { + SC_DIGIT_ZERO, ~SC_DIGIT_ZERO, SC_DIGIT_ZERO, ~SC_DIGIT_ZERO +}; + +static const sc_digit ctrl_array[] = { + SC_DIGIT_ZERO, SC_DIGIT_ZERO, ~SC_DIGIT_ZERO, ~SC_DIGIT_ZERO +}; + +void +sc_lv_base::init(int length_, const sc_logic& init_value) +{ + // check the length + if (length_ <= 0) { + SC_REPORT_ERROR("zero length", 0); + sc_core::sc_abort(); // can't recover from here + } + // allocate memory for the data and control words + m_len = length_; + m_size = (m_len - 1) / SC_DIGIT_SIZE + 1; + m_data = new sc_digit[m_size * 2]; + m_ctrl = m_data + m_size; + // initialize the bits to 'init_value' + sc_digit dw = data_array[init_value.value()]; + sc_digit cw = ctrl_array[init_value.value()]; + int sz = m_size; + for (int i = 0; i < sz; ++i) { + m_data[i] = dw; + m_ctrl[i] = cw; + } + clean_tail(); +} + +void +sc_lv_base::assign_from_string(const std::string &s) +{ + // s must have been converted to bin + int len = m_len; + int s_len = s.length() - 1; + int min_len = sc_min(len, s_len); + int i = 0; + for (; i < min_len; ++i) { + char c = s[s_len - i - 1]; + set_bit(i, sc_logic::char_to_logic[(int)c]); + } + // if formatted, fill the rest with sign(s), otherwise fill with zeros + sc_logic_value_t fill = (s[s_len] == 'F' ? sc_logic_value_t(s[0] - '0') + : sc_logic_value_t(0)); + for (; i < len; ++i) { + set_bit(i, fill); + } +} + +// constructors +sc_lv_base::sc_lv_base(const char *a) : + m_len(0), m_size(0), m_data(0), m_ctrl(0) +{ + std::string s = convert_to_bin(a); + init(s.length() - 1); + assign_from_string(s); +} + +sc_lv_base::sc_lv_base(const char *a, int length_) : + m_len(0), m_size(0), m_data(0), m_ctrl(0) +{ + init(length_); + assign_from_string(convert_to_bin(a)); +} + +sc_lv_base::sc_lv_base(const sc_lv_base &a) : + sc_proxy<sc_lv_base>(), m_len(a.m_len), m_size(a.m_size), + m_data(new sc_digit[m_size * 2]), m_ctrl(m_data + m_size) +{ + // copy the bits + int sz = m_size; + for (int i = 0; i < sz; ++i) { + m_data[i] = a.m_data[i]; + m_ctrl[i] = a.m_ctrl[i]; + } +} + +// assignment operators +sc_lv_base & +sc_lv_base::operator = (const char *a) +{ + assign_from_string(convert_to_bin(a)); + return *this; +} + +// returns true if logic vector contains only 0's and 1's +bool +sc_lv_base::is_01() const +{ + int sz = m_size; + for (int i = 0; i < sz; ++i) { + if (m_ctrl[i] != 0) { + return false; + } + } + return true; +} + +} // namespace sc_dt |