summaryrefslogtreecommitdiff
path: root/src/systemc/tests/systemc/communication/ports
diff options
context:
space:
mode:
Diffstat (limited to 'src/systemc/tests/systemc/communication/ports')
-rw-r--r--src/systemc/tests/systemc/communication/ports/test01/golden/test01.log22
-rw-r--r--src/systemc/tests/systemc/communication/ports/test01/test01.cpp121
-rw-r--r--src/systemc/tests/systemc/communication/ports/test02/golden/test02.log2
-rw-r--r--src/systemc/tests/systemc/communication/ports/test02/test02.cpp93
-rw-r--r--src/systemc/tests/systemc/communication/ports/test03/golden/test03.log27
-rw-r--r--src/systemc/tests/systemc/communication/ports/test03/test03.cpp122
-rw-r--r--src/systemc/tests/systemc/communication/ports/test04/golden/test04.log13
-rw-r--r--src/systemc/tests/systemc/communication/ports/test04/test04.cpp152
-rw-r--r--src/systemc/tests/systemc/communication/ports/test05/golden/test05.log4
-rw-r--r--src/systemc/tests/systemc/communication/ports/test05/test05.cpp63
10 files changed, 619 insertions, 0 deletions
diff --git a/src/systemc/tests/systemc/communication/ports/test01/golden/test01.log b/src/systemc/tests/systemc/communication/ports/test01/golden/test01.log
new file mode 100644
index 000000000..dba01dd10
--- /dev/null
+++ b/src/systemc/tests/systemc/communication/ports/test01/golden/test01.log
@@ -0,0 +1,22 @@
+SystemC Simulation
+a.in_clk (sc_in)
+a.inout_clk (sc_inout)
+a.out_clk (sc_out)
+a.fifo_in (sc_fifo_in)
+a.fifo_out (sc_fifo_out)
+a.port (sc_port)
+a.in_int (sc_in)
+a.in_bool (sc_in)
+a.in_logic (sc_in)
+a.inout_int (sc_inout)
+a.inout_bool (sc_inout)
+a.inout_logic (sc_inout)
+a.out_int (sc_out)
+a.out_bool (sc_out)
+a.out_logic (sc_out)
+a.in_resolved (sc_in_resolved)
+a.inout_resolved (sc_inout_resolved)
+a.out_resolved (sc_out_resolved)
+a.in_rv (sc_in_rv)
+a.inout_rv (sc_inout_rv)
+a.out_rv (sc_out_rv)
diff --git a/src/systemc/tests/systemc/communication/ports/test01/test01.cpp b/src/systemc/tests/systemc/communication/ports/test01/test01.cpp
new file mode 100644
index 000000000..2b4c72cb0
--- /dev/null
+++ b/src/systemc/tests/systemc/communication/ports/test01/test01.cpp
@@ -0,0 +1,121 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ test01.cpp --
+
+ Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+// test of named ports
+
+#include "systemc.h"
+
+SC_MODULE( mod_a )
+{
+ sc_in_clk in_clk;
+ sc_inout_clk inout_clk;
+ sc_out_clk out_clk;
+
+ sc_fifo_in<int> fifo_in;
+ sc_fifo_out<int> fifo_out;
+
+ sc_port<sc_signal_in_if<float> > port;
+
+ sc_in<int> in_int;
+ sc_in<bool> in_bool;
+ sc_in<sc_logic> in_logic;
+ sc_inout<int> inout_int;
+ sc_inout<bool> inout_bool;
+ sc_inout<sc_logic> inout_logic;
+ sc_out<int> out_int;
+ sc_out<bool> out_bool;
+ sc_out<sc_logic> out_logic;
+
+ sc_in_resolved in_resolved;
+ sc_inout_resolved inout_resolved;
+ sc_out_resolved out_resolved;
+
+ sc_in_rv<1> in_rv;
+ sc_inout_rv<1> inout_rv;
+ sc_out_rv<1> out_rv;
+
+ SC_CTOR( mod_a )
+ : in_clk( "in_clk" ), inout_clk( "inout_clk" ), out_clk( "out_clk" ),
+ fifo_in( "fifo_in" ), fifo_out( "fifo_out" ),
+ port( "port" ),
+ in_int( "in_int" ), in_bool( "in_bool" ), in_logic( "in_logic" ),
+ inout_int( "inout_int" ), inout_bool( "inout_bool" ),
+ inout_logic( "inout_logic" ),
+ out_int( "out_int" ), out_bool( "out_bool" ), out_logic( "out_logic" ),
+ in_resolved( "in_resolved" ), inout_resolved( "inout_resolved" ),
+ out_resolved( "out_resolved" ),
+ in_rv( "in_rv" ), inout_rv( "inout_rv" ), out_rv( "out_rv" )
+ {}
+};
+
+#define WRITE(a) \
+ cout << a.name() << " (" << a.kind() << ")" << endl
+
+int
+sc_main( int, char*[] )
+{
+ mod_a a( "a" );
+
+ WRITE( a.in_clk );
+ WRITE( a.inout_clk );
+ WRITE( a.out_clk );
+
+ WRITE( a.fifo_in );
+ WRITE( a.fifo_out );
+
+ WRITE( a.port );
+
+ WRITE( a.in_int );
+ WRITE( a.in_bool );
+ WRITE( a.in_logic );
+ WRITE( a.inout_int );
+ WRITE( a.inout_bool );
+ WRITE( a.inout_logic );
+ WRITE( a.out_int );
+ WRITE( a.out_bool );
+ WRITE( a.out_logic );
+
+ WRITE( a.in_resolved );
+ WRITE( a.inout_resolved );
+ WRITE( a.out_resolved );
+
+ WRITE( a.in_rv );
+ WRITE( a.inout_rv );
+ WRITE( a.out_rv );
+
+ return 0;
+}
diff --git a/src/systemc/tests/systemc/communication/ports/test02/golden/test02.log b/src/systemc/tests/systemc/communication/ports/test02/golden/test02.log
new file mode 100644
index 000000000..171833b33
--- /dev/null
+++ b/src/systemc/tests/systemc/communication/ports/test02/golden/test02.log
@@ -0,0 +1,2 @@
+SystemC Simulation
+binding of models to parent model is completed
diff --git a/src/systemc/tests/systemc/communication/ports/test02/test02.cpp b/src/systemc/tests/systemc/communication/ports/test02/test02.cpp
new file mode 100644
index 000000000..9db0a12ad
--- /dev/null
+++ b/src/systemc/tests/systemc/communication/ports/test02/test02.cpp
@@ -0,0 +1,93 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ test02.cpp --
+
+ Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15
+ Martin Janssen, Synopsys, Inc., 2002-02-15
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+// test of ports binding in hierarchical model
+
+#include "systemc.h"
+
+SC_MODULE( mod_a )
+{
+
+ sc_in<int> in;
+ sc_out<int> out;
+
+ SC_CTOR( mod_a )
+ { }
+};
+
+SC_MODULE( mod_b )
+{
+
+ sc_in<int> in;
+ sc_out<int> out;
+
+ SC_CTOR( mod_b )
+ { }
+};
+
+// parent model
+SC_MODULE( mod_c )
+{
+
+ sc_in<int> input;
+ sc_out<int> output;
+ sc_signal<int> buf;
+ mod_a module_a;
+ mod_b module_b;
+
+ SC_CTOR( mod_c ):
+ module_a("module_a"),
+ module_b("module_b")
+ {
+
+ module_a.in(input);
+ module_a.out(buf);
+ module_b.in(buf);
+ module_b.out(output);
+
+ }
+};
+
+
+int
+sc_main( int, char*[] )
+{
+ mod_c c("c");
+ cout << "binding of models to parent model is completed\n";
+ return 0;
+}
diff --git a/src/systemc/tests/systemc/communication/ports/test03/golden/test03.log b/src/systemc/tests/systemc/communication/ports/test03/golden/test03.log
new file mode 100644
index 000000000..6ba7e2788
--- /dev/null
+++ b/src/systemc/tests/systemc/communication/ports/test03/golden/test03.log
@@ -0,0 +1,27 @@
+SystemC Simulation
+
+Info: (I804) /IEEE_Std_1666/deprecated: interface and/or port binding in port constructors is deprecated
+c.sig_1 (sc_signal)
+c.sig_2 (sc_signal)
+c.sig_3 (sc_signal)
+c.sig_4 (sc_signal)
+c.in_1 (sc_port)
+c.in_2 (sc_port)
+c.in_3 (sc_port)
+c.in_4 (sc_port)
+c.port_0 (sc_port)
+c.port_1 (sc_port)
+c.inout_1 (sc_port)
+c.inout_2 (sc_port)
+c.inout_3 (sc_port)
+c.inout_4 (sc_port)
+c.port_2 (sc_port)
+c.port_3 (sc_port)
+
+Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about
+ IEEE 1666 deprecated features by placing this method call
+ as the first statement in your sc_main() function:
+
+ sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated",
+ sc_core::SC_DO_NOTHING );
+
diff --git a/src/systemc/tests/systemc/communication/ports/test03/test03.cpp b/src/systemc/tests/systemc/communication/ports/test03/test03.cpp
new file mode 100644
index 000000000..b535b76af
--- /dev/null
+++ b/src/systemc/tests/systemc/communication/ports/test03/test03.cpp
@@ -0,0 +1,122 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ test03.cpp --
+
+ Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15
+ Martin Janssen, Synopsys, Inc., 2002-02-15
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+// test of sc_port constructors for sc_signal_in(inout)_if interface
+
+#include "systemc.h"
+
+
+SC_MODULE( mod_b )
+{
+
+ sc_port<sc_signal_in_if<bool>,1> input_1;
+ sc_port<sc_signal_in_if<sc_logic>,1> input_2;
+ sc_port<sc_signal_in_if<bool>,1> input_3;
+ sc_port<sc_signal_in_if<sc_logic>,1> input_4;
+ sc_port<sc_signal_inout_if<bool>,1> inout_1;
+ sc_port<sc_signal_inout_if<sc_logic>,1> inout_2;
+ sc_port<sc_signal_inout_if<bool>,1> inout_3;
+ sc_port<sc_signal_inout_if<sc_logic>,1> inout_4;
+
+
+ SC_CTOR( mod_b )
+ { }
+};
+
+SC_MODULE( mod_c )
+{
+ mod_b b;
+
+ sc_signal<bool> sig1;
+ sc_signal<bool> sig2;
+ sc_signal<sc_logic> sig3;
+ sc_signal<sc_logic> sig4;
+
+ sc_port<sc_signal_in_if<bool>,1> in1;
+ sc_port<sc_signal_in_if<sc_logic>,1> in2;
+ sc_port<sc_signal_inout_if<bool>,1> inout1;
+ sc_port<sc_signal_inout_if<sc_logic>,1> inout2;
+ sc_port<sc_signal_in_if<bool>,1> in3;
+ sc_port<sc_signal_in_if<sc_logic>,1> in4;
+ sc_port<sc_signal_inout_if<bool>,1> inout3;
+ sc_port<sc_signal_inout_if<sc_logic>,1> inout4;
+ sc_port<sc_signal_in_if<bool>,1> in5;
+ sc_port<sc_signal_in_if<sc_logic>,1> in6;
+ sc_port<sc_signal_inout_if<bool>,1> inout5;
+ sc_port<sc_signal_inout_if<sc_logic>,1> inout6;
+
+
+ SC_CTOR( mod_c )
+ : b("b"),
+ sig1("sig_1"),sig2("sig_2"), sig3("sig_3"), sig4("sig_4"),
+ in1( "in_1", sig1 ), in2( "in_2", sig3 ), inout1( "inout_1", sig2),
+ inout2( "inout_2", sig4),
+ in3("in_3", b.input_1), in4("in_4", b.input_2),
+ inout3("inout_3", b.inout_1), inout4("inout_4", b.inout_2),
+ in5(b.input_3), in6(b.input_4), inout5(b.inout_3),
+ inout6(b.inout_4)
+ {}
+};
+
+
+#define WRITE(a) \
+ cout << a.name() << " (" << a.kind() << ")" << endl
+
+
+int sc_main(int, char* []){
+
+ mod_c c("c");
+ WRITE(c.sig1);
+ WRITE(c.sig2);
+ WRITE(c.sig3);
+ WRITE(c.sig4);
+ WRITE(c.in1);
+ WRITE(c.in2);
+ WRITE(c.in3);
+ WRITE(c.in4);
+ WRITE(c.in5);
+ WRITE(c.in6);
+ WRITE(c.inout1);
+ WRITE(c.inout2);
+ WRITE(c.inout3);
+ WRITE(c.inout4);
+ WRITE(c.inout5);
+ WRITE(c.inout6);
+
+ return 0;
+}
diff --git a/src/systemc/tests/systemc/communication/ports/test04/golden/test04.log b/src/systemc/tests/systemc/communication/ports/test04/golden/test04.log
new file mode 100644
index 000000000..450dcf662
--- /dev/null
+++ b/src/systemc/tests/systemc/communication/ports/test04/golden/test04.log
@@ -0,0 +1,13 @@
+SystemC Simulation
+d.c.a.port_0 (sc_port)
+d.c.a.port_1 (sc_port)
+d.c.a.port_2 (sc_port)
+d.c.a.port_3 (sc_port)
+d.c.b.port_0 (sc_port)
+d.c.b.port_1 (sc_port)
+d.c.b.port_2 (sc_port)
+d.c.b.port_3 (sc_port)
+d.c.port_0 (sc_port)
+d.c.port_1 (sc_port)
+d.c.port_4 (sc_port)
+d.c.port_5 (sc_port)
diff --git a/src/systemc/tests/systemc/communication/ports/test04/test04.cpp b/src/systemc/tests/systemc/communication/ports/test04/test04.cpp
new file mode 100644
index 000000000..f3f383d8b
--- /dev/null
+++ b/src/systemc/tests/systemc/communication/ports/test04/test04.cpp
@@ -0,0 +1,152 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ test04.cpp --
+
+ Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15
+ Martin Janssen, Synopsys, Inc., 2002-02-15
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+//test of port connections
+
+#include "systemc.h"
+
+
+#define WRITE(a) \
+ cout << a.name() << " (" << a.kind() << ")" << endl
+
+
+SC_MODULE( mod_a)
+{
+ sc_port<sc_signal_in_if<bool>,2> in_1;
+ sc_port<sc_signal_in_if<sc_logic>,2> in_2;
+ sc_port<sc_signal_inout_if<bool>,2> inout_1;
+ sc_port<sc_signal_inout_if<sc_logic>,2> inout_2;
+
+ SC_CTOR( mod_a )
+ {
+ WRITE(in_1);
+ WRITE(in_2);
+ WRITE(inout_1);
+ WRITE(inout_2);
+ }
+};
+
+SC_MODULE( mod_b)
+{
+ sc_port<sc_signal_in_if<bool>,2> in_1;
+ sc_port<sc_signal_in_if<sc_logic>,2> in_2;
+ sc_port<sc_signal_inout_if<bool>,2> inout_1;
+ sc_port<sc_signal_inout_if<sc_logic>,2> inout_2;
+
+ SC_CTOR( mod_b )
+ {
+ WRITE(in_1);
+ WRITE(in_2);
+ WRITE(inout_1);
+ WRITE(inout_2);
+ }
+};
+
+SC_MODULE( mod_c )
+{
+ sc_port<sc_signal_in_if<bool>,0> input_1;
+ sc_port<sc_signal_in_if<bool>,3> input_2;
+ sc_port<sc_signal_in_if<sc_logic>,0> input_3;
+ sc_port<sc_signal_in_if<sc_logic>,3> input_4;
+ sc_port<sc_signal_inout_if<bool>,0> inout_1;
+ sc_port<sc_signal_inout_if<bool>,3> inout_2;
+ sc_port<sc_signal_inout_if<sc_logic>,0> inout_3;
+ sc_port<sc_signal_inout_if<sc_logic>,3> inout_4;
+ sc_signal<bool> sig_1;
+ sc_signal<bool> sig_2;
+ sc_signal<sc_logic> sig_3;
+ sc_signal<sc_logic> sig_4;
+
+ mod_a a;
+ mod_b b;
+
+ SC_CTOR( mod_c )
+ :a("a"), b("b")
+ {
+ a.in_1(input_2);
+ a.in_1(sig_1);
+ a.in_2(input_4);
+ a.in_2(sig_3);
+ a.inout_1(inout_2);
+ a.inout_1(sig_2);
+ a.inout_2(inout_4);
+ a.inout_2(sig_4);
+
+ b.in_1(input_1);
+ b.in_1(input_2);
+ b.in_2(input_3);
+ b.in_2(input_4);
+ b.inout_1(inout_1);
+ b.inout_1(inout_2);
+ b.inout_2(inout_3);
+ b.inout_2(inout_4);
+
+ WRITE(input_1);
+ WRITE(input_2);
+ WRITE(inout_1);
+ WRITE(inout_2);
+ }
+};
+
+SC_MODULE( mod_d )
+{
+ sc_port<sc_signal_in_if<bool>,1> input_1;
+ sc_port<sc_signal_in_if<sc_logic>,1> input_2;
+ sc_port<sc_signal_inout_if<bool>,1> inout_1;
+ sc_port<sc_signal_inout_if<sc_logic>,1> inout_2;
+
+ mod_c c;
+
+ SC_CTOR( mod_d )
+ : input_1("input_1"), input_2("input_2"),
+ inout_1("inout_1"), inout_2("inout_2"), c("c")
+ {
+ c.input_1(input_1);
+ c.input_3(input_2);
+ c.inout_1(inout_1);
+ c.inout_3(inout_2);
+ }
+};
+
+
+int sc_main(int, char* []){
+
+ mod_d d("d");
+
+ return 0;
+}
diff --git a/src/systemc/tests/systemc/communication/ports/test05/golden/test05.log b/src/systemc/tests/systemc/communication/ports/test05/golden/test05.log
new file mode 100644
index 000000000..3d204c99d
--- /dev/null
+++ b/src/systemc/tests/systemc/communication/ports/test05/golden/test05.log
@@ -0,0 +1,4 @@
+SystemC Simulation
+
+Error: (E107) bind interface to port failed: interface already bound to port: port 'tb.port_0' (sc_port)
+In file: <removed by verify.pl>
diff --git a/src/systemc/tests/systemc/communication/ports/test05/test05.cpp b/src/systemc/tests/systemc/communication/ports/test05/test05.cpp
new file mode 100644
index 000000000..a9e581f6a
--- /dev/null
+++ b/src/systemc/tests/systemc/communication/ports/test05/test05.cpp
@@ -0,0 +1,63 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ test05.cpp --
+
+ Original Author: Andy Goodrich, Forte Design Systems, 2005-09-12
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+// test of error detection: interface being supplied twice to a multi-port.
+
+#include "systemc.h"
+
+SC_MODULE(TB)
+{
+ SC_CTOR(TB)
+ {
+ m_port(m_signal);
+ m_multi_port(m_signal);
+ m_multi_port(m_port);
+ }
+ sc_port<sc_signal_inout_if<int>,0> m_multi_port;
+ sc_inout<int> m_port;
+ sc_signal<int> m_signal;
+};
+
+int sc_main(int, char**)
+{
+ sc_clock clock;
+ TB tb("tb");
+
+ sc_start(1, SC_NS);
+ return 0;
+}
+