diff options
Diffstat (limited to 'src/systemc/tests/systemc/communication')
186 files changed, 12608 insertions, 0 deletions
diff --git a/src/systemc/tests/systemc/communication/ports/test01/golden/test01.log b/src/systemc/tests/systemc/communication/ports/test01/golden/test01.log new file mode 100644 index 000000000..dba01dd10 --- /dev/null +++ b/src/systemc/tests/systemc/communication/ports/test01/golden/test01.log @@ -0,0 +1,22 @@ +SystemC Simulation +a.in_clk (sc_in) +a.inout_clk (sc_inout) +a.out_clk (sc_out) +a.fifo_in (sc_fifo_in) +a.fifo_out (sc_fifo_out) +a.port (sc_port) +a.in_int (sc_in) +a.in_bool (sc_in) +a.in_logic (sc_in) +a.inout_int (sc_inout) +a.inout_bool (sc_inout) +a.inout_logic (sc_inout) +a.out_int (sc_out) +a.out_bool (sc_out) +a.out_logic (sc_out) +a.in_resolved (sc_in_resolved) +a.inout_resolved (sc_inout_resolved) +a.out_resolved (sc_out_resolved) +a.in_rv (sc_in_rv) +a.inout_rv (sc_inout_rv) +a.out_rv (sc_out_rv) diff --git a/src/systemc/tests/systemc/communication/ports/test01/test01.cpp b/src/systemc/tests/systemc/communication/ports/test01/test01.cpp new file mode 100644 index 000000000..2b4c72cb0 --- /dev/null +++ b/src/systemc/tests/systemc/communication/ports/test01/test01.cpp @@ -0,0 +1,121 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of named ports + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk in_clk; + sc_inout_clk inout_clk; + sc_out_clk out_clk; + + sc_fifo_in<int> fifo_in; + sc_fifo_out<int> fifo_out; + + sc_port<sc_signal_in_if<float> > port; + + sc_in<int> in_int; + sc_in<bool> in_bool; + sc_in<sc_logic> in_logic; + sc_inout<int> inout_int; + sc_inout<bool> inout_bool; + sc_inout<sc_logic> inout_logic; + sc_out<int> out_int; + sc_out<bool> out_bool; + sc_out<sc_logic> out_logic; + + sc_in_resolved in_resolved; + sc_inout_resolved inout_resolved; + sc_out_resolved out_resolved; + + sc_in_rv<1> in_rv; + sc_inout_rv<1> inout_rv; + sc_out_rv<1> out_rv; + + SC_CTOR( mod_a ) + : in_clk( "in_clk" ), inout_clk( "inout_clk" ), out_clk( "out_clk" ), + fifo_in( "fifo_in" ), fifo_out( "fifo_out" ), + port( "port" ), + in_int( "in_int" ), in_bool( "in_bool" ), in_logic( "in_logic" ), + inout_int( "inout_int" ), inout_bool( "inout_bool" ), + inout_logic( "inout_logic" ), + out_int( "out_int" ), out_bool( "out_bool" ), out_logic( "out_logic" ), + in_resolved( "in_resolved" ), inout_resolved( "inout_resolved" ), + out_resolved( "out_resolved" ), + in_rv( "in_rv" ), inout_rv( "inout_rv" ), out_rv( "out_rv" ) + {} +}; + +#define WRITE(a) \ + cout << a.name() << " (" << a.kind() << ")" << endl + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + + WRITE( a.in_clk ); + WRITE( a.inout_clk ); + WRITE( a.out_clk ); + + WRITE( a.fifo_in ); + WRITE( a.fifo_out ); + + WRITE( a.port ); + + WRITE( a.in_int ); + WRITE( a.in_bool ); + WRITE( a.in_logic ); + WRITE( a.inout_int ); + WRITE( a.inout_bool ); + WRITE( a.inout_logic ); + WRITE( a.out_int ); + WRITE( a.out_bool ); + WRITE( a.out_logic ); + + WRITE( a.in_resolved ); + WRITE( a.inout_resolved ); + WRITE( a.out_resolved ); + + WRITE( a.in_rv ); + WRITE( a.inout_rv ); + WRITE( a.out_rv ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/ports/test02/golden/test02.log b/src/systemc/tests/systemc/communication/ports/test02/golden/test02.log new file mode 100644 index 000000000..171833b33 --- /dev/null +++ b/src/systemc/tests/systemc/communication/ports/test02/golden/test02.log @@ -0,0 +1,2 @@ +SystemC Simulation +binding of models to parent model is completed diff --git a/src/systemc/tests/systemc/communication/ports/test02/test02.cpp b/src/systemc/tests/systemc/communication/ports/test02/test02.cpp new file mode 100644 index 000000000..9db0a12ad --- /dev/null +++ b/src/systemc/tests/systemc/communication/ports/test02/test02.cpp @@ -0,0 +1,93 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of ports binding in hierarchical model + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + + sc_in<int> in; + sc_out<int> out; + + SC_CTOR( mod_a ) + { } +}; + +SC_MODULE( mod_b ) +{ + + sc_in<int> in; + sc_out<int> out; + + SC_CTOR( mod_b ) + { } +}; + +// parent model +SC_MODULE( mod_c ) +{ + + sc_in<int> input; + sc_out<int> output; + sc_signal<int> buf; + mod_a module_a; + mod_b module_b; + + SC_CTOR( mod_c ): + module_a("module_a"), + module_b("module_b") + { + + module_a.in(input); + module_a.out(buf); + module_b.in(buf); + module_b.out(output); + + } +}; + + +int +sc_main( int, char*[] ) +{ + mod_c c("c"); + cout << "binding of models to parent model is completed\n"; + return 0; +} diff --git a/src/systemc/tests/systemc/communication/ports/test03/golden/test03.log b/src/systemc/tests/systemc/communication/ports/test03/golden/test03.log new file mode 100644 index 000000000..6ba7e2788 --- /dev/null +++ b/src/systemc/tests/systemc/communication/ports/test03/golden/test03.log @@ -0,0 +1,27 @@ +SystemC Simulation + +Info: (I804) /IEEE_Std_1666/deprecated: interface and/or port binding in port constructors is deprecated +c.sig_1 (sc_signal) +c.sig_2 (sc_signal) +c.sig_3 (sc_signal) +c.sig_4 (sc_signal) +c.in_1 (sc_port) +c.in_2 (sc_port) +c.in_3 (sc_port) +c.in_4 (sc_port) +c.port_0 (sc_port) +c.port_1 (sc_port) +c.inout_1 (sc_port) +c.inout_2 (sc_port) +c.inout_3 (sc_port) +c.inout_4 (sc_port) +c.port_2 (sc_port) +c.port_3 (sc_port) + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/communication/ports/test03/test03.cpp b/src/systemc/tests/systemc/communication/ports/test03/test03.cpp new file mode 100644 index 000000000..b535b76af --- /dev/null +++ b/src/systemc/tests/systemc/communication/ports/test03/test03.cpp @@ -0,0 +1,122 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_port constructors for sc_signal_in(inout)_if interface + +#include "systemc.h" + + +SC_MODULE( mod_b ) +{ + + sc_port<sc_signal_in_if<bool>,1> input_1; + sc_port<sc_signal_in_if<sc_logic>,1> input_2; + sc_port<sc_signal_in_if<bool>,1> input_3; + sc_port<sc_signal_in_if<sc_logic>,1> input_4; + sc_port<sc_signal_inout_if<bool>,1> inout_1; + sc_port<sc_signal_inout_if<sc_logic>,1> inout_2; + sc_port<sc_signal_inout_if<bool>,1> inout_3; + sc_port<sc_signal_inout_if<sc_logic>,1> inout_4; + + + SC_CTOR( mod_b ) + { } +}; + +SC_MODULE( mod_c ) +{ + mod_b b; + + sc_signal<bool> sig1; + sc_signal<bool> sig2; + sc_signal<sc_logic> sig3; + sc_signal<sc_logic> sig4; + + sc_port<sc_signal_in_if<bool>,1> in1; + sc_port<sc_signal_in_if<sc_logic>,1> in2; + sc_port<sc_signal_inout_if<bool>,1> inout1; + sc_port<sc_signal_inout_if<sc_logic>,1> inout2; + sc_port<sc_signal_in_if<bool>,1> in3; + sc_port<sc_signal_in_if<sc_logic>,1> in4; + sc_port<sc_signal_inout_if<bool>,1> inout3; + sc_port<sc_signal_inout_if<sc_logic>,1> inout4; + sc_port<sc_signal_in_if<bool>,1> in5; + sc_port<sc_signal_in_if<sc_logic>,1> in6; + sc_port<sc_signal_inout_if<bool>,1> inout5; + sc_port<sc_signal_inout_if<sc_logic>,1> inout6; + + + SC_CTOR( mod_c ) + : b("b"), + sig1("sig_1"),sig2("sig_2"), sig3("sig_3"), sig4("sig_4"), + in1( "in_1", sig1 ), in2( "in_2", sig3 ), inout1( "inout_1", sig2), + inout2( "inout_2", sig4), + in3("in_3", b.input_1), in4("in_4", b.input_2), + inout3("inout_3", b.inout_1), inout4("inout_4", b.inout_2), + in5(b.input_3), in6(b.input_4), inout5(b.inout_3), + inout6(b.inout_4) + {} +}; + + +#define WRITE(a) \ + cout << a.name() << " (" << a.kind() << ")" << endl + + +int sc_main(int, char* []){ + + mod_c c("c"); + WRITE(c.sig1); + WRITE(c.sig2); + WRITE(c.sig3); + WRITE(c.sig4); + WRITE(c.in1); + WRITE(c.in2); + WRITE(c.in3); + WRITE(c.in4); + WRITE(c.in5); + WRITE(c.in6); + WRITE(c.inout1); + WRITE(c.inout2); + WRITE(c.inout3); + WRITE(c.inout4); + WRITE(c.inout5); + WRITE(c.inout6); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/ports/test04/golden/test04.log b/src/systemc/tests/systemc/communication/ports/test04/golden/test04.log new file mode 100644 index 000000000..450dcf662 --- /dev/null +++ b/src/systemc/tests/systemc/communication/ports/test04/golden/test04.log @@ -0,0 +1,13 @@ +SystemC Simulation +d.c.a.port_0 (sc_port) +d.c.a.port_1 (sc_port) +d.c.a.port_2 (sc_port) +d.c.a.port_3 (sc_port) +d.c.b.port_0 (sc_port) +d.c.b.port_1 (sc_port) +d.c.b.port_2 (sc_port) +d.c.b.port_3 (sc_port) +d.c.port_0 (sc_port) +d.c.port_1 (sc_port) +d.c.port_4 (sc_port) +d.c.port_5 (sc_port) diff --git a/src/systemc/tests/systemc/communication/ports/test04/test04.cpp b/src/systemc/tests/systemc/communication/ports/test04/test04.cpp new file mode 100644 index 000000000..f3f383d8b --- /dev/null +++ b/src/systemc/tests/systemc/communication/ports/test04/test04.cpp @@ -0,0 +1,152 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +//test of port connections + +#include "systemc.h" + + +#define WRITE(a) \ + cout << a.name() << " (" << a.kind() << ")" << endl + + +SC_MODULE( mod_a) +{ + sc_port<sc_signal_in_if<bool>,2> in_1; + sc_port<sc_signal_in_if<sc_logic>,2> in_2; + sc_port<sc_signal_inout_if<bool>,2> inout_1; + sc_port<sc_signal_inout_if<sc_logic>,2> inout_2; + + SC_CTOR( mod_a ) + { + WRITE(in_1); + WRITE(in_2); + WRITE(inout_1); + WRITE(inout_2); + } +}; + +SC_MODULE( mod_b) +{ + sc_port<sc_signal_in_if<bool>,2> in_1; + sc_port<sc_signal_in_if<sc_logic>,2> in_2; + sc_port<sc_signal_inout_if<bool>,2> inout_1; + sc_port<sc_signal_inout_if<sc_logic>,2> inout_2; + + SC_CTOR( mod_b ) + { + WRITE(in_1); + WRITE(in_2); + WRITE(inout_1); + WRITE(inout_2); + } +}; + +SC_MODULE( mod_c ) +{ + sc_port<sc_signal_in_if<bool>,0> input_1; + sc_port<sc_signal_in_if<bool>,3> input_2; + sc_port<sc_signal_in_if<sc_logic>,0> input_3; + sc_port<sc_signal_in_if<sc_logic>,3> input_4; + sc_port<sc_signal_inout_if<bool>,0> inout_1; + sc_port<sc_signal_inout_if<bool>,3> inout_2; + sc_port<sc_signal_inout_if<sc_logic>,0> inout_3; + sc_port<sc_signal_inout_if<sc_logic>,3> inout_4; + sc_signal<bool> sig_1; + sc_signal<bool> sig_2; + sc_signal<sc_logic> sig_3; + sc_signal<sc_logic> sig_4; + + mod_a a; + mod_b b; + + SC_CTOR( mod_c ) + :a("a"), b("b") + { + a.in_1(input_2); + a.in_1(sig_1); + a.in_2(input_4); + a.in_2(sig_3); + a.inout_1(inout_2); + a.inout_1(sig_2); + a.inout_2(inout_4); + a.inout_2(sig_4); + + b.in_1(input_1); + b.in_1(input_2); + b.in_2(input_3); + b.in_2(input_4); + b.inout_1(inout_1); + b.inout_1(inout_2); + b.inout_2(inout_3); + b.inout_2(inout_4); + + WRITE(input_1); + WRITE(input_2); + WRITE(inout_1); + WRITE(inout_2); + } +}; + +SC_MODULE( mod_d ) +{ + sc_port<sc_signal_in_if<bool>,1> input_1; + sc_port<sc_signal_in_if<sc_logic>,1> input_2; + sc_port<sc_signal_inout_if<bool>,1> inout_1; + sc_port<sc_signal_inout_if<sc_logic>,1> inout_2; + + mod_c c; + + SC_CTOR( mod_d ) + : input_1("input_1"), input_2("input_2"), + inout_1("inout_1"), inout_2("inout_2"), c("c") + { + c.input_1(input_1); + c.input_3(input_2); + c.inout_1(inout_1); + c.inout_3(inout_2); + } +}; + + +int sc_main(int, char* []){ + + mod_d d("d"); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/ports/test05/golden/test05.log b/src/systemc/tests/systemc/communication/ports/test05/golden/test05.log new file mode 100644 index 000000000..3d204c99d --- /dev/null +++ b/src/systemc/tests/systemc/communication/ports/test05/golden/test05.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E107) bind interface to port failed: interface already bound to port: port 'tb.port_0' (sc_port) +In file: <removed by verify.pl> diff --git a/src/systemc/tests/systemc/communication/ports/test05/test05.cpp b/src/systemc/tests/systemc/communication/ports/test05/test05.cpp new file mode 100644 index 000000000..a9e581f6a --- /dev/null +++ b/src/systemc/tests/systemc/communication/ports/test05/test05.cpp @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test05.cpp -- + + Original Author: Andy Goodrich, Forte Design Systems, 2005-09-12 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of error detection: interface being supplied twice to a multi-port. + +#include "systemc.h" + +SC_MODULE(TB) +{ + SC_CTOR(TB) + { + m_port(m_signal); + m_multi_port(m_signal); + m_multi_port(m_port); + } + sc_port<sc_signal_inout_if<int>,0> m_multi_port; + sc_inout<int> m_port; + sc_signal<int> m_signal; +}; + +int sc_main(int, char**) +{ + sc_clock clock; + TB tb("tb"); + + sc_start(1, SC_NS); + return 0; +} + diff --git a/src/systemc/tests/systemc/communication/reverse_bind/test01/golden/test01.log b/src/systemc/tests/systemc/communication/reverse_bind/test01/golden/test01.log new file mode 100644 index 000000000..19836dbfb --- /dev/null +++ b/src/systemc/tests/systemc/communication/reverse_bind/test01/golden/test01.log @@ -0,0 +1,25 @@ +SystemC Simulation +READ_LEAF: change 0 +TOP: change 0 +TOP: change 1 +READ_LEAF: change 1 +TOP: change 2 +READ_LEAF: change 2 +TOP: change 3 +READ_LEAF: change 3 +TOP: change 4 +READ_LEAF: change 4 +TOP: change 5 +READ_LEAF: change 5 +TOP: change 6 +READ_LEAF: change 6 +TOP: change 7 +READ_LEAF: change 7 +TOP: change 8 +READ_LEAF: change 8 +TOP: change 9 +READ_LEAF: change 9 +TOP: change 10 +READ_LEAF: change 10 +TOP: change 11 +READ_LEAF: change 11 diff --git a/src/systemc/tests/systemc/communication/reverse_bind/test01/test01.cpp b/src/systemc/tests/systemc/communication/reverse_bind/test01/test01.cpp new file mode 100644 index 000000000..a98f7c46a --- /dev/null +++ b/src/systemc/tests/systemc/communication/reverse_bind/test01/test01.cpp @@ -0,0 +1,73 @@ +#include "systemc.h"
+
+SC_MODULE(READ_LEAF)
+{
+ SC_CTOR(READ_LEAF)
+ {
+ SC_METHOD(delta);
+ sensitive << in;
+ }
+ void delta()
+ {
+ cout << "READ_LEAF: change " << (int)in.read() << endl;
+ }
+ sc_in<sc_uint<8> > in;
+};
+
+SC_MODULE(WRITE_LEAF)
+{
+ SC_CTOR(WRITE_LEAF)
+ {
+ SC_METHOD(sync)
+ sensitive << clk.pos();
+ }
+ void sync()
+ {
+ out = out.read() + 1;
+ }
+ sc_signal<sc_uint<8> > out;
+ sc_in_clk clk;
+};
+
+SC_MODULE(MIDDLE)
+{
+ SC_CTOR(MIDDLE) : reader("reader"), writer("writer")
+ {
+ writer.clk(clk); // Bind clk going down the module hierarchy.
+ reader.in(my_port); // Bind my_port going down the module hierarchy.
+ my_port(writer.out); // Bind my_port coming up the module hierarchy.
+ }
+ sc_in_clk clk;
+ sc_in<sc_uint<8> > my_port;
+ READ_LEAF reader;
+ WRITE_LEAF writer;
+};
+
+SC_MODULE(TOP)
+{
+ SC_CTOR(TOP) : down("down")
+ {
+ down.clk(clk); // Bind clk going down the module hierarchy.
+ in(down.my_port); // Bind in coming up the module hierarchy.
+ SC_METHOD(delta);
+ sensitive << in;
+ }
+ void delta()
+ {
+ cout << "TOP: change " << (int)in.read() << endl;
+ }
+ sc_in_clk clk;
+ sc_in<sc_uint<8> > in;
+ MIDDLE down;
+};
+
+int sc_main(int argc, char* arg[])
+{
+ sc_clock clock;
+ TOP top("top");
+ top.clk(clock);
+
+ sc_start(10, SC_NS);
+ return 0;
+}
+
diff --git a/src/systemc/tests/systemc/communication/reverse_bind/test02/golden/test02.log b/src/systemc/tests/systemc/communication/reverse_bind/test02/golden/test02.log new file mode 100644 index 000000000..19836dbfb --- /dev/null +++ b/src/systemc/tests/systemc/communication/reverse_bind/test02/golden/test02.log @@ -0,0 +1,25 @@ +SystemC Simulation +READ_LEAF: change 0 +TOP: change 0 +TOP: change 1 +READ_LEAF: change 1 +TOP: change 2 +READ_LEAF: change 2 +TOP: change 3 +READ_LEAF: change 3 +TOP: change 4 +READ_LEAF: change 4 +TOP: change 5 +READ_LEAF: change 5 +TOP: change 6 +READ_LEAF: change 6 +TOP: change 7 +READ_LEAF: change 7 +TOP: change 8 +READ_LEAF: change 8 +TOP: change 9 +READ_LEAF: change 9 +TOP: change 10 +READ_LEAF: change 10 +TOP: change 11 +READ_LEAF: change 11 diff --git a/src/systemc/tests/systemc/communication/reverse_bind/test02/test02.cpp b/src/systemc/tests/systemc/communication/reverse_bind/test02/test02.cpp new file mode 100644 index 000000000..1f7fa5420 --- /dev/null +++ b/src/systemc/tests/systemc/communication/reverse_bind/test02/test02.cpp @@ -0,0 +1,73 @@ +#include "systemc.h"
+
+SC_MODULE(READ_LEAF)
+{
+ SC_CTOR(READ_LEAF)
+ {
+ SC_METHOD(delta);
+ sensitive << in;
+ }
+ void delta()
+ {
+ cout << "READ_LEAF: change " << (int)in.read() << endl;
+ }
+ sc_in<sc_int<8> > in;
+};
+
+SC_MODULE(WRITE_LEAF)
+{
+ SC_CTOR(WRITE_LEAF)
+ {
+ SC_METHOD(sync)
+ sensitive << clk.pos();
+ }
+ void sync()
+ {
+ out = out.read() + 1;
+ }
+ sc_signal<sc_int<8> > out;
+ sc_in_clk clk;
+};
+
+SC_MODULE(MIDDLE)
+{
+ SC_CTOR(MIDDLE) : reader("reader"), writer("writer")
+ {
+ writer.clk(clk); // Bind clk going down the module hierarchy.
+ reader.in(my_port); // Bind my_port going down the module hierarchy.
+ my_port(writer.out); // Bind my_port coming up the module hierarchy.
+ }
+ sc_in_clk clk;
+ sc_in<sc_int<8> > my_port;
+ READ_LEAF reader;
+ WRITE_LEAF writer;
+};
+
+SC_MODULE(TOP)
+{
+ SC_CTOR(TOP) : down("down")
+ {
+ down.clk(clk); // Bind clk going down the module hierarchy.
+ in(down.my_port); // Bind in coming up the module hierarchy.
+ SC_METHOD(delta);
+ sensitive << in;
+ }
+ void delta()
+ {
+ cout << "TOP: change " << (int)in.read() << endl;
+ }
+ sc_in_clk clk;
+ sc_in<sc_int<8> > in;
+ MIDDLE down;
+};
+
+int sc_main(int argc, char* arg[])
+{
+ sc_clock clock;
+ TOP top("top");
+ top.clk(clock);
+
+ sc_start(10, SC_NS);
+ return 0;
+}
+
diff --git a/src/systemc/tests/systemc/communication/sc_buffer/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_buffer/test01/golden/test01.log new file mode 100644 index 000000000..708a33b5c --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_buffer/test01/golden/test01.log @@ -0,0 +1,102 @@ +SystemC Simulation +0 s 0 +0 s 3 +1 ns 3 +2 ns 3 +3 ns 3 +4 ns 3 +5 ns 3 +6 ns 3 +7 ns 3 +8 ns 3 +9 ns 3 +10 ns 3 +11 ns 3 +12 ns 3 +13 ns 3 +14 ns 3 +15 ns 3 +16 ns 3 +17 ns 3 +18 ns 3 +19 ns 3 +20 ns 3 +21 ns 3 +22 ns 3 +23 ns 3 +24 ns 3 +25 ns 3 +26 ns 3 +27 ns 3 +28 ns 3 +29 ns 3 +30 ns 3 +31 ns 3 +32 ns 3 +33 ns 3 +34 ns 3 +35 ns 3 +36 ns 3 +37 ns 3 +38 ns 3 +39 ns 3 +40 ns 3 +41 ns 3 +42 ns 3 +43 ns 3 +44 ns 3 +45 ns 3 +46 ns 3 +47 ns 3 +48 ns 3 +49 ns 3 +50 ns 3 +51 ns 3 +52 ns 3 +53 ns 3 +54 ns 3 +55 ns 3 +56 ns 3 +57 ns 3 +58 ns 3 +59 ns 3 +60 ns 3 +61 ns 3 +62 ns 3 +63 ns 3 +64 ns 3 +65 ns 3 +66 ns 3 +67 ns 3 +68 ns 3 +69 ns 3 +70 ns 3 +71 ns 3 +72 ns 3 +73 ns 3 +74 ns 3 +75 ns 3 +76 ns 3 +77 ns 3 +78 ns 3 +79 ns 3 +80 ns 3 +81 ns 3 +82 ns 3 +83 ns 3 +84 ns 3 +85 ns 3 +86 ns 3 +87 ns 3 +88 ns 3 +89 ns 3 +90 ns 3 +91 ns 3 +92 ns 3 +93 ns 3 +94 ns 3 +95 ns 3 +96 ns 3 +97 ns 3 +98 ns 3 +99 ns 3 diff --git a/src/systemc/tests/systemc/communication/sc_buffer/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_buffer/test01/test01.cpp new file mode 100644 index 000000000..2f7b49f4f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_buffer/test01/test01.cpp @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: test01.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:25:56 acg +// systemc_tests-2.3 +// +// Revision 1.2 2006/01/24 19:11:29 acg +// Andy Goodrich: Changed sc_simulation_time() usage to sc_time_stamp(). +// + +// test of sc_buffer<T> -- general test + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in<bool> clk; + sc_out<int> out; + + void main_action() + { + while( true ) { + wait(); + out = 3; + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( main_action ); + sensitive << clk.pos(); + } +}; + +SC_MODULE( mod_b ) +{ + sc_in<int> in; + + void main_action() + { + cout << sc_time_stamp() << " " << in.read() << endl; + } + + SC_CTOR( mod_b ) + { + SC_METHOD( main_action ); + sensitive << in; + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + mod_b b( "b" ); + + sc_clock clk; + sc_buffer<int> buf; + + a.clk( clk ); + a.out( buf ); + b.in( buf ); + + sc_start( 100, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_buffer/test02/golden/sc_buffer_edge_reset.log b/src/systemc/tests/systemc/communication/sc_buffer/test02/golden/sc_buffer_edge_reset.log new file mode 100644 index 000000000..15f6aaa60 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_buffer/test02/golden/sc_buffer_edge_reset.log @@ -0,0 +1,31 @@ +SystemC Simulation +sig_mod.trigger_rst @ 0 s: in = 1 +buf_mod.trigger_rst @ 0 s: in = 1 +buf_mod.trigger_pos @ 0 s: in = 1 +buf_mod.trigger_val @ 0 s: in = 1 +sig_mod.trigger_pos @ 0 s: in = 1 +sig_mod.trigger_val @ 0 s: in = 1 +buf_mod.trigger_rst @ 1 ns: in = 1 +buf_mod.trigger_pos @ 1 ns: in = 1 +buf_mod.trigger_val @ 1 ns: in = 1 +buf_mod.trigger_neg @ 2 ns: in = 0 +buf_mod.trigger_val @ 2 ns: in = 0 +sig_mod.trigger_neg @ 2 ns: in = 0 +sig_mod.trigger_val @ 2 ns: in = 0 +buf_mod.trigger_neg @ 3 ns: in = 0 +buf_mod.trigger_val @ 3 ns: in = 0 +sig_mod.trigger_rst @ 4 ns: in = 1 +buf_mod.trigger_rst @ 4 ns: in = 1 +buf_mod.trigger_pos @ 4 ns: in = 1 +buf_mod.trigger_val @ 4 ns: in = 1 +sig_mod.trigger_pos @ 4 ns: in = 1 +sig_mod.trigger_val @ 4 ns: in = 1 +buf_mod.trigger_rst @ 5 ns: in = 1 +buf_mod.trigger_pos @ 5 ns: in = 1 +buf_mod.trigger_val @ 5 ns: in = 1 +buf_mod.trigger_neg @ 6 ns: in = 0 +buf_mod.trigger_val @ 6 ns: in = 0 +sig_mod.trigger_neg @ 6 ns: in = 0 +sig_mod.trigger_val @ 6 ns: in = 0 +buf_mod.trigger_neg @ 7 ns: in = 0 +buf_mod.trigger_val @ 7 ns: in = 0 diff --git a/src/systemc/tests/systemc/communication/sc_buffer/test02/sc_buffer_edge_reset.cpp b/src/systemc/tests/systemc/communication/sc_buffer/test02/sc_buffer_edge_reset.cpp new file mode 100644 index 000000000..98fe8a5bb --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_buffer/test02/sc_buffer_edge_reset.cpp @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sc_buffer_edge_reset.cpp -- Test sc_buffer<bool> edge events and reset + + Original Author: Philipp A. Hartmann, OFFIS, 2013-10-12 + + ----------------------------------------------------------------------------- + + This test checks the functionality of the pos(), neg() event finders and + the async_reset_signal_is functionality, if the target port is bound to + an sc_buffer instead of an sc_signal. + + *****************************************************************************/ + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include <systemc.h> +#include <iomanip> + +SC_MODULE(print_edge) +{ + sc_in<bool> in; + + SC_CTOR(print_edge) + : in("in") + { + spawn_trigger( "trigger_val", &in.value_changed() ); + spawn_trigger( "trigger_pos", &in.pos() ); + spawn_trigger( "trigger_neg", &in.neg() ); + spawn_trigger( "trigger_rst", NULL ); + } + + void spawn_trigger( const char* name, sc_event_finder* ef ) + { + sc_spawn_options opts; + opts.spawn_method(); + opts.dont_initialize(); + if( ef ) { + opts.set_sensitivity( ef ); + } else { + opts.async_reset_signal_is( in, true ); + } + sc_spawn( sc_bind(&print_edge::trigger,this) + , name, &opts); + } + + void trigger() + { + std::cout << sc_get_current_process_handle().name() + << " @ " << std::setw(4) << sc_time_stamp() + << ": " << "in = " << in.read() + << std::endl; + } +}; + +int sc_main(int, char*[]) +{ + sc_report_handler::set_actions( SC_ID_DISABLE_WILL_ORPHAN_PROCESS_ + , SC_DO_NOTHING ); + + sc_signal<int> sig_int; + + sc_buffer<bool> buf; + sc_signal<bool> sig; + + print_edge sig_mod("sig_mod"); + sig_mod.in(sig); + + print_edge buf_mod("buf_mod"); + buf_mod.in(buf); + + for(int i=0; i<4; ++i) { + buf.write( !buf.read() ); + sig.write( !sig.read() ); + sc_start( 1, SC_NS ); + + buf.write( buf.read() ); + sig.write( sig.read() ); + sc_start( 1, SC_NS ); + } + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_clock/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_clock/test01/golden/test01.log new file mode 100644 index 000000000..68fd7fe24 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_clock/test01/golden/test01.log @@ -0,0 +1,70 @@ +SystemC Simulation + +name = clock_0 +period = 1 ns +duty_cycle = 0.5 + +name = c2 +period = 1 ns +duty_cycle = 0.5 + +name = c3 +period = 8 ns +duty_cycle = 0.5 + +name = c4 +period = 8 ns +duty_cycle = 0.1 + +name = c5 +period = 8 ns +duty_cycle = 0.1 + +name = c6 +period = 8 ns +duty_cycle = 0.1 + +name = c7 +period = 8 ns +duty_cycle = 0.5 + +name = c8 +period = 8 ns +duty_cycle = 0.1 + +name = c9 +period = 8 ns +duty_cycle = 0.1 + +name = cA +period = 8 ns +duty_cycle = 0.1 + +Info: (I804) /IEEE_Std_1666/deprecated: + sc_clock(const char*, double, double, double, bool) + is deprecated use a form that includes sc_time or + sc_time_unit + +name = cB +period = 8 ns +duty_cycle = 0.5 + +name = cC +period = 8 ns +duty_cycle = 0.1 + +name = cD +period = 8 ns +duty_cycle = 0.1 + +name = cE +period = 8 ns +duty_cycle = 0.1 + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/communication/sc_clock/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_clock/test01/test01.cpp new file mode 100644 index 000000000..0d6e81174 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_clock/test01/test01.cpp @@ -0,0 +1,89 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of the sc_clock constructors + +#include "systemc.h" + +#define CLOCK_INFO(clk) \ + cout << endl; \ + cout << "name = " << clk.name() << endl; \ + cout << "period = " << clk.period() << endl; \ + cout << "duty_cycle = " << clk.duty_cycle() << endl; + +int +sc_main( int, char*[] ) +{ + sc_time t1( 8, SC_NS ); + sc_time t2( 2, SC_NS ); + + sc_clock c1; + CLOCK_INFO( c1 ); + + sc_clock c2( "c2" ); + CLOCK_INFO( c2 ); + + sc_clock c3( "c3", t1 ); + CLOCK_INFO( c3 ); + sc_clock c4( "c4", t1, 0.1 ); + CLOCK_INFO( c4 ); + sc_clock c5( "c5", t1, 0.1, t2 ); + CLOCK_INFO( c5 ); + sc_clock c6( "c6", t1, 0.1, t2, false ); + CLOCK_INFO( c6 ); + + sc_clock c7( "c7", 8, SC_NS ); + CLOCK_INFO( c7 ); + sc_clock c8( "c8", 8, SC_NS, 0.1 ); + CLOCK_INFO( c8 ); + + sc_clock c9( "c9", 8, SC_NS, 0.1, 2, SC_NS ); + CLOCK_INFO( c9 ); + sc_clock cA( "cA", 8, SC_NS, 0.1, 2, SC_NS, false ); + CLOCK_INFO( cA ); + + sc_clock cB( "cB", 8 ); + CLOCK_INFO( cB ); + sc_clock cC( "cC", 8, 0.1 ); + CLOCK_INFO( cC ); + sc_clock cD( "cD", 8, 0.1, 2 ); + CLOCK_INFO( cD ); + sc_clock cE( "cE", 8, 0.1, 2, false ); + CLOCK_INFO( cE ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_clock/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_clock/test02/golden/test02.log new file mode 100644 index 000000000..568507d71 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_clock/test02/golden/test02.log @@ -0,0 +1,20 @@ +SystemC Simulation +m_cur_val for c1( "c1", t1, 0.1, t2 ) is: 0 +m_cur_val for c2( "c2", t1, 0.1, t2, false ) is: 1 +m_cur_val for c3( "c3", t1, 0.1, t2 ) is: 0 + +Info: (I804) /IEEE_Std_1666/deprecated: + sc_clock(const char*, double, double, double, bool) + is deprecated use a form that includes sc_time or + sc_time_unit +m_cur_val for c4( "c4", t1, 0.1, t2, false ) is: 1 +m_cur_val for c5( "c5", t1, 0.1, t2 ) is: 0 +m_cur_val for c6( "c6", t1, 0.1, t2, false ) is: 1 + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/communication/sc_clock/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_clock/test02/test02.cpp new file mode 100644 index 000000000..1d95b2a90 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_clock/test02/test02.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of the sc_clock::print + +#include "systemc.h" + + +int +sc_main( int, char*[] ) +{ + sc_time t1( 8, SC_NS ); + sc_time t2( 2, SC_NS ); + + + sc_clock c1( "c1", t1, 0.1, t2 ); + cout << "m_cur_val for c1( \"c1\", t1, 0.1, t2 ) is: "; + c1.print(cout); + cout << "\n"; + + sc_clock c2( "c2", t1, 0.1, t2, false ); + cout << "m_cur_val for c2( \"c2\", t1, 0.1, t2, false ) is: "; + c2.print(cout); + cout << "\n"; + + + sc_clock c3( "c3", 8, SC_NS, 0.1 ); + cout << "m_cur_val for c3( \"c3\", t1, 0.1, t2 ) is: "; + c3.print(cout); + cout << "\n"; + + sc_clock c4( "c4", 8, SC_NS, 0.1, false ); + cout << "m_cur_val for c4( \"c4\", t1, 0.1, t2, false ) is: "; + c4.print(cout); + cout << "\n"; + + sc_clock c5( "c5", 8, SC_NS, 0.1, 2, SC_NS ); + cout << "m_cur_val for c5( \"c5\", t1, 0.1, t2 ) is: "; + c5.print(cout); + cout<< "\n"; + + sc_clock c6( "c6", 8, SC_NS, 0.1, 2, SC_NS, false ); + cout << "m_cur_val for c6( \"c6\", t1, 0.1, t2, false ) is: "; + c6.print(cout); + cout<< "\n"; + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_clock/test03/golden/test03.log b/src/systemc/tests/systemc/communication/sc_clock/test03/golden/test03.log new file mode 100644 index 000000000..e77ee4ca8 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_clock/test03/golden/test03.log @@ -0,0 +1,9 @@ +SystemC Simulation + name = c1 + value = 0 +new value = 0 + + name = c2 + value = 1 +new value = 1 + diff --git a/src/systemc/tests/systemc/communication/sc_clock/test03/test03.cpp b/src/systemc/tests/systemc/communication/sc_clock/test03/test03.cpp new file mode 100644 index 000000000..3f82ef7f1 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_clock/test03/test03.cpp @@ -0,0 +1,59 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_clock::dump( ostream& os ) const + +#include "systemc.h" + + +int +sc_main( int, char*[] ) +{ + sc_time t1( 8, SC_NS ); + sc_time t2( 2, SC_NS ); + + sc_clock c1( "c1", t1, 0.1, t2 ); + c1.dump(cout); + cout << "\n"; + + sc_clock c2( "c2", t1, 0.1, t2, false ); + c2.dump(cout); + cout << "\n"; + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_clock/test04/golden/test04.log b/src/systemc/tests/systemc/communication/sc_clock/test04/golden/test04.log new file mode 100644 index 000000000..37da64982 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_clock/test04/golden/test04.log @@ -0,0 +1,3 @@ +SystemC Simulation +current time is: 8 ns +now, the current time is: 10 ns diff --git a/src/systemc/tests/systemc/communication/sc_clock/test04/test04.cpp b/src/systemc/tests/systemc/communication/sc_clock/test04/test04.cpp new file mode 100644 index 000000000..759fc48fb --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_clock/test04/test04.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_clock::time_stamp() + +#include "systemc.h" + + +int +sc_main( int, char*[] ) +{ + sc_time t1( 8, SC_NS ); + sc_time t2( 2, SC_NS ); + + sc_clock c1( "c1", t1, 0.1, t2 ); + sc_start(t1); + cout << "current time is: "; + cout << c1.time_stamp(); + cout << endl; + + sc_start(t2); + cout << "now, the current time is: "; + cout << c1.time_stamp(); + cout << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_event_queue/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_event_queue/test01/golden/test01.log new file mode 100644 index 000000000..73b6d527c --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_event_queue/test01/golden/test01.log @@ -0,0 +1,38 @@ +SystemC Simulation +0 s delta 2: P awakes +0 s delta 3: P awakes +0 s delta 4: P awakes +0 s delta 5: P awakes +1 ns delta 6: P awakes +1 ns delta 7: P awakes +1 ns delta 8: P awakes +1 ns delta 9: P awakes +13 ns delta 11: P awakes +15 ns delta 12: P awakes +15 ns delta 12: xyz awakes +15 ns delta 13: P awakes +18 ns delta 14: P awakes +20 ns delta 17: P awakes +20 ns delta 18: P awakes +21 ns delta 19: P awakes +21 ns delta 20: P awakes +40 ns delta 24: P awakes +40 ns delta 25: P awakes +40 ns delta 26: P awakes +40 ns delta 27: P awakes +41 ns delta 28: P awakes +41 ns delta 29: P awakes +41 ns delta 30: P awakes +41 ns delta 31: P awakes +60 ns delta 35: P awakes +60 ns delta 36: P awakes +61 ns delta 37: P awakes +61 ns delta 38: P awakes +80 ns delta 42: P awakes +80 ns delta 43: P awakes +80 ns delta 44: P awakes +80 ns delta 45: P awakes +81 ns delta 46: P awakes +81 ns delta 47: P awakes +81 ns delta 48: P awakes +81 ns delta 49: P awakes diff --git a/src/systemc/tests/systemc/communication/sc_event_queue/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_event_queue/test01/test01.cpp new file mode 100644 index 000000000..85e52c703 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_event_queue/test01/test01.cpp @@ -0,0 +1,88 @@ +#include <systemc.h> + +SC_MODULE(Rec) { + sc_event_queue_port E; + + SC_CTOR(Rec) { + SC_METHOD(P); + sensitive << E; + dont_initialize(); + } + void P() { + cout << sc_time_stamp() + << " delta " << sc_delta_count() + << ": P awakes\n"; + } +}; + +SC_MODULE(Sender) { + sc_in<bool> Clock; + sc_event_queue_port E; + + SC_CTOR(Sender) { + SC_METHOD(P); + sensitive << Clock.pos(); + dont_initialize(); + } + void P() { + // trigger in now (2x), now+1ns (2x) + E->notify( 0, SC_NS ); + E->notify( 0, SC_NS ); + E->notify( 1, SC_NS ); + E->notify( 1, SC_NS ); + } +}; + +SC_MODULE(xyz) { + SC_CTOR(xyz) { + SC_THREAD(P); + } + void P() { + wait(15, SC_NS); + cout << sc_time_stamp() + << " delta " << sc_delta_count() + << ": xyz awakes\n"; + } +}; + +int sc_main (int agrc, char** argv) +{ + sc_event_queue E("E"); + + Rec R("Rec"); + R.E(E); + + sc_clock C1 ("C1", 20, SC_NS); + sc_clock C2 ("C2", 40, SC_NS); + + xyz xyz_obj("xyz"); + + // Events at 0ns (2x), 1ns (2x), 20ns (2x), 21ns (2x), 40ns (2x), ... + Sender S1("S1"); + S1.Clock(C1); + S1.E(E); + + // Events at 0ns (2x), 1ns (2x), 40ns (2x), 41ns (2x), 80ns (2x), ... + Sender S2("S2"); + S2.Clock(C2); + S2.E(E); + + // Events at 3ns, 5ns (2x), 8ns + sc_start(10, SC_NS); + E.notify( 5,SC_NS ); + E.notify( 3,SC_NS ); + E.notify( 5,SC_NS ); + E.notify( 8,SC_NS) ; + + // Events would be at 40ns, 43ns (2x), 44ns but all are cancelled + sc_start(40, SC_NS); + E.notify( 3, SC_NS ); + E.notify( 3, SC_NS ); + E.notify( 4, SC_NS ); + E.notify( SC_ZERO_TIME ); + E.cancel_all(); + + sc_start(40, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_export/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_export/test01/golden/test01.log new file mode 100644 index 000000000..19836dbfb --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_export/test01/golden/test01.log @@ -0,0 +1,25 @@ +SystemC Simulation +READ_LEAF: change 0 +TOP: change 0 +TOP: change 1 +READ_LEAF: change 1 +TOP: change 2 +READ_LEAF: change 2 +TOP: change 3 +READ_LEAF: change 3 +TOP: change 4 +READ_LEAF: change 4 +TOP: change 5 +READ_LEAF: change 5 +TOP: change 6 +READ_LEAF: change 6 +TOP: change 7 +READ_LEAF: change 7 +TOP: change 8 +READ_LEAF: change 8 +TOP: change 9 +READ_LEAF: change 9 +TOP: change 10 +READ_LEAF: change 10 +TOP: change 11 +READ_LEAF: change 11 diff --git a/src/systemc/tests/systemc/communication/sc_export/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_export/test01/test01.cpp new file mode 100644 index 000000000..9b2388421 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_export/test01/test01.cpp @@ -0,0 +1,75 @@ +#include "systemc.h" + +SC_MODULE(READ_LEAF) +{ + SC_CTOR(READ_LEAF) + { + SC_METHOD(delta); + sensitive << in; + } + void delta() + { + cout << "READ_LEAF: change " << (int)in->read() << endl; + } + sc_in<sc_uint<8> > in; +}; + +SC_MODULE(WRITE_LEAF) +{ + SC_CTOR(WRITE_LEAF) : out("out"), clk("clk") + { + my_export(out); + SC_METHOD(sync) + sensitive << clk.pos(); + } + void sync() + { + out = out.read() + 1; + } + sc_signal<sc_uint<8> > out; + sc_export<sc_signal_in_if<sc_uint<8> > > my_export; + sc_in_clk clk; +}; + +SC_MODULE(MIDDLE) +{ + SC_CTOR(MIDDLE) : reader("reader"), writer("writer") + { + writer.clk(clk); // Bind clk going down the module hierarchy. + my_port(writer.my_export); // Bind my_port coming up the module hierarchy. + reader.in(my_port); // Bind my_port going down the module hierarchy. + } + sc_in_clk clk; + sc_export<sc_signal_in_if<sc_uint<8> > > my_port; + READ_LEAF reader; + WRITE_LEAF writer; +}; + +SC_MODULE(TOP) +{ + SC_CTOR(TOP) : down("down") + { + down.clk(clk); // Bind clk going down the module hierarchy. + in(down.my_port); // Bind in coming up the module hierarchy. + SC_METHOD(delta); + sensitive << in; + } + void delta() + { + cout << "TOP: change " << (int)in.read() << endl; + } + sc_in_clk clk; + sc_in<sc_uint<8> > in; + MIDDLE down; +}; + +int sc_main(int argc, char* arg[]) +{ + sc_clock clock; + TOP top("top"); + top.clk(clock); + + sc_start(10, SC_NS); + return 0; +} + diff --git a/src/systemc/tests/systemc/communication/sc_export/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_export/test02/golden/test02.log new file mode 100644 index 000000000..b2a9f1c81 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_export/test02/golden/test02.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E120) sc_export instance has no interface: x.export_1 +In file: <removed by verify.pl> diff --git a/src/systemc/tests/systemc/communication/sc_export/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_export/test02/test02.cpp new file mode 100644 index 000000000..f044fc741 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_export/test02/test02.cpp @@ -0,0 +1,20 @@ +#include "systemc.h" + +SC_MODULE(X) +{ + SC_CTOR(X) + { + a(b); + } + sc_export<sc_signal_inout_if<int> > a; + sc_export<sc_signal_inout_if<int> > b; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + X x("x"); + + sc_start(1, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_export/test03/golden/test03.log b/src/systemc/tests/systemc/communication/sc_export/test03/golden/test03.log new file mode 100644 index 000000000..3de4cda83 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_export/test03/golden/test03.log @@ -0,0 +1,4 @@ +SystemC Simulation +10 ns In Channel run() +17 ns In Channel run() +20 ns In Channel run() diff --git a/src/systemc/tests/systemc/communication/sc_export/test03/test03.cpp b/src/systemc/tests/systemc/communication/sc_export/test03/test03.cpp new file mode 100644 index 000000000..9da2e4934 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_export/test03/test03.cpp @@ -0,0 +1,86 @@ +#include "systemc.h" + +// Interface +class C_if : virtual public sc_interface +{ +public: + virtual void run() = 0; +}; + +// Channel +class C : public C_if, public sc_channel +{ +public: + SC_CTOR(C) { } + virtual void run() + { + cout << sc_time_stamp() << " In Channel run() " << endl; + } +}; + +// --- D: export channel C through IFP -------- +SC_MODULE( D ) +{ + sc_export<C_if> IFP; + + SC_CTOR( D ) + : IFP("IFP"), // explicit name + m_C("C") + { + IFP( m_C ); // bind sc_export->interface by name + } + private: + C m_C; // channel +}; + +// --- E: module with two interface-ports --- +SC_MODULE( E ) +{ + private: + C m_C; + D m_D; + + public: + sc_export<C_if> IFP1; + sc_export<C_if> IFP2; + + SC_CTOR( E ) + : m_C("C"), + m_D("D"), + IFP1("IFP1") + { + IFP1( m_C ); + IFP2( m_D.IFP ); // bind sc_export->sc_export by name + IFP1.get_interface(); // just to see whether it compiles + } +}; + +// Module X connected to the channels through E +SC_MODULE( X ) +{ + sc_port<C_if> P1; + sc_port<C_if> P2; + SC_CTOR(X) { + SC_THREAD(run); + } + void run() { + wait(10, SC_NS); + P1->run(); + wait(10, SC_NS); + P2->run(); + } +}; + +int sc_main(int argc, char** argv) { + E the_E("E"); + X the_X("X"); + // port->IFP + the_X.P1( the_E.IFP1 ); + the_X.P2( the_E.IFP2 ); + + sc_start(17, SC_NS); + the_E.IFP1->run(); // testing the operator-> of sc_export + sc_start(50, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_export/test04/golden/test04.log b/src/systemc/tests/systemc/communication/sc_export/test04/golden/test04.log new file mode 100644 index 000000000..df6df8478 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_export/test04/golden/test04.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E109) complete binding failed: export not bound: export 'x.a' (sc_export) +In file: <removed by verify.pl> diff --git a/src/systemc/tests/systemc/communication/sc_export/test04/test04.cpp b/src/systemc/tests/systemc/communication/sc_export/test04/test04.cpp new file mode 100644 index 000000000..6a2b21421 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_export/test04/test04.cpp @@ -0,0 +1,17 @@ +#include "systemc.h" + +SC_MODULE(X) +{ + SC_CTOR(X) : a("a") + { + } + sc_export<sc_signal_inout_if<int> > a; +}; + +int sc_main(int argc, char* argv[]) +{ + X x("x"); + + sc_start(1, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_export/test05/golden/test05.log b/src/systemc/tests/systemc/communication/sc_export/test05/golden/test05.log new file mode 100644 index 000000000..a736ca05c --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_export/test05/golden/test05.log @@ -0,0 +1,51 @@ +SystemC Simulation +0 s: 0 +1 ns: 0 +2 ns: 0 +3 ns: 0 +4 ns: 1 +5 ns: 2 +6 ns: 3 +7 ns: 4 +8 ns: 5 +9 ns: 6 +10 ns: 7 +11 ns: 8 +12 ns: 9 +13 ns: 10 +14 ns: 11 +15 ns: 12 +16 ns: 13 +17 ns: 14 +18 ns: 15 +19 ns: 16 +20 ns: 17 +21 ns: 18 +22 ns: 19 +23 ns: 20 +24 ns: 21 +25 ns: 22 +26 ns: 23 +27 ns: 24 +28 ns: 25 +29 ns: 26 +30 ns: 27 +31 ns: 28 +32 ns: 29 +33 ns: 30 +34 ns: 31 +35 ns: 32 +36 ns: 33 +37 ns: 34 +38 ns: 35 +39 ns: 36 +40 ns: 37 +41 ns: 38 +42 ns: 39 +43 ns: 40 +44 ns: 41 +45 ns: 42 +46 ns: 43 +47 ns: 44 +48 ns: 45 +49 ns: 46 diff --git a/src/systemc/tests/systemc/communication/sc_export/test05/test05.cpp b/src/systemc/tests/systemc/communication/sc_export/test05/test05.cpp new file mode 100644 index 000000000..f1e38c862 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_export/test05/test05.cpp @@ -0,0 +1,106 @@ +#include "systemc.h" + +typedef sc_biguint<121> atom; // Value to be pipe delayed. + +//============================================================================== +// esc_dpipe<T,N> - DELAY PIPELINE FOR AN ARBITRARY CLASS: +//============================================================================== +template<class T, int N> +SC_MODULE(esc_dpipe) { + public: + typedef sc_export<sc_signal_inout_if<T> > in; // To pipe port type. + typedef sc_export<sc_signal_in_if<T> > out; // From pipe port type. + + public: + SC_CTOR(esc_dpipe) + { + m_in(m_pipe[0]); + m_out(m_pipe[N-1]); + SC_METHOD(rachet); + sensitive << m_clk.pos(); + } + + protected: + void rachet() + { + for ( int i = N-1; i > 0; i-- ) + { + m_pipe[i].write(m_pipe[i-1].read()); + } + } + + public: + sc_in_clk m_clk; // Pipe synchronization. + in m_in; // Input to delay pipe. + out m_out; // Output from delay pipe. + + protected: + sc_signal<T> m_pipe[N]; // Pipeline stages. +}; + + +// Testbench reader of values from the pipe: + +SC_MODULE(Reader) +{ + SC_CTOR(Reader) + { + SC_METHOD(extract) + sensitive << m_clk.pos(); + dont_initialize(); + } + + void extract() + { + cout << sc_time_stamp() << ": " << m_from_pipe.read() << endl; + } + + sc_in_clk m_clk; // Module synchronization. + sc_in<atom > m_from_pipe; // Output from delay pipe. +}; + + + +// Testbench writer of values to the pipe: + +SC_MODULE(Writer) +{ + SC_CTOR(Writer) + { + SC_METHOD(insert) + sensitive << m_clk.pos(); + m_counter = 0; + } + + void insert() + { + m_to_pipe.write(m_counter); + m_counter++; + } + + sc_in_clk m_clk; // Module synchronization. + atom m_counter; // Write value. + sc_inout<atom > m_to_pipe; // Input for delay pipe. +}; + +// Main program + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + esc_dpipe<atom,4> delay("pipe"); + Reader reader("reader"); + Writer writer("writer"); + + delay.m_clk(clock); + + reader.m_clk(clock); + reader.m_from_pipe(delay.m_out); + + writer.m_clk(clock); + writer.m_to_pipe(delay.m_in); + + sc_start(50, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_fifo/test01/golden/test01.log new file mode 100644 index 000000000..7dbaa863b --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test01/golden/test01.log @@ -0,0 +1,145 @@ +SystemC Simulation +0 +1 +2 +3 +4 +5 +6 +7 +8 +9 +10 +11 +12 +13 +14 +Available: 5 +15 +16 +17 +18 +19 +20 +21 +22 +23 +24 +25 +26 +27 +28 +29 +Available: 0 +30 +31 +32 +33 +34 +35 +36 +37 +38 +39 +40 +41 +42 +43 +44 +Available: 5 +45 +46 +47 +48 +49 +50 +51 +52 +53 +54 +55 +56 +57 +58 +59 +Available: 0 +60 +61 +62 +63 +64 +65 +66 +67 +68 +69 +70 +71 +72 +73 +74 +Available: 5 +75 +76 +77 +78 +79 +80 +81 +82 +83 +84 +85 +86 +87 +88 +89 +Available: 0 +90 +91 +92 +93 +94 +95 +96 +97 +98 +99 +100 +101 +102 +103 +104 +Available: 5 +105 +106 +107 +108 +109 +110 +111 +112 +113 +114 +115 +116 +117 +118 +119 +Available: 0 +120 +121 +122 +123 +124 +125 +126 +127 +128 +129 +130 +131 +132 +133 +134 +Available: 5 diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_fifo/test01/test01.cpp new file mode 100644 index 000000000..b9e8515d0 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test01/test01.cpp @@ -0,0 +1,107 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_fifo<T> - general test + +#include "systemc.h" + +SC_MODULE( writer ) +{ + // port(s) + sc_fifo_out<int> out; + + // process(es) + void main_action() + { + int val = 0; + while( true ) { + wait( 10, SC_NS ); // wait for 10 ns + for( int i = 0; i < 20; i ++ ) + out->write( val ++ ); // blocking write + } + } + + SC_CTOR( writer ) + { + SC_THREAD( main_action ); + } +}; + +SC_MODULE( reader ) +{ + // port(s) + sc_fifo_in<int> in; + + // process(es) + void main_action() + { + int val; + while( true ) { + wait( 10, SC_NS ); // wait for 10 ns + for( int i = 0; i < 15; i ++ ) { + in->read( val ); // blocking read + cout << val << endl; + } + cout << "Available: " << in->num_available() << endl; + } + } + + SC_CTOR( reader ) + { + SC_THREAD( main_action ); + } +}; + +int sc_main( int, char*[] ) +{ + sc_clock c; + + // declare channel(s) + sc_fifo<int> fifo( 10 ); + + // instantiate block(s) and connect to channel(s) + writer w( "writer" ); + reader r( "reader" ); + + w.out( fifo ); + r.in( fifo ); + + // run the simulation + sc_start( 100, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_fifo/test02/golden/test02.log new file mode 100644 index 000000000..fc200328a --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test02/golden/test02.log @@ -0,0 +1,18 @@ +SystemC Simulation +print +dump +name = fifo_0 + +print +123 +dump +name = fifo_0 +value[0] = 123 + +print +123 +321 +dump +name = fifo_0 +value[0] = 123 +value[1] = 321 diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_fifo/test02/test02.cpp new file mode 100644 index 000000000..e41bc9a60 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test02/test02.cpp @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_fifo print() and dump() methods + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_fifo<int> a( 2 ); + + cout << "print\n"; + a.print( cout ); + cout << "dump\n"; + a.dump( cout ); + + cout << endl; + a.write( 123 ); + cout << "print\n"; + a.print( cout ); + cout << "dump\n"; + a.dump( cout ); + + cout << endl; + a.write( 321 ); + cout << "print\n"; + a.print( cout ); + cout << "dump\n"; + a.dump( cout ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test03/golden/test03.log b/src/systemc/tests/systemc/communication/sc_fifo/test03/golden/test03.log new file mode 100644 index 000000000..e259c8151 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test03/golden/test03.log @@ -0,0 +1,181 @@ +SystemC Simulation +writer: blocking write +reader: blocking read 1 +0 +1 +2 +3 +4 +5 +6 +7 +8 +9 +10 +11 +12 +13 +14 +writer: 5 free spaces +writer: non-blocking write +writer: waiting +reader: 5 available samples +reader: blocking read 2 +15 +16 +17 +18 +19 +20 +21 +22 +23 +24 +writer: waiting +26 +27 +28 +29 +30 +reader: 10 available samples +reader: non-blocking read +31 +32 +33 +34 +35 +37 +38 +39 +40 +41 +reader: waiting +writer: blocking write +reader: waiting +42 +43 +44 +45 +46 +reader: blocking read 1 +47 +48 +49 +50 +51 +52 +53 +54 +55 +56 +57 +58 +59 +60 +61 +writer: 10 free spaces +writer: non-blocking write +writer: waiting +reader: 0 available samples +reader: blocking read 2 +62 +63 +64 +65 +66 +67 +68 +69 +70 +71 +73 +74 +75 +76 +77 +writer: blocking write +reader: 5 available samples +reader: non-blocking read +78 +79 +80 +81 +82 +reader: waiting +83 +84 +85 +86 +87 +88 +89 +90 +91 +92 +reader: blocking read 1 +93 +94 +95 +96 +97 +98 +99 +100 +101 +102 +writer: 0 free spaces +writer: non-blocking write +writer: waiting +writer: waiting +104 +105 +106 +107 +108 +writer: waiting +writer: waiting +writer: waiting +writer: waiting +writer: waiting +writer: waiting +writer: waiting +writer: waiting +writer: waiting +reader: 10 available samples +reader: blocking read 2 +109 +110 +111 +112 +113 +115 +116 +117 +118 +119 +writer: waiting +130 +131 +132 +133 +134 +writer: blocking write +reader: 0 available samples +reader: non-blocking read +reader: waiting +135 +136 +137 +138 +139 +140 +141 +142 +143 +144 +reader: waiting +145 +146 +147 +148 +149 diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test03/test03.cpp b/src/systemc/tests/systemc/communication/sc_fifo/test03/test03.cpp new file mode 100644 index 000000000..da5a8faa0 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test03/test03.cpp @@ -0,0 +1,134 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_fifo ports - interface access shortcut methods + +#include "systemc.h" + +SC_MODULE( writer ) +{ + // port(s) + sc_fifo_out<int> out; + + // process(es) + void main_action() + { + int val = 0; + while( true ) { + wait( 10, SC_NS ); // wait for 10 ns + cout << "writer: blocking write\n"; + for( int i = 0; i < 20; i ++ ) { + out.write( val ++ ); // blocking write + } + wait( 10, SC_NS ); + cout << "writer: " << out.num_free() << " free spaces\n"; + cout << "writer: non-blocking write\n"; + for( int i = 0; i < 20; i ++ ) { + while( ! out.nb_write( val ++ ) ) { // non-blocking write + cout << "writer: waiting\n"; + wait( 1, SC_NS ); + } + } + } + } + + SC_CTOR( writer ) + { + SC_THREAD( main_action ); + } +}; + +SC_MODULE( reader ) +{ + // port(s) + sc_fifo_in<int> in; + + // process(es) + void main_action() + { + int val; + while( true ) { + wait( 10, SC_NS ); // wait for 10 ns + cout << "reader: blocking read 1\n"; + for( int i = 0; i < 15; i ++ ) { + in.read( val ); // blocking read + cout << val << endl; + } + wait( 10, SC_NS ); + cout << "reader: " << in.num_available() << " available samples\n"; + cout << "reader: blocking read 2\n"; + for( int i = 0; i < 15; i ++ ) { + cout << in.read() << endl; // blocking read + } + wait( 10, SC_NS ); + cout << "reader: " << in.num_available() << " available samples\n"; + cout << "reader: non-blocking read\n"; + for( int i = 0; i < 15; i ++ ) { + while( ! in.nb_read( val ) ) { // non-blocking read + cout << "reader: waiting\n"; + wait( 1, SC_NS ); + } + cout << val << endl; + } + } + } + + SC_CTOR( reader ) + { + SC_THREAD( main_action ); + } +}; + +int sc_main( int, char*[] ) +{ + // sc_clock c; + + // declare channel(s) + sc_fifo<int> fifo( 10 ); + + // instantiate block(s) and connect to channel(s) + writer w( "writer" ); + reader r( "reader" ); + + w.out( fifo ); + r.in( fifo ); + + // run the simulation + sc_start( 100, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test04/golden/test04.log b/src/systemc/tests/systemc/communication/sc_fifo/test04/golden/test04.log new file mode 100644 index 000000000..4c8333c81 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test04/golden/test04.log @@ -0,0 +1,185 @@ +SystemC Simulation +10 ns,1: writer: blocking write +10 ns,1: reader: blocking read 1 +10 ns,2: reader: 0 +10 ns,2: reader: 1 +10 ns,2: reader: 2 +10 ns,2: reader: 3 +10 ns,2: reader: 4 +10 ns,2: reader: 5 +10 ns,2: reader: 6 +10 ns,2: reader: 7 +10 ns,2: reader: 8 +10 ns,2: reader: 9 +10 ns,4: reader: 10 +10 ns,4: reader: 11 +10 ns,4: reader: 12 +10 ns,4: reader: 13 +10 ns,4: reader: 14 +20 ns,5: writer: 5 free spaces +20 ns,5: writer: non-blocking write +20 ns,5: writer: waiting +20 ns,5: reader: 5 available samples +20 ns,5: reader: blocking read 2 +20 ns,5: reader: 15 +20 ns,5: reader: 16 +20 ns,5: reader: 17 +20 ns,5: reader: 18 +20 ns,5: reader: 19 +20 ns,6: reader: 20 +20 ns,6: reader: 21 +20 ns,6: reader: 22 +20 ns,6: reader: 23 +20 ns,6: reader: 24 +20 ns,6: writer: data read event +20 ns,6: writer: waiting +20 ns,7: reader: 26 +20 ns,7: reader: 27 +20 ns,7: reader: 28 +20 ns,7: reader: 29 +20 ns,7: reader: 30 +20 ns,7: writer: data read event +20 ns,7: writer: waiting +20 ns,8: writer: data read event +30 ns,9: reader: 10 available samples +30 ns,9: reader: non-blocking read +30 ns,9: reader: 32 +30 ns,9: reader: 33 +30 ns,9: reader: 34 +30 ns,9: reader: 35 +30 ns,9: reader: 36 +30 ns,9: reader: 38 +30 ns,9: reader: 39 +30 ns,9: reader: 40 +30 ns,9: reader: 41 +30 ns,9: reader: 42 +30 ns,9: reader: waiting +30 ns,9: writer: blocking write +30 ns,11: reader: data written event +30 ns,11: reader: 43 +30 ns,11: reader: 44 +30 ns,11: reader: 45 +30 ns,11: reader: 46 +30 ns,11: reader: 47 +40 ns,13: reader: blocking read 1 +40 ns,13: reader: 48 +40 ns,13: reader: 49 +40 ns,13: reader: 50 +40 ns,13: reader: 51 +40 ns,13: reader: 52 +40 ns,13: reader: 53 +40 ns,13: reader: 54 +40 ns,13: reader: 55 +40 ns,13: reader: 56 +40 ns,13: reader: 57 +40 ns,15: reader: 58 +40 ns,15: reader: 59 +40 ns,15: reader: 60 +40 ns,15: reader: 61 +40 ns,15: reader: 62 +50 ns,16: writer: 10 free spaces +50 ns,16: writer: non-blocking write +50 ns,16: writer: waiting +50 ns,16: reader: 0 available samples +50 ns,16: reader: blocking read 2 +50 ns,17: reader: 63 +50 ns,17: reader: 64 +50 ns,17: reader: 65 +50 ns,17: reader: 66 +50 ns,17: reader: 67 +50 ns,17: reader: 68 +50 ns,17: reader: 69 +50 ns,17: reader: 70 +50 ns,17: reader: 71 +50 ns,17: reader: 72 +50 ns,18: writer: data read event +50 ns,19: reader: 74 +50 ns,19: reader: 75 +50 ns,19: reader: 76 +50 ns,19: reader: 77 +50 ns,19: reader: 78 +60 ns,20: writer: blocking write +60 ns,20: reader: 5 available samples +60 ns,20: reader: non-blocking read +60 ns,20: reader: 79 +60 ns,20: reader: 80 +60 ns,20: reader: 81 +60 ns,20: reader: 82 +60 ns,20: reader: 83 +60 ns,20: reader: waiting +60 ns,21: reader: data written event +60 ns,21: reader: 84 +60 ns,21: reader: 85 +60 ns,21: reader: 86 +60 ns,21: reader: 87 +60 ns,21: reader: 88 +60 ns,21: reader: waiting +60 ns,22: reader: data written event +60 ns,22: reader: 89 +60 ns,22: reader: 90 +60 ns,22: reader: 91 +60 ns,22: reader: 92 +60 ns,22: reader: 93 +70 ns,24: reader: blocking read 1 +70 ns,24: reader: 94 +70 ns,24: reader: 95 +70 ns,24: reader: 96 +70 ns,24: reader: 97 +70 ns,24: reader: 98 +70 ns,24: reader: 99 +70 ns,24: reader: 100 +70 ns,24: reader: 101 +70 ns,24: reader: 102 +70 ns,24: reader: 103 +70 ns,24: writer: 0 free spaces +70 ns,24: writer: non-blocking write +70 ns,24: writer: waiting +70 ns,25: writer: data read event +70 ns,25: writer: waiting +70 ns,26: reader: 105 +70 ns,26: reader: 106 +70 ns,26: reader: 107 +70 ns,26: reader: 108 +70 ns,26: reader: 109 +70 ns,27: writer: data read event +70 ns,27: writer: waiting +80 ns,28: reader: 10 available samples +80 ns,28: reader: blocking read 2 +80 ns,28: reader: 110 +80 ns,28: reader: 111 +80 ns,28: reader: 112 +80 ns,28: reader: 113 +80 ns,28: reader: 114 +80 ns,28: reader: 116 +80 ns,28: reader: 117 +80 ns,28: reader: 118 +80 ns,28: reader: 119 +80 ns,28: reader: 120 +80 ns,29: writer: data read event +80 ns,30: reader: 122 +80 ns,30: reader: 123 +80 ns,30: reader: 124 +80 ns,30: reader: 125 +80 ns,30: reader: 126 +90 ns,31: writer: blocking write +90 ns,31: reader: 0 available samples +90 ns,31: reader: non-blocking read +90 ns,31: reader: waiting +90 ns,32: reader: data written event +90 ns,32: reader: 127 +90 ns,32: reader: 128 +90 ns,32: reader: 129 +90 ns,32: reader: 130 +90 ns,32: reader: 131 +90 ns,32: reader: 132 +90 ns,32: reader: 133 +90 ns,32: reader: 134 +90 ns,32: reader: 135 +90 ns,32: reader: 136 +90 ns,32: reader: waiting +90 ns,34: reader: data written event +90 ns,34: reader: 137 +90 ns,34: reader: 138 +90 ns,34: reader: 139 +90 ns,34: reader: 140 +90 ns,34: reader: 141 diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test04/test04.cpp b/src/systemc/tests/systemc/communication/sc_fifo/test04/test04.cpp new file mode 100644 index 000000000..be6ee57c5 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test04/test04.cpp @@ -0,0 +1,145 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-03-23 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_fifo events + +#include "systemc.h" + +#define W_INFO(msg) \ + cout << sc_time_stamp() << "," << sc_delta_count() \ + << ": writer: " << msg << endl; + +#define R_INFO(msg) \ + cout << sc_time_stamp() << "," << sc_delta_count() \ + << ": reader: " << msg << endl; + +SC_MODULE( writer ) +{ + // port(s) + sc_fifo_out<int> out; + + // process(es) + void main_action() + { + int val = 0; + while( true ) { + wait( 10, SC_NS ); // wait for 10 ns + W_INFO( "blocking write" ); + for( int i = 0; i < 20; i ++ ) { + out.write( val ++ ); // blocking write + } + wait( 10, SC_NS ); + W_INFO( out.num_free() << " free spaces" ); + W_INFO( "non-blocking write" ); + for( int i = 0; i < 20; i ++ ) { + while( ! out.nb_write( val ++ ) ) { // non-blocking write + W_INFO( "waiting" ); + wait( out.data_read_event() ); + W_INFO( "data read event" ); + } + } + } + } + + SC_CTOR( writer ) + { + SC_THREAD( main_action ); + } +}; + +SC_MODULE( reader ) +{ + // port(s) + sc_fifo_in<int> in; + + // process(es) + void main_action() + { + int val; + while( true ) { + wait( 10, SC_NS ); // wait for 10 ns + R_INFO( "blocking read 1" ); + for( int i = 0; i < 15; i ++ ) { + in.read( val ); // blocking read + R_INFO( val ); + } + wait( 10, SC_NS ); + R_INFO( in.num_available() << " available samples" ); + R_INFO( "blocking read 2" ); + for( int i = 0; i < 15; i ++ ) { + val = in.read(); // blocking read + R_INFO( val ); + } + wait( 10, SC_NS ); + R_INFO( in.num_available() << " available samples" ); + R_INFO( "non-blocking read" ); + for( int i = 0; i < 15; i ++ ) { + while( ! in.nb_read( val ) ) { // non-blocking read + R_INFO( "waiting" ); + wait( in.data_written_event() ); + R_INFO( "data written event" ); + } + R_INFO( val ); + } + } + } + + SC_CTOR( reader ) + { + SC_THREAD( main_action ); + } +}; + +int sc_main( int, char*[] ) +{ + // sc_clock c; + + // declare channel(s) + sc_fifo<int> fifo( 10 ); + + // instantiate block(s) and connect to channel(s) + writer w( "writer" ); + reader r( "reader" ); + + w.out( fifo ); + r.in( fifo ); + + // run the simulation + sc_start( 100, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test05/golden/test05.log b/src/systemc/tests/systemc/communication/sc_fifo/test05/golden/test05.log new file mode 100644 index 000000000..4c8333c81 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test05/golden/test05.log @@ -0,0 +1,185 @@ +SystemC Simulation +10 ns,1: writer: blocking write +10 ns,1: reader: blocking read 1 +10 ns,2: reader: 0 +10 ns,2: reader: 1 +10 ns,2: reader: 2 +10 ns,2: reader: 3 +10 ns,2: reader: 4 +10 ns,2: reader: 5 +10 ns,2: reader: 6 +10 ns,2: reader: 7 +10 ns,2: reader: 8 +10 ns,2: reader: 9 +10 ns,4: reader: 10 +10 ns,4: reader: 11 +10 ns,4: reader: 12 +10 ns,4: reader: 13 +10 ns,4: reader: 14 +20 ns,5: writer: 5 free spaces +20 ns,5: writer: non-blocking write +20 ns,5: writer: waiting +20 ns,5: reader: 5 available samples +20 ns,5: reader: blocking read 2 +20 ns,5: reader: 15 +20 ns,5: reader: 16 +20 ns,5: reader: 17 +20 ns,5: reader: 18 +20 ns,5: reader: 19 +20 ns,6: reader: 20 +20 ns,6: reader: 21 +20 ns,6: reader: 22 +20 ns,6: reader: 23 +20 ns,6: reader: 24 +20 ns,6: writer: data read event +20 ns,6: writer: waiting +20 ns,7: reader: 26 +20 ns,7: reader: 27 +20 ns,7: reader: 28 +20 ns,7: reader: 29 +20 ns,7: reader: 30 +20 ns,7: writer: data read event +20 ns,7: writer: waiting +20 ns,8: writer: data read event +30 ns,9: reader: 10 available samples +30 ns,9: reader: non-blocking read +30 ns,9: reader: 32 +30 ns,9: reader: 33 +30 ns,9: reader: 34 +30 ns,9: reader: 35 +30 ns,9: reader: 36 +30 ns,9: reader: 38 +30 ns,9: reader: 39 +30 ns,9: reader: 40 +30 ns,9: reader: 41 +30 ns,9: reader: 42 +30 ns,9: reader: waiting +30 ns,9: writer: blocking write +30 ns,11: reader: data written event +30 ns,11: reader: 43 +30 ns,11: reader: 44 +30 ns,11: reader: 45 +30 ns,11: reader: 46 +30 ns,11: reader: 47 +40 ns,13: reader: blocking read 1 +40 ns,13: reader: 48 +40 ns,13: reader: 49 +40 ns,13: reader: 50 +40 ns,13: reader: 51 +40 ns,13: reader: 52 +40 ns,13: reader: 53 +40 ns,13: reader: 54 +40 ns,13: reader: 55 +40 ns,13: reader: 56 +40 ns,13: reader: 57 +40 ns,15: reader: 58 +40 ns,15: reader: 59 +40 ns,15: reader: 60 +40 ns,15: reader: 61 +40 ns,15: reader: 62 +50 ns,16: writer: 10 free spaces +50 ns,16: writer: non-blocking write +50 ns,16: writer: waiting +50 ns,16: reader: 0 available samples +50 ns,16: reader: blocking read 2 +50 ns,17: reader: 63 +50 ns,17: reader: 64 +50 ns,17: reader: 65 +50 ns,17: reader: 66 +50 ns,17: reader: 67 +50 ns,17: reader: 68 +50 ns,17: reader: 69 +50 ns,17: reader: 70 +50 ns,17: reader: 71 +50 ns,17: reader: 72 +50 ns,18: writer: data read event +50 ns,19: reader: 74 +50 ns,19: reader: 75 +50 ns,19: reader: 76 +50 ns,19: reader: 77 +50 ns,19: reader: 78 +60 ns,20: writer: blocking write +60 ns,20: reader: 5 available samples +60 ns,20: reader: non-blocking read +60 ns,20: reader: 79 +60 ns,20: reader: 80 +60 ns,20: reader: 81 +60 ns,20: reader: 82 +60 ns,20: reader: 83 +60 ns,20: reader: waiting +60 ns,21: reader: data written event +60 ns,21: reader: 84 +60 ns,21: reader: 85 +60 ns,21: reader: 86 +60 ns,21: reader: 87 +60 ns,21: reader: 88 +60 ns,21: reader: waiting +60 ns,22: reader: data written event +60 ns,22: reader: 89 +60 ns,22: reader: 90 +60 ns,22: reader: 91 +60 ns,22: reader: 92 +60 ns,22: reader: 93 +70 ns,24: reader: blocking read 1 +70 ns,24: reader: 94 +70 ns,24: reader: 95 +70 ns,24: reader: 96 +70 ns,24: reader: 97 +70 ns,24: reader: 98 +70 ns,24: reader: 99 +70 ns,24: reader: 100 +70 ns,24: reader: 101 +70 ns,24: reader: 102 +70 ns,24: reader: 103 +70 ns,24: writer: 0 free spaces +70 ns,24: writer: non-blocking write +70 ns,24: writer: waiting +70 ns,25: writer: data read event +70 ns,25: writer: waiting +70 ns,26: reader: 105 +70 ns,26: reader: 106 +70 ns,26: reader: 107 +70 ns,26: reader: 108 +70 ns,26: reader: 109 +70 ns,27: writer: data read event +70 ns,27: writer: waiting +80 ns,28: reader: 10 available samples +80 ns,28: reader: blocking read 2 +80 ns,28: reader: 110 +80 ns,28: reader: 111 +80 ns,28: reader: 112 +80 ns,28: reader: 113 +80 ns,28: reader: 114 +80 ns,28: reader: 116 +80 ns,28: reader: 117 +80 ns,28: reader: 118 +80 ns,28: reader: 119 +80 ns,28: reader: 120 +80 ns,29: writer: data read event +80 ns,30: reader: 122 +80 ns,30: reader: 123 +80 ns,30: reader: 124 +80 ns,30: reader: 125 +80 ns,30: reader: 126 +90 ns,31: writer: blocking write +90 ns,31: reader: 0 available samples +90 ns,31: reader: non-blocking read +90 ns,31: reader: waiting +90 ns,32: reader: data written event +90 ns,32: reader: 127 +90 ns,32: reader: 128 +90 ns,32: reader: 129 +90 ns,32: reader: 130 +90 ns,32: reader: 131 +90 ns,32: reader: 132 +90 ns,32: reader: 133 +90 ns,32: reader: 134 +90 ns,32: reader: 135 +90 ns,32: reader: 136 +90 ns,32: reader: waiting +90 ns,34: reader: data written event +90 ns,34: reader: 137 +90 ns,34: reader: 138 +90 ns,34: reader: 139 +90 ns,34: reader: 140 +90 ns,34: reader: 141 diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test05/test05.cpp b/src/systemc/tests/systemc/communication/sc_fifo/test05/test05.cpp new file mode 100644 index 000000000..cbc5db975 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test05/test05.cpp @@ -0,0 +1,147 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test05.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-03-23 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_fifo event finders + +#include "systemc.h" + +#define W_INFO(msg) \ + cout << sc_time_stamp() << "," << sc_delta_count() \ + << ": writer: " << msg << endl; + +#define R_INFO(msg) \ + cout << sc_time_stamp() << "," << sc_delta_count() \ + << ": reader: " << msg << endl; + +SC_MODULE( writer ) +{ + // port(s) + sc_fifo_out<int> out; + + // process(es) + void main_action() + { + int val = 0; + while( true ) { + wait( 10, SC_NS ); // wait for 10 ns + W_INFO( "blocking write" ); + for( int i = 0; i < 20; i ++ ) { + out.write( val ++ ); // blocking write + } + wait( 10, SC_NS ); + W_INFO( out.num_free() << " free spaces" ); + W_INFO( "non-blocking write" ); + for( int i = 0; i < 20; i ++ ) { + while( ! out.nb_write( val ++ ) ) { // non-blocking write + W_INFO( "waiting" ); + wait(); + W_INFO( "data read event" ); + } + } + } + } + + SC_CTOR( writer ) + { + SC_THREAD( main_action ); + sensitive << out.data_read(); + } +}; + +SC_MODULE( reader ) +{ + // port(s) + sc_fifo_in<int> in; + + // process(es) + void main_action() + { + int val; + while( true ) { + wait( 10, SC_NS ); // wait for 10 ns + R_INFO( "blocking read 1" ); + for( int i = 0; i < 15; i ++ ) { + in.read( val ); // blocking read + R_INFO( val ); + } + wait( 10, SC_NS ); + R_INFO( in.num_available() << " available samples" ); + R_INFO( "blocking read 2" ); + for( int i = 0; i < 15; i ++ ) { + val = in.read(); // blocking read + R_INFO( val ); + } + wait( 10, SC_NS ); + R_INFO( in.num_available() << " available samples" ); + R_INFO( "non-blocking read" ); + for( int i = 0; i < 15; i ++ ) { + while( ! in.nb_read( val ) ) { // non-blocking read + R_INFO( "waiting" ); + wait(); + R_INFO( "data written event" ); + } + R_INFO( val ); + } + } + } + + SC_CTOR( reader ) + { + SC_THREAD( main_action ); + sensitive << in.data_written(); + } +}; + +int sc_main( int, char*[] ) +{ + // sc_clock c; + + // declare channel(s) + sc_fifo<int> fifo( 10 ); + + // instantiate block(s) and connect to channel(s) + writer w( "writer" ); + reader r( "reader" ); + + w.out( fifo ); + r.in( fifo ); + + // run the simulation + sc_start( 100, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test06/golden/test06.log b/src/systemc/tests/systemc/communication/sc_fifo/test06/golden/test06.log new file mode 100644 index 000000000..273d16efc --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test06/golden/test06.log @@ -0,0 +1,130 @@ +SystemC Simulation +10 ns,1: writer0: blocking write +10 ns,1: reader0: blocking read 1 +10 ns,2: reader0: 0 +10 ns,2: reader0: 1 +10 ns,2: reader0: 2 +10 ns,2: reader0: 3 +10 ns,2: reader0: 4 +10 ns,2: reader0: 5 +10 ns,2: reader0: 6 +10 ns,2: reader0: 7 +10 ns,2: reader0: 8 +10 ns,2: reader0: 9 +10 ns,3: writer1: blocking write +10 ns,4: reader0: 10 +10 ns,4: reader0: 11 +10 ns,4: reader0: 12 +10 ns,4: reader0: 13 +10 ns,4: reader0: 14 +10 ns,4: reader1: blocking read 1 +10 ns,4: reader1: 20 +10 ns,4: reader1: 21 +10 ns,4: reader1: 22 +10 ns,4: reader1: 23 +10 ns,4: reader1: 24 +10 ns,4: reader1: 25 +10 ns,4: reader1: 26 +10 ns,4: reader1: 27 +10 ns,4: reader1: 28 +10 ns,4: reader1: 29 +10 ns,5: writer2: blocking write +10 ns,6: reader1: 30 +10 ns,6: reader1: 31 +10 ns,6: reader1: 32 +10 ns,6: reader1: 33 +10 ns,6: reader1: 34 +10 ns,6: reader2: blocking read 1 +10 ns,6: reader2: 40 +10 ns,6: reader2: 41 +10 ns,6: reader2: 42 +10 ns,6: reader2: 43 +10 ns,6: reader2: 44 +10 ns,6: reader2: 45 +10 ns,6: reader2: 46 +10 ns,6: reader2: 47 +10 ns,6: reader2: 48 +10 ns,6: reader2: 49 +10 ns,8: reader2: 50 +10 ns,8: reader2: 51 +10 ns,8: reader2: 52 +10 ns,8: reader2: 53 +10 ns,8: reader2: 54 +20 ns,9: writer0: blocking write +20 ns,9: reader3: 5 available samples +20 ns,9: reader3: blocking read 2 +20 ns,9: reader0: 15 +20 ns,9: reader0: 16 +20 ns,9: reader0: 17 +20 ns,9: reader0: 18 +20 ns,9: reader0: 19 +20 ns,10: reader0: 60 +20 ns,10: reader0: 61 +20 ns,10: reader0: 62 +20 ns,10: reader0: 63 +20 ns,10: reader0: 64 +20 ns,11: reader0: 65 +20 ns,11: reader0: 66 +20 ns,11: reader0: 67 +20 ns,11: reader0: 68 +20 ns,11: reader0: 69 +20 ns,11: reader1: 35 +20 ns,11: reader1: 36 +20 ns,11: reader1: 37 +20 ns,11: reader1: 38 +20 ns,11: reader1: 39 +20 ns,12: writer1: blocking write +20 ns,13: reader1: 80 +20 ns,13: reader1: 81 +20 ns,13: reader1: 82 +20 ns,13: reader1: 83 +20 ns,13: reader1: 84 +20 ns,13: reader1: 85 +20 ns,13: reader1: 86 +20 ns,13: reader1: 87 +20 ns,13: reader1: 88 +20 ns,13: reader1: 89 +20 ns,13: reader2: 55 +20 ns,13: reader2: 56 +20 ns,13: reader2: 57 +20 ns,13: reader2: 58 +20 ns,13: reader2: 59 +20 ns,14: writer2: blocking write +20 ns,15: reader2: 100 +20 ns,15: reader2: 101 +20 ns,15: reader2: 102 +20 ns,15: reader2: 103 +20 ns,15: reader2: 104 +20 ns,15: reader2: 105 +20 ns,15: reader2: 106 +20 ns,15: reader2: 107 +20 ns,15: reader2: 108 +20 ns,15: reader2: 109 +30 ns,17: reader0: blocking read 1 +30 ns,17: reader0: 70 +30 ns,17: reader0: 71 +30 ns,17: reader0: 72 +30 ns,17: reader0: 73 +30 ns,17: reader0: 74 +30 ns,17: reader0: 75 +30 ns,17: reader0: 76 +30 ns,17: reader0: 77 +30 ns,17: reader0: 78 +30 ns,17: reader0: 79 +30 ns,17: writer0: blocking write +30 ns,19: reader0: 120 +30 ns,19: reader0: 121 +30 ns,19: reader0: 122 +30 ns,19: reader0: 123 +30 ns,19: reader0: 124 +30 ns,19: reader1: blocking read 1 +30 ns,19: reader1: 90 +30 ns,19: reader1: 91 +30 ns,19: reader1: 92 +30 ns,19: reader1: 93 +30 ns,19: reader1: 94 +30 ns,19: reader1: 95 +30 ns,19: reader1: 96 +30 ns,19: reader1: 97 +30 ns,19: reader1: 98 +30 ns,19: reader1: 99 diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test06/test06.cpp b/src/systemc/tests/systemc/communication/sc_fifo/test06/test06.cpp new file mode 100644 index 000000000..bc2c34f89 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test06/test06.cpp @@ -0,0 +1,142 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test06.cpp -- test multiple interfaces + + Original Author: Andy Goodrich, Forte Design Systems, 03 April 2007 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of multiple interfaces for an sc_fifo + +#include "systemc.h" + +#define W_INFO(msg,iface) \ + cout << sc_time_stamp() << "," << sc_delta_count() \ + << ": writer" << iface << ": " << msg << endl; + +#define R_INFO(msg,iface) \ + cout << sc_time_stamp() << "," << sc_delta_count() \ + << ": reader" << iface << ": " << msg << endl; + +SC_MODULE( writer ) +{ + // port(s) + sc_fifo_out<int> out; + + // process(es) + void main_action() + { + int val = 0; + while( true ) { + wait( 10, SC_NS ); // wait for 10 ns + for ( int iface=0; iface < 3; iface++ ) + { + W_INFO( "blocking write", iface ); + for( int i = 0; i < 20; i ++ ) { + out[iface]->write( val ++ ); // blocking write + } + } + } + } + + SC_CTOR( writer ) + { + SC_THREAD( main_action ); + sensitive << out.data_read(); + } +}; + +SC_MODULE( reader ) +{ + // port(s) + sc_fifo_in<int> in; + + // process(es) + void main_action() + { + int iface; + int val; + while( true ) { + wait( 10, SC_NS ); // wait for 10 ns + for ( iface=0; iface < 3; iface++ ) + { + R_INFO( "blocking read 1", iface ); + for( int i = 0; i < 15; i ++ ) { + in[iface]->read( val ); // blocking read + R_INFO( val, iface ); + } + } + wait( 10, SC_NS ); + R_INFO( in.num_available() << " available samples", iface ); + R_INFO( "blocking read 2", iface ); + for ( iface=0; iface < 3; iface++ ) + { + for( int i = 0; i < 15; i ++ ) { + val = in[iface]->read(); // blocking read + R_INFO( val, iface ); + } + } + } + } + + SC_CTOR( reader ) + { + SC_THREAD( main_action ); + sensitive << in.data_written(); + } +}; + +int sc_main( int, char*[] ) +{ + // sc_clock c; + + // declare channel(s) + sc_fifo<int> fifo( 10 ); + sc_fifo<int> fifo1( 10 ); + sc_fifo<int> fifo2( 10 ); + + // instantiate block(s) and connect to channel(s) + writer w( "writer" ); + reader r( "reader" ); + + w.out( fifo ); + w.out( fifo1 ); + w.out( fifo2 ); + r.in( fifo ); + r.in( fifo1 ); + r.in( fifo2 ); + + // run the simulation + sc_start( 100, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_interface/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_interface/test01/golden/test01.log new file mode 100644 index 000000000..fa93f8ad4 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_interface/test01/golden/test01.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Warning: (W116) channel doesn't have a default event +In file: <removed by verify.pl> diff --git a/src/systemc/tests/systemc/communication/sc_interface/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_interface/test01/test01.cpp new file mode 100644 index 000000000..e882848b1 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_interface/test01/test01.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// sc_interface test; +// get warning if default_event is called and not redefined + +#include "systemc.h" + +class channel +: virtual public sc_interface +{}; + +int +sc_main( int, char*[] ) +{ + channel c; + + c.default_event(); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_mutex/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_mutex/test01/golden/test01.log new file mode 100644 index 000000000..3522def1e --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_mutex/test01/golden/test01.log @@ -0,0 +1,48 @@ +SystemC Simulation +1 ns proc_a - lock requested +1 ns proc_a - lock obtained +2 ns proc_b - lock requested +3 ns proc_a - unlock successful +3 ns proc_b - lock obtained +6 ns proc_a - trylock failed +6 ns proc_a - unlock failed +7 ns proc_b - unlock successful +7 ns proc_a - lock requested +7 ns proc_a - lock obtained +9 ns proc_a - unlock successful +10 ns proc_b - trylock successful +10 ns proc_b - unlock successful +12 ns proc_a - trylock successful +12 ns proc_a - unlock successful +12 ns proc_b - lock requested +12 ns proc_b - lock obtained +13 ns proc_a - lock requested +16 ns proc_b - unlock successful +16 ns proc_a - lock obtained +18 ns proc_a - unlock successful +19 ns proc_b - trylock successful +19 ns proc_b - unlock successful +21 ns proc_a - trylock successful +21 ns proc_a - unlock successful +21 ns proc_b - lock requested +21 ns proc_b - lock obtained +22 ns proc_a - lock requested +25 ns proc_b - unlock successful +25 ns proc_a - lock obtained +27 ns proc_a - unlock successful +28 ns proc_b - trylock successful +28 ns proc_b - unlock successful +30 ns proc_a - trylock successful +30 ns proc_a - unlock successful +30 ns proc_b - lock requested +30 ns proc_b - lock obtained +31 ns proc_a - lock requested +34 ns proc_b - unlock successful +34 ns proc_a - lock obtained +36 ns proc_a - unlock successful +37 ns proc_b - trylock successful +37 ns proc_b - unlock successful +39 ns proc_a - trylock successful +39 ns proc_a - unlock successful +39 ns proc_b - lock requested +39 ns proc_b - lock obtained diff --git a/src/systemc/tests/systemc/communication/sc_mutex/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_mutex/test01/test01.cpp new file mode 100644 index 000000000..a27a16e56 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_mutex/test01/test01.cpp @@ -0,0 +1,120 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of the sc_mutex primitive channel + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_mutex mutex; + + void write( const char* msg ) + { + cout << sc_time_stamp() << " " << msg << endl; + } + + void proc_a() + { + while( true ) { + wait( 1, SC_NS ); + write( "proc_a - lock requested" ); + mutex.lock(); + write( "proc_a - lock obtained" ); + wait( 2, SC_NS ); + if( mutex.unlock() == 0 ) { + write( "proc_a - unlock successful" ); + } else { + write( "proc_a - unlock failed" ); + } + wait( 3, SC_NS ); + if( mutex.trylock() == 0 ) { + write( "proc_a - trylock successful" ); + } else { + write( "proc_a - trylock failed" ); + } + if( mutex.unlock() == 0 ) { + write( "proc_a - unlock successful" ); + } else { + write( "proc_a - unlock failed" ); + } + } + } + + void proc_b() + { + while( true ) { + wait( 2, SC_NS ); + write( "proc_b - lock requested" ); + mutex.lock(); + write( "proc_b - lock obtained" ); + wait( 4, SC_NS ); + if( mutex.unlock() == 0 ) { + write( "proc_b - unlock successful" ); + } else { + write( "proc_b - unlock failed" ); + } + wait( 3, SC_NS ); + if( mutex.trylock() == 0 ) { + write( "proc_b - trylock successful" ); + } else { + write( "proc_b - trylock failed" ); + } + if( mutex.unlock() == 0 ) { + write( "proc_b - unlock successful" ); + } else { + write( "proc_b - unlock failed" ); + } + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( proc_a ); + SC_THREAD( proc_b ); + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + + sc_start( 40, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_mutex/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_mutex/test02/golden/test02.log new file mode 100644 index 000000000..3522def1e --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_mutex/test02/golden/test02.log @@ -0,0 +1,48 @@ +SystemC Simulation +1 ns proc_a - lock requested +1 ns proc_a - lock obtained +2 ns proc_b - lock requested +3 ns proc_a - unlock successful +3 ns proc_b - lock obtained +6 ns proc_a - trylock failed +6 ns proc_a - unlock failed +7 ns proc_b - unlock successful +7 ns proc_a - lock requested +7 ns proc_a - lock obtained +9 ns proc_a - unlock successful +10 ns proc_b - trylock successful +10 ns proc_b - unlock successful +12 ns proc_a - trylock successful +12 ns proc_a - unlock successful +12 ns proc_b - lock requested +12 ns proc_b - lock obtained +13 ns proc_a - lock requested +16 ns proc_b - unlock successful +16 ns proc_a - lock obtained +18 ns proc_a - unlock successful +19 ns proc_b - trylock successful +19 ns proc_b - unlock successful +21 ns proc_a - trylock successful +21 ns proc_a - unlock successful +21 ns proc_b - lock requested +21 ns proc_b - lock obtained +22 ns proc_a - lock requested +25 ns proc_b - unlock successful +25 ns proc_a - lock obtained +27 ns proc_a - unlock successful +28 ns proc_b - trylock successful +28 ns proc_b - unlock successful +30 ns proc_a - trylock successful +30 ns proc_a - unlock successful +30 ns proc_b - lock requested +30 ns proc_b - lock obtained +31 ns proc_a - lock requested +34 ns proc_b - unlock successful +34 ns proc_a - lock obtained +36 ns proc_a - unlock successful +37 ns proc_b - trylock successful +37 ns proc_b - unlock successful +39 ns proc_a - trylock successful +39 ns proc_a - unlock successful +39 ns proc_b - lock requested +39 ns proc_b - lock obtained diff --git a/src/systemc/tests/systemc/communication/sc_mutex/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_mutex/test02/test02.cpp new file mode 100644 index 000000000..52050f933 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_mutex/test02/test02.cpp @@ -0,0 +1,139 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of the sc_mutex_if interface + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_port<sc_mutex_if> mutex; + + void write( const char* msg ) + { + cout << sc_time_stamp() << " " << msg << endl; + } + + void proc_a() + { + while( true ) { + wait( 1, SC_NS ); + write( "proc_a - lock requested" ); + mutex->lock(); + write( "proc_a - lock obtained" ); + wait( 2, SC_NS ); + if( mutex->unlock() == 0 ) { + write( "proc_a - unlock successful" ); + } else { + write( "proc_a - unlock failed" ); + } + wait( 3, SC_NS ); + if( mutex->trylock() == 0 ) { + write( "proc_a - trylock successful" ); + } else { + write( "proc_a - trylock failed" ); + } + if( mutex->unlock() == 0 ) { + write( "proc_a - unlock successful" ); + } else { + write( "proc_a - unlock failed" ); + } + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( proc_a ); + } +}; + +SC_MODULE( mod_b ) +{ + sc_port<sc_mutex_if> mutex; + + void write( const char* msg ) + { + cout << sc_time_stamp() << " " << msg << endl; + } + + void proc_b() + { + while( true ) { + wait( 2, SC_NS ); + write( "proc_b - lock requested" ); + mutex->lock(); + write( "proc_b - lock obtained" ); + wait( 4, SC_NS ); + if( mutex->unlock() == 0 ) { + write( "proc_b - unlock successful" ); + } else { + write( "proc_b - unlock failed" ); + } + wait( 3, SC_NS ); + if( mutex->trylock() == 0 ) { + write( "proc_b - trylock successful" ); + } else { + write( "proc_b - trylock failed" ); + } + if( mutex->unlock() == 0 ) { + write( "proc_b - unlock successful" ); + } else { + write( "proc_b - unlock failed" ); + } + } + } + + SC_CTOR( mod_b ) + { + SC_THREAD( proc_b ); + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + mod_b b( "b" ); + sc_mutex mutex( "mutex" ); + + a.mutex( mutex ); + b.mutex( mutex ); + + sc_start( 40, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_port_policy/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_port_policy/test01/golden/test01.log new file mode 100644 index 000000000..b5ba39034 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_port_policy/test01/golden/test01.log @@ -0,0 +1,13 @@ +SystemC Simulation +1 ns: + all[0] = 1 + all[1] = 0 + one = 1 +2 ns: + all[0] = 1 + all[1] = 1 + one = 1 +3 ns: + all[0] = 0 + all[1] = 0 + one = 0 diff --git a/src/systemc/tests/systemc/communication/sc_port_policy/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_port_policy/test01/test01.cpp new file mode 100644 index 000000000..30afd975e --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_port_policy/test01/test01.cpp @@ -0,0 +1,100 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- Test bind policy: unbound port. + + Original Author: Andy Goodrich, Forte Design Systems, 02 September 2005 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include <systemc.h> + +// #define ALL_ERROR // Force error on all bound port. +// #define BIND_NONE // Bind port with zero or more bound. +// #define ONE_ERROR // Force error on one or more bound port. + +SC_MODULE(TB) +{ + SC_CTOR(TB) : m_all("all"), m_none("none"), m_one("one") + { + SC_CTHREAD(thread, m_clk.pos()); + } + void thread() + { + for (;;) + { + wait(); + cout << sc_time_stamp() << ":" << endl; + cout << " all[0] = " << m_all[0]->read() << endl; + cout << " all[1] = " << m_all[1]->read() << endl; + cout << " one = " << m_one->read() << endl; +# if defined(BIND_NONE) + cout << " none = " << m_none->read() << endl; +# endif + } + } + sc_port<sc_signal_in_if<bool>,2,SC_ALL_BOUND> m_all; + sc_in<bool> m_clk; + sc_port<sc_signal_in_if<bool>,2,SC_ZERO_OR_MORE_BOUND> m_none; + sc_port<sc_signal_in_if<bool>,2,SC_ONE_OR_MORE_BOUND> m_one; +}; + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> sig1; + sc_signal<bool> sig2; + + TB tb("tb"); + + tb.m_clk(clock); + +# if !defined(ONE_ERROR) + tb.m_one(sig1); +# endif +# if defined(BIND_NONE) + tb.m_none(sig2); +# endif + tb.m_all(sig1); +# if !defined(ALL_ERROR) + tb.m_all(sig2); +# endif + + sc_start(1, SC_NS); + sig1 = true; + sc_start(1, SC_NS); + sig2 = true; + sc_start(1, SC_NS); + sig1 = false; + sig2 = false; + sc_start(1, SC_NS); + return 0; +} + diff --git a/src/systemc/tests/systemc/communication/sc_port_policy/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_port_policy/test02/golden/test02.log new file mode 100644 index 000000000..53354e74d --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_port_policy/test02/golden/test02.log @@ -0,0 +1,16 @@ +SystemC Simulation +1 ns: + all[0] = 1 + all[1] = 0 + one = 1 + none = 0 +2 ns: + all[0] = 1 + all[1] = 1 + one = 1 + none = 1 +3 ns: + all[0] = 0 + all[1] = 0 + one = 0 + none = 0 diff --git a/src/systemc/tests/systemc/communication/sc_port_policy/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_port_policy/test02/test02.cpp new file mode 100644 index 000000000..4a7ef1e38 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_port_policy/test02/test02.cpp @@ -0,0 +1,100 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- Test bind policy: none port bound. + + Original Author: Andy Goodrich, Forte Design Systems, 02 September 2005 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include <systemc.h> + +// #define ALL_ERROR // Force error on all bound port. +#define BIND_NONE // Bind port with zero or more bound. +// #define ONE_ERROR // Force error on one or more bound port. + +SC_MODULE(TB) +{ + SC_CTOR(TB) : m_all("all"), m_none("none"), m_one("one") + { + SC_CTHREAD(thread, m_clk.pos()); + } + void thread() + { + for (;;) + { + wait(); + cout << sc_time_stamp() << ":" << endl; + cout << " all[0] = " << m_all[0]->read() << endl; + cout << " all[1] = " << m_all[1]->read() << endl; + cout << " one = " << m_one->read() << endl; +# if defined(BIND_NONE) + cout << " none = " << m_none->read() << endl; +# endif + } + } + sc_port<sc_signal_in_if<bool>,2,SC_ALL_BOUND> m_all; + sc_in<bool> m_clk; + sc_port<sc_signal_in_if<bool>,2,SC_ZERO_OR_MORE_BOUND> m_none; + sc_port<sc_signal_in_if<bool>,2,SC_ONE_OR_MORE_BOUND> m_one; +}; + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> sig1; + sc_signal<bool> sig2; + + TB tb("tb"); + + tb.m_clk(clock); + +# if !defined(ONE_ERROR) + tb.m_one(sig1); +# endif +# if defined(BIND_NONE) + tb.m_none(sig2); +# endif + tb.m_all(sig1); +# if !defined(ALL_ERROR) + tb.m_all(sig2); +# endif + + sc_start(1, SC_NS); + sig1 = true; + sc_start(1, SC_NS); + sig2 = true; + sc_start(1, SC_NS); + sig1 = false; + sig2 = false; + sc_start(1, SC_NS); + return 0; +} + diff --git a/src/systemc/tests/systemc/communication/sc_port_policy/test03/golden/test03.log b/src/systemc/tests/systemc/communication/sc_port_policy/test03/golden/test03.log new file mode 100644 index 000000000..2119b4e08 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_port_policy/test03/golden/test03.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E109) complete binding failed: port not bound: port 'tb.one' (sc_port) +In file: <removed by verify.pl> diff --git a/src/systemc/tests/systemc/communication/sc_port_policy/test03/test03.cpp b/src/systemc/tests/systemc/communication/sc_port_policy/test03/test03.cpp new file mode 100644 index 000000000..8200ead5d --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_port_policy/test03/test03.cpp @@ -0,0 +1,100 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- Test bind policy: one required not bound. + + Original Author: Andy Goodrich, Forte Design Systems, 02 September 2005 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include <systemc.h> + +// #define ALL_ERROR // Force error on all bound port. +// #define BIND_NONE // Bind port with zero or more bound. +#define ONE_ERROR // Force error on one or more bound port. + +SC_MODULE(TB) +{ + SC_CTOR(TB) : m_all("all"), m_none("none"), m_one("one") + { + SC_CTHREAD(thread, m_clk.pos()); + } + void thread() + { + for (;;) + { + wait(); + cout << sc_time_stamp() << ":" << endl; + cout << " all[0] = " << m_all[0]->read() << endl; + cout << " all[1] = " << m_all[1]->read() << endl; + cout << " one = " << m_one->read() << endl; +# if defined(BIND_NONE) + cout << " none = " << m_none->read() << endl; +# endif + } + } + sc_port<sc_signal_in_if<bool>,2,SC_ALL_BOUND> m_all; + sc_in<bool> m_clk; + sc_port<sc_signal_in_if<bool>,2,SC_ZERO_OR_MORE_BOUND> m_none; + sc_port<sc_signal_in_if<bool>,2,SC_ONE_OR_MORE_BOUND> m_one; +}; + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> sig1; + sc_signal<bool> sig2; + + TB tb("tb"); + + tb.m_clk(clock); + +# if !defined(ONE_ERROR) + tb.m_one(sig1); +# endif +# if defined(BIND_NONE) + tb.m_none(sig2); +# endif + tb.m_all(sig1); +# if !defined(ALL_ERROR) + tb.m_all(sig2); +# endif + + sc_start(1, SC_NS); + sig1 = true; + sc_start(1, SC_NS); + sig2 = true; + sc_start(1, SC_NS); + sig1 = false; + sig2 = false; + sc_start(1, SC_NS); + return 0; +} + diff --git a/src/systemc/tests/systemc/communication/sc_port_policy/test04/golden/test04.log b/src/systemc/tests/systemc/communication/sc_port_policy/test04/golden/test04.log new file mode 100644 index 000000000..ee4a4baaf --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_port_policy/test04/golden/test04.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E109) complete binding failed: 1 actual binds is less than required 2: port 'tb.all' (sc_port) +In file: <removed by verify.pl> diff --git a/src/systemc/tests/systemc/communication/sc_port_policy/test04/test04.cpp b/src/systemc/tests/systemc/communication/sc_port_policy/test04/test04.cpp new file mode 100644 index 000000000..8f202dc11 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_port_policy/test04/test04.cpp @@ -0,0 +1,100 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- Test bind policy: all required not bound. + + Original Author: Andy Goodrich, Forte Design Systems, 02 September 2005 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include <systemc.h> + +#define ALL_ERROR // Force error on all bound port. +// #define BIND_NONE // Bind port with zero or more bound. +// #define ONE_ERROR // Force error on one or more bound port. + +SC_MODULE(TB) +{ + SC_CTOR(TB) : m_all("all"), m_none("none"), m_one("one") + { + SC_CTHREAD(thread, m_clk.pos()); + } + void thread() + { + for (;;) + { + wait(); + cout << sc_time_stamp() << ":" << endl; + cout << " all[0] = " << m_all[0]->read() << endl; + cout << " all[1] = " << m_all[1]->read() << endl; + cout << " one = " << m_one->read() << endl; +# if defined(BIND_NONE) + cout << " none = " << m_none->read() << endl; +# endif + } + } + sc_port<sc_signal_in_if<bool>,2,SC_ALL_BOUND> m_all; + sc_in<bool> m_clk; + sc_port<sc_signal_in_if<bool>,2,SC_ZERO_OR_MORE_BOUND> m_none; + sc_port<sc_signal_in_if<bool>,2,SC_ONE_OR_MORE_BOUND> m_one; +}; + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> sig1; + sc_signal<bool> sig2; + + TB tb("tb"); + + tb.m_clk(clock); + +# if !defined(ONE_ERROR) + tb.m_one(sig1); +# endif +# if defined(BIND_NONE) + tb.m_none(sig2); +# endif + tb.m_all(sig1); +# if !defined(ALL_ERROR) + tb.m_all(sig2); +# endif + + sc_start(1, SC_NS); + sig1 = true; + sc_start(1, SC_NS); + sig2 = true; + sc_start(1, SC_NS); + sig1 = false; + sig2 = false; + sc_start(1, SC_NS); + return 0; +} + diff --git a/src/systemc/tests/systemc/communication/sc_port_policy/test05/golden/test05.log b/src/systemc/tests/systemc/communication/sc_port_policy/test05/golden/test05.log new file mode 100644 index 000000000..833e3177e --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_port_policy/test05/golden/test05.log @@ -0,0 +1,6 @@ +SystemC Simulation +m_all_bound_4[0] = 0 +m_all_bound_4[1] = 1 +m_all_bound_4[2] = 2 +m_all_bound_4[3] = 3 +Program completed diff --git a/src/systemc/tests/systemc/communication/sc_port_policy/test05/test05.cpp b/src/systemc/tests/systemc/communication/sc_port_policy/test05/test05.cpp new file mode 100644 index 000000000..c50ee616b --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_port_policy/test05/test05.cpp @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test05.cpp -- test of binding w/zero bound port and binding after the fact. + + Original Author: Andy Goodrich, Forte Design Systems, 2005-09-12 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of binding with zero bound port and binding after the fact. + + +#include "systemc.h" + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) : + m_all_bound_0("all_bound_0"), + m_all_bound_4("all_bound_4"), + m_one_or_more_2("one_or_more_2"), + m_zero_or_more_2("zero_or_more_2") + { + SC_CTHREAD(thread,m_clk.pos()); + + m_all_bound_0(m_signal_0); // 1 + + m_all_bound_4(m_all_bound_0); // 1 + m_all_bound_4(m_one_or_more_2); // 2 and 3 + m_all_bound_4(m_zero_or_more_2); + m_all_bound_4(m_signal_3); // 4 + m_all_bound_4(m_zero_or_more_2); + + m_one_or_more_2(m_signal_1); // 1 + m_one_or_more_2(m_signal_2); // 2 + } + void thread() + { + m_signal_0 = 0; + m_signal_1 = 1; + m_signal_2 = 2; + m_signal_3 = 3; + for (;;) + { + wait(); + cout << "m_all_bound_4[0] = " << m_all_bound_4[0]->read() << endl; + cout << "m_all_bound_4[1] = " << m_all_bound_4[1]->read() << endl; + cout << "m_all_bound_4[2] = " << m_all_bound_4[2]->read() << endl; + cout << "m_all_bound_4[3] = " << m_all_bound_4[3]->read() << endl; + } + } + sc_in<bool> m_clk; + + sc_port<sc_signal_in_if<int>,0,SC_ALL_BOUND> m_all_bound_0; + sc_port<sc_signal_in_if<int>,4,SC_ALL_BOUND> m_all_bound_4; + sc_port<sc_signal_in_if<int>,2,SC_ONE_OR_MORE_BOUND> m_one_or_more_2; + sc_signal<int> m_signal_0; + sc_signal<int> m_signal_1; + sc_signal<int> m_signal_2; + sc_signal<int> m_signal_3; + sc_port<sc_signal_in_if<int>,2,SC_ZERO_OR_MORE_BOUND> m_zero_or_more_2; +}; +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + DUT dut("dut"); + + dut.m_clk(clock); + + sc_start(2, SC_NS); + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test01/golden/test01.log new file mode 100644 index 000000000..510988bc1 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test01/golden/test01.log @@ -0,0 +1,3 @@ +SystemC Simulation +simulation time:0 s writting 0 to channel +simulation time:0 s reading 0 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test01/test01.cpp new file mode 100644 index 000000000..87fb28e29 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test01/test01.cpp @@ -0,0 +1,139 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +//test of sc_prim_channel::next_trigger() + +#include <systemc.h> + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name), data(0) + { } + + //write to channel + void write(){ + static int i = 0; + next_trigger(); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + i++; + } + + //read from channel + void read( ){ + int j; + next_trigger(); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "<<j<<" from channel" << endl; + } + + private: + int data; + +}; + +//source module +SC_MODULE(mod_a) +{ + sc_port<write_if> out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port<read_if> input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(10, SC_NS); + return 0 ; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test02/golden/test02.log new file mode 100644 index 000000000..531039f15 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test02/golden/test02.log @@ -0,0 +1,21 @@ +SystemC Simulation +writting 0 to channel and notifying write_event +reading 0 from channel and notifying read_event +writting 1 to channel and notifying write_event +reading 1 from channel and notifying read_event +writting 2 to channel and notifying write_event +reading 2 from channel and notifying read_event +writting 3 to channel and notifying write_event +reading 3 from channel and notifying read_event +writting 4 to channel and notifying write_event +reading 4 from channel and notifying read_event +writting 5 to channel and notifying write_event +reading 5 from channel and notifying read_event +writting 6 to channel and notifying write_event +reading 6 from channel and notifying read_event +writting 7 to channel and notifying write_event +reading 7 from channel and notifying read_event +writting 8 to channel and notifying write_event +reading 8 from channel and notifying read_event +writting 9 to channel and notifying write_event +reading 9 from channel and notifying read_event diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test02/test02.cpp new file mode 100644 index 000000000..c0c0c2a7a --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test02/test02.cpp @@ -0,0 +1,144 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +//test of sc_prim_channel::next_trigger(const sc_event&) + +#include <systemc.h> + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + static int i = 0; + if(i < 10){ + next_trigger(read_event); + data = i; + cout<<"writting "<< data <<" to channel"; + i++; + cout<<" and notifying write_event" << endl; + write_event.notify(); + } + } + + //read from channel + void read( ){ + int j; + next_trigger(write_event); + j = data; + cout<<"reading "<<j<<" from channel"; + cout<<" and notifying read_event" << endl; + read_event.notify(); + } + + private: + int data; + sc_event write_event, read_event; + +}; + +//source module +SC_MODULE(mod_a) +{ + sc_port<write_if> out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port<read_if> input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(10, SC_NS); + return 0 ; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test03/golden/test03.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test03/golden/test03.log new file mode 100644 index 000000000..f783e1cb6 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test03/golden/test03.log @@ -0,0 +1,15 @@ +SystemC Simulation +simulation time:0 s writting 0 to channel +simulation time:0 s reading 0 from channel +simulation time:10 ns writting 1 to channel +simulation time:10 ns reading 1 from channel +simulation time:20 ns writting 2 to channel +simulation time:20 ns reading 2 from channel +simulation time:30 ns writting 3 to channel +simulation time:30 ns reading 3 from channel +simulation time:40 ns writting 4 to channel +simulation time:40 ns reading 4 from channel +simulation time:50 ns writting 5 to channel +simulation time:50 ns reading 5 from channel +simulation time:60 ns writting 6 to channel +simulation time:60 ns reading 6 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test03/test03.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test03/test03.cpp new file mode 100644 index 000000000..07554c293 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test03/test03.cpp @@ -0,0 +1,140 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +//test of sc_prim_channel::next_trigger(const sc_time&) + +#include <systemc.h> + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + static int i = 0; + next_trigger(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + i++; + } + + //read from channel + void read( ){ + int j; + sc_time t(10, SC_NS); + next_trigger(t); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "<<j<<" from channel" << endl; + } + + private: + int data; + +}; + +//source module +SC_MODULE(mod_a) +{ + sc_port<write_if> out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port<read_if> input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(70, SC_NS); + return 0 ; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test04/golden/test04.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test04/golden/test04.log new file mode 100644 index 000000000..da6325102 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test04/golden/test04.log @@ -0,0 +1,22 @@ +SystemC Simulation +simulation time:0 s writting 0 to channel +simulation time:0 s reading 0 from channel +simulation time:10 ns writting 1 to channel +simulation time:10 ns reading 1 from channel +simulation time:20 ns reading 1 from channel +simulation time:20 ns writting 2 to channel +simulation time:30 ns reading 2 from channel +simulation time:30 ns writting 3 to channel +simulation time:40 ns reading 3 from channel +simulation time:40 ns writting 4 to channel +simulation time:50 ns reading 4 from channel +simulation time:50 ns writting 5 to channel +simulation time:55 ns reading 5 from channel +simulation time:60 ns writting 6 to channel +simulation time:65 ns reading 6 from channel +simulation time:70 ns writting 7 to channel +simulation time:75 ns reading 7 from channel +simulation time:80 ns writting 8 to channel +simulation time:85 ns reading 8 from channel +simulation time:90 ns writting 9 to channel +simulation time:95 ns reading 9 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test04/test04.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test04/test04.cpp new file mode 100644 index 000000000..395186f17 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test04/test04.cpp @@ -0,0 +1,148 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +//test of sc_prim_channel::next_trigger(double, sc_time_unit, sc_event&) + +#include <systemc.h> + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + static int i = 0; + next_trigger(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + if(i < 5){ + write_event.notify(20, SC_NS); + } + else { + write_event.notify(5, SC_NS); + } + + i++; + } + + //read from channel + void read( ){ + int j; + next_trigger(10, SC_NS, write_event); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "<<j<<" from channel" << endl; + } + + private: + int data; + sc_event write_event; + +}; + +//source module +SC_MODULE(mod_a) +{ + sc_port<write_if> out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port<read_if> input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(100, SC_NS); + return 0 ; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test05/golden/test05.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test05/golden/test05.log new file mode 100644 index 000000000..8988b3192 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test05/golden/test05.log @@ -0,0 +1,26 @@ +SystemC Simulation +simulation time:0 s writing 0 to channel +simulation time:0 s reading 0 from channel +simulation time:10 ns writing 1 to channel +simulation time:10 ns reading 1 from channel +simulation time:20 ns reading 1 from channel +simulation time:20 ns writing 2 to channel +simulation time:30 ns reading 2 from channel +simulation time:30 ns writing 3 to channel +simulation time:40 ns reading 3 from channel +simulation time:40 ns writing 4 to channel +simulation time:50 ns reading 4 from channel +simulation time:50 ns writing 5 to channel +simulation time:60 ns reading 5 from channel +simulation time:60 ns writing 6 to channel +simulation time:65 ns reading 6 from channel +simulation time:70 ns writing 7 to channel +simulation time:75 ns reading 7 from channel +simulation time:80 ns writing 8 to channel +simulation time:85 ns reading 8 from channel +simulation time:90 ns writing 9 to channel +simulation time:95 ns reading 9 from channel +simulation time:100 ns writing 10 to channel +simulation time:105 ns reading 10 from channel +simulation time:110 ns writing 11 to channel +simulation time:115 ns reading 11 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test05/test05.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test05/test05.cpp new file mode 100644 index 000000000..60c7624c6 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test05/test05.cpp @@ -0,0 +1,152 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test05.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +//test of sc_prim_channel::next_trigger(double, sc_time_unit, sc_event_and_list&) + +#include <systemc.h> + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + static int i = 0; + next_trigger(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writing "<< data <<" to channel" << endl; + + if(i < 3){ + write_event_1.notify(20, SC_NS); + } + else if(3 <= i && i < 6) { + write_event_2.notify(5, SC_NS); + } + else{ + write_event_2.notify(5, SC_NS); + write_event_1.notify(5, SC_NS); + } + + i++; + } + + //read from channel + void read( ){ + int j; + next_trigger(10, SC_NS, write_event_1 & write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "<<j<<" from channel" << endl; + } + + private: + int data; + sc_event write_event_1, write_event_2; + +}; + +//source module +SC_MODULE(mod_a) +{ + sc_port<write_if> out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port<read_if> input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(120, SC_NS); + return 0 ; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test06/golden/test06.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test06/golden/test06.log new file mode 100644 index 000000000..50d5bb719 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test06/golden/test06.log @@ -0,0 +1,27 @@ +SystemC Simulation +simulation time:0 s writting 0 to channel +simulation time:0 s reading 0 from channel +simulation time:10 ns writting 1 to channel +simulation time:10 ns reading 1 from channel +simulation time:20 ns reading 1 from channel +simulation time:20 ns writting 2 to channel +simulation time:30 ns reading 2 from channel +simulation time:30 ns writting 3 to channel +simulation time:35 ns reading 3 from channel +simulation time:40 ns writting 4 to channel +simulation time:45 ns reading 4 from channel +simulation time:50 ns writting 5 to channel +simulation time:55 ns reading 5 from channel +simulation time:60 ns writting 6 to channel +simulation time:65 ns reading 6 from channel +simulation time:66 ns reading 6 from channel +simulation time:70 ns writting 7 to channel +simulation time:76 ns reading 7 from channel +simulation time:80 ns writting 8 to channel +simulation time:86 ns reading 8 from channel +simulation time:90 ns writting 9 to channel +simulation time:96 ns reading 9 from channel +simulation time:100 ns writting 10 to channel +simulation time:106 ns reading 10 from channel +simulation time:110 ns writting 11 to channel +simulation time:116 ns reading 11 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test06/test06.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test06/test06.cpp new file mode 100644 index 000000000..ddfbd5c2a --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test06/test06.cpp @@ -0,0 +1,151 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test06.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +//test of sc_prim_channel::next_trigger(double, sc_time_unit, sc_event_or_list&) + +#include <systemc.h> + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + static int i = 0; + next_trigger(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + if(i < 3){ + write_event_1.notify(20, SC_NS); + } + else if(3 <= i && i < 6) { + write_event_1.notify(5, SC_NS); + } + else{ + write_event_2.notify(6, SC_NS); + } + + i++; + } + + //read from channel + void read( ){ + int j; + next_trigger(10, SC_NS, write_event_1 | write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "<<j<<" from channel" << endl; + } + + private: + int data; + sc_event write_event_1, write_event_2; + +}; + +//source module +SC_MODULE(mod_a) +{ + sc_port<write_if> out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port<read_if> input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(120, SC_NS); + return 0 ; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test07/golden/test07.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test07/golden/test07.log new file mode 100644 index 000000000..da6325102 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test07/golden/test07.log @@ -0,0 +1,22 @@ +SystemC Simulation +simulation time:0 s writting 0 to channel +simulation time:0 s reading 0 from channel +simulation time:10 ns writting 1 to channel +simulation time:10 ns reading 1 from channel +simulation time:20 ns reading 1 from channel +simulation time:20 ns writting 2 to channel +simulation time:30 ns reading 2 from channel +simulation time:30 ns writting 3 to channel +simulation time:40 ns reading 3 from channel +simulation time:40 ns writting 4 to channel +simulation time:50 ns reading 4 from channel +simulation time:50 ns writting 5 to channel +simulation time:55 ns reading 5 from channel +simulation time:60 ns writting 6 to channel +simulation time:65 ns reading 6 from channel +simulation time:70 ns writting 7 to channel +simulation time:75 ns reading 7 from channel +simulation time:80 ns writting 8 to channel +simulation time:85 ns reading 8 from channel +simulation time:90 ns writting 9 to channel +simulation time:95 ns reading 9 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test07/test07.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test07/test07.cpp new file mode 100644 index 000000000..b1b18185c --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test07/test07.cpp @@ -0,0 +1,149 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test07.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::next_trigger(const sc_time&, sc_event&) + +#include <systemc.h> + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + static int i = 0; + next_trigger(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + if(i < 5){ + write_event.notify(20, SC_NS); + } + else { + write_event.notify(5, SC_NS); + } + + i++; + } + + //read from channel + void read( ){ + int j; + const sc_time t(10, SC_NS); + next_trigger(t, write_event); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "<<j<<" from channel" << endl; + } + + private: + int data; + sc_event write_event; + +}; + +//source module +SC_MODULE(mod_a) +{ + sc_port<write_if> out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port<read_if> input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(100, SC_NS); + return 0 ; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test08/golden/test08.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test08/golden/test08.log new file mode 100644 index 000000000..8988b3192 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test08/golden/test08.log @@ -0,0 +1,26 @@ +SystemC Simulation +simulation time:0 s writing 0 to channel +simulation time:0 s reading 0 from channel +simulation time:10 ns writing 1 to channel +simulation time:10 ns reading 1 from channel +simulation time:20 ns reading 1 from channel +simulation time:20 ns writing 2 to channel +simulation time:30 ns reading 2 from channel +simulation time:30 ns writing 3 to channel +simulation time:40 ns reading 3 from channel +simulation time:40 ns writing 4 to channel +simulation time:50 ns reading 4 from channel +simulation time:50 ns writing 5 to channel +simulation time:60 ns reading 5 from channel +simulation time:60 ns writing 6 to channel +simulation time:65 ns reading 6 from channel +simulation time:70 ns writing 7 to channel +simulation time:75 ns reading 7 from channel +simulation time:80 ns writing 8 to channel +simulation time:85 ns reading 8 from channel +simulation time:90 ns writing 9 to channel +simulation time:95 ns reading 9 from channel +simulation time:100 ns writing 10 to channel +simulation time:105 ns reading 10 from channel +simulation time:110 ns writing 11 to channel +simulation time:115 ns reading 11 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test08/test08.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test08/test08.cpp new file mode 100644 index 000000000..9f8ae16fa --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test08/test08.cpp @@ -0,0 +1,154 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test08.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::next_trigger(sc_time&, sc_event_and_list&) + +#include <systemc.h> + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + static int i = 0; + next_trigger(10, SC_NS); + data = i; + + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writing "<< data <<" to channel" << endl; + + if(i < 3){ + write_event_1.notify(20, SC_NS); + } + else if(3 <= i && i < 6) { + write_event_2.notify(5, SC_NS); + } + else{ + write_event_2.notify(5, SC_NS); + write_event_1.notify(5, SC_NS); + } + + i++; + } + + //read from channel + void read( ){ + int j; + const sc_time t(10, SC_NS); + next_trigger(t, write_event_1 & write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "<<j<<" from channel" << endl; + } + + private: + int data; + sc_event write_event_1, write_event_2; + +}; + +//source module +SC_MODULE(mod_a) +{ + sc_port<write_if> out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port<read_if> input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(120, SC_NS); + return 0 ; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test09/golden/test09.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test09/golden/test09.log new file mode 100644 index 000000000..0886c231e --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test09/golden/test09.log @@ -0,0 +1,27 @@ +SystemC Simulation +simulation time:0 s writing 0 to channel +simulation time:0 s reading 0 from channel +simulation time:10 ns writing 1 to channel +simulation time:10 ns reading 1 from channel +simulation time:20 ns reading 1 from channel +simulation time:20 ns writing 2 to channel +simulation time:30 ns reading 2 from channel +simulation time:30 ns writing 3 to channel +simulation time:35 ns reading 3 from channel +simulation time:40 ns writing 4 to channel +simulation time:45 ns reading 4 from channel +simulation time:50 ns writing 5 to channel +simulation time:55 ns reading 5 from channel +simulation time:60 ns writing 6 to channel +simulation time:65 ns reading 6 from channel +simulation time:66 ns reading 6 from channel +simulation time:70 ns writing 7 to channel +simulation time:76 ns reading 7 from channel +simulation time:80 ns writing 8 to channel +simulation time:86 ns reading 8 from channel +simulation time:90 ns writing 9 to channel +simulation time:96 ns reading 9 from channel +simulation time:100 ns writing 10 to channel +simulation time:106 ns reading 10 from channel +simulation time:110 ns writing 11 to channel +simulation time:116 ns reading 11 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test09/test09.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test09/test09.cpp new file mode 100644 index 000000000..d474a086d --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test09/test09.cpp @@ -0,0 +1,153 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test09.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::next_trigger(const sc_time&, sc_event_or_list&) + +#include <systemc.h> + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + static int i = 0; + sc_time t1(10, SC_NS); + next_trigger(t1); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writing "<< data <<" to channel" << endl; + + if(i < 3){ + write_event_1.notify(20, SC_NS); + } + else if(3 <= i & i < 6) { + write_event_1.notify(5, SC_NS); + } + else{ + write_event_2.notify(6, SC_NS); + } + + i++; + } + + //read from channel + void read( ){ + int j; + sc_time t2(10, SC_NS); + next_trigger(t2, write_event_1 | write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "<<j<<" from channel" << endl; + } + + private: + int data; + sc_event write_event_1, write_event_2; + +}; + +//source module +SC_MODULE(mod_a) +{ + sc_port<write_if> out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port<read_if> input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(120, SC_NS); + return 0 ; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test10/golden/test10.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test10/golden/test10.log new file mode 100644 index 000000000..0385702b3 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test10/golden/test10.log @@ -0,0 +1,14 @@ +SystemC Simulation +simulation time:0 s writting 0 to channel +simulation time:0 s reading 0 from channel +simulation time:5 ns reading 0 from channel +simulation time:10 ns writting 1 to channel +simulation time:15 ns reading 1 from channel +simulation time:20 ns writting 2 to channel +simulation time:25 ns reading 2 from channel +simulation time:30 ns writting 3 to channel +simulation time:35 ns reading 3 from channel +simulation time:40 ns writting 4 to channel +simulation time:45 ns reading 4 from channel +simulation time:50 ns writting 5 to channel +simulation time:55 ns reading 5 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test10/test10.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test10/test10.cpp new file mode 100644 index 000000000..e28fd2a6f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test10/test10.cpp @@ -0,0 +1,145 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test10.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::next_trigger(sc_event_and_list&) + +#include <systemc.h> + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + static int i = 0; + next_trigger(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + write_event_2.notify(5, SC_NS); + write_event_1.notify(5, SC_NS); + + + i++; + } + + //read from channel + void read( ){ + int j; + next_trigger(write_event_1 & write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "<<j<<" from channel" << endl; + } + + private: + int data; + sc_event write_event_1, write_event_2; + +}; + +//source module +SC_MODULE(mod_a) +{ + sc_port<write_if> out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port<read_if> input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(60, SC_NS); + return 0 ; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test11/golden/test11.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test11/golden/test11.log new file mode 100644 index 000000000..e48baf7c5 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test11/golden/test11.log @@ -0,0 +1,22 @@ +SystemC Simulation +simulation time:0 s writting 0 to channel +simulation time:0 s reading 0 from channel +simulation time:5 ns reading 0 from channel +simulation time:20 ns writting 1 to channel +simulation time:25 ns reading 1 from channel +simulation time:40 ns writting 2 to channel +simulation time:45 ns reading 2 from channel +simulation time:60 ns writting 3 to channel +simulation time:70 ns reading 3 from channel +simulation time:80 ns writting 4 to channel +simulation time:90 ns reading 4 from channel +simulation time:100 ns writting 5 to channel +simulation time:110 ns reading 5 from channel +simulation time:120 ns writting 6 to channel +simulation time:135 ns reading 6 from channel +simulation time:140 ns writting 7 to channel +simulation time:155 ns reading 7 from channel +simulation time:160 ns writting 8 to channel +simulation time:175 ns reading 8 from channel +simulation time:180 ns writting 9 to channel +simulation time:195 ns reading 9 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test11/test11.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test11/test11.cpp new file mode 100644 index 000000000..e85090b16 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test11/test11.cpp @@ -0,0 +1,152 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test11.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::next_trigger(sc_event_or_list&) + +#include <systemc.h> + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name), data(0) + { } + + //write to channel + void write(){ + static int i = 0; + next_trigger(20, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + if(i < 3){ + write_event_1.notify(5, SC_NS); + write_event_1.notify(5, SC_NS); + } + else if(3 <= i & i < 6) { + write_event_1.notify(10, SC_NS); + } + else{ + write_event_2.notify(15, SC_NS); + } + + i++; + } + + //read from channel + void read( ){ + int j; + next_trigger(write_event_1 | write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "<<j<<" from channel" << endl; + } + + private: + int data; + sc_event write_event_1, write_event_2; + +}; + +//source module +SC_MODULE(mod_a) +{ + sc_port<write_if> out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port<read_if> input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(200, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test12/golden/test12.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test12/golden/test12.log new file mode 100644 index 000000000..43e07ec75 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test12/golden/test12.log @@ -0,0 +1,19 @@ +SystemC Simulation +simulation time:10 ns writting 0 to channel +simulation time:10 ns reading 0 from channel +simulation time:20 ns writting 1 to channel +simulation time:20 ns reading 1 from channel +simulation time:30 ns writting 2 to channel +simulation time:30 ns reading 2 from channel +simulation time:40 ns writting 3 to channel +simulation time:40 ns reading 3 from channel +simulation time:50 ns writting 4 to channel +simulation time:50 ns reading 4 from channel +simulation time:60 ns writting 5 to channel +simulation time:60 ns reading 5 from channel +simulation time:70 ns writting 6 to channel +simulation time:70 ns reading 6 from channel +simulation time:80 ns writting 7 to channel +simulation time:80 ns reading 7 from channel +simulation time:90 ns writting 8 to channel +simulation time:90 ns reading 8 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test12/test12.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test12/test12.cpp new file mode 100644 index 000000000..6af1bbd22 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test12/test12.cpp @@ -0,0 +1,144 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test12.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::wait(const sc_time&) + +#include <systemc.h> + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + int i = 0; + sc_time t1(10, SC_NS); + + while(1){ + wait(t1); + data = i; + cout<<"simulation time"<<":"<<sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel"<<endl; + i++; + } + } + //read from channel + void read( ){ + int j; + + while(1){ + wait(10, SC_NS); + j = data; + cout<<"simulation time"<<":"<<sc_time_stamp()<<" "; + cout<<"reading "<<j<<" from channel"<<endl; + + } + } + private: + int data; +}; + +//source module +SC_MODULE(mod_a) +{ + sc_port<write_if> out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_THREAD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port<read_if> input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_THREAD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(100, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test13/golden/test13.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test13/golden/test13.log new file mode 100644 index 000000000..b5b5202e5 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test13/golden/test13.log @@ -0,0 +1,20 @@ +SystemC Simulation +simulation time:10 ns writting 0 to channel +simulation time:10 ns reading 0 from channel +simulation time:20 ns writting 1 to channel +simulation time:20 ns reading 1 from channel +simulation time:30 ns reading 1 from channel +simulation time:30 ns writting 2 to channel +simulation time:40 ns reading 2 from channel +simulation time:40 ns writting 3 to channel +simulation time:50 ns reading 3 from channel +simulation time:50 ns writting 4 to channel +simulation time:60 ns reading 4 from channel +simulation time:60 ns writting 5 to channel +simulation time:65 ns reading 5 from channel +simulation time:70 ns writting 6 to channel +simulation time:75 ns reading 6 from channel +simulation time:80 ns writting 7 to channel +simulation time:85 ns reading 7 from channel +simulation time:90 ns writting 8 to channel +simulation time:95 ns reading 8 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test13/test13.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test13/test13.cpp new file mode 100644 index 000000000..b26ceafc1 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test13/test13.cpp @@ -0,0 +1,155 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test13.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::wait(sc_time&, sc_event&) + +#include <systemc.h> + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + int i = 0; + sc_time t(10, SC_NS); + + while(1){ + wait(t); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + if(i < 5){ + write_event.notify(20, SC_NS); + } + else { + write_event.notify(5, SC_NS); + } + i++; + } + } + + //read from channel + void read( ){ + int j; + sc_time t1(10, SC_NS); + + while(1){ + wait(t1, write_event); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "<<j<<" from channel" << endl; + } + } + + private: + int data; + sc_event write_event; + +}; + +//source module +SC_MODULE(mod_a) +{ + sc_port<write_if> out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_THREAD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port<read_if> input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_THREAD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(100, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test14/golden/test14.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test14/golden/test14.log new file mode 100644 index 000000000..b5b5202e5 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test14/golden/test14.log @@ -0,0 +1,20 @@ +SystemC Simulation +simulation time:10 ns writting 0 to channel +simulation time:10 ns reading 0 from channel +simulation time:20 ns writting 1 to channel +simulation time:20 ns reading 1 from channel +simulation time:30 ns reading 1 from channel +simulation time:30 ns writting 2 to channel +simulation time:40 ns reading 2 from channel +simulation time:40 ns writting 3 to channel +simulation time:50 ns reading 3 from channel +simulation time:50 ns writting 4 to channel +simulation time:60 ns reading 4 from channel +simulation time:60 ns writting 5 to channel +simulation time:65 ns reading 5 from channel +simulation time:70 ns writting 6 to channel +simulation time:75 ns reading 6 from channel +simulation time:80 ns writting 7 to channel +simulation time:85 ns reading 7 from channel +simulation time:90 ns writting 8 to channel +simulation time:95 ns reading 8 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test14/test14.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test14/test14.cpp new file mode 100644 index 000000000..e93ef3fa6 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test14/test14.cpp @@ -0,0 +1,154 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test14.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::wait(double, sc_time_unit, sc_event&) + +#include <systemc.h> + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + int i = 0; + sc_time t(10, SC_NS); + + while(1){ + wait(t); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + if(i < 5){ + write_event.notify(20, SC_NS); + } + else { + write_event.notify(5, SC_NS); + } + i++; + } + } + + //read from channel + void read( ){ + int j; + + while(1){ + wait(10, SC_NS, write_event); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "<<j<<" from channel" << endl; + } + } + + private: + int data; + sc_event write_event; + +}; + +//source module +SC_MODULE(mod_a) +{ + sc_port<write_if> out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_THREAD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port<read_if> input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_THREAD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(100, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test15/golden/test15.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test15/golden/test15.log new file mode 100644 index 000000000..9f6958921 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test15/golden/test15.log @@ -0,0 +1,24 @@ +SystemC Simulation +simulation time:10 ns writing 0 to channel +simulation time:10 ns reading 0 from channel +simulation time:20 ns writing 1 to channel +simulation time:20 ns reading 1 from channel +simulation time:30 ns reading 1 from channel +simulation time:30 ns writing 2 to channel +simulation time:40 ns reading 2 from channel +simulation time:40 ns writing 3 to channel +simulation time:50 ns writing 4 to channel +simulation time:50 ns reading 4 from channel +simulation time:60 ns reading 4 from channel +simulation time:60 ns writing 5 to channel +simulation time:70 ns writing 6 to channel +simulation time:70 ns reading 6 from channel +simulation time:75 ns reading 6 from channel +simulation time:80 ns writing 7 to channel +simulation time:85 ns reading 7 from channel +simulation time:90 ns writing 8 to channel +simulation time:95 ns reading 8 from channel +simulation time:100 ns writing 9 to channel +simulation time:105 ns reading 9 from channel +simulation time:110 ns writing 10 to channel +simulation time:115 ns reading 10 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test15/test15.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test15/test15.cpp new file mode 100644 index 000000000..28781776d --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test15/test15.cpp @@ -0,0 +1,156 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test15.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::wait(double, sc_time_unit, sc_event_and_list&) + +#include <systemc.h> + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + int i = 0; + + while(1){ + wait(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writing "<< data <<" to channel" << endl; + + if(i < 3){ + write_event_1.notify(20, SC_NS); + } + else if(3 <= i && i < 6) { + write_event_2.notify(5, SC_NS); + } + else{ + write_event_2.notify(5, SC_NS); + write_event_1.notify(5, SC_NS); + } + i++; + } + } + //read from channel + void read( ){ + int j; + + while(1){ + wait(10, SC_NS, write_event_1 & write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "<<j<<" from channel" << endl; + } + } + + private: + int data; + sc_event write_event_1, write_event_2; + +}; + +//source module +SC_MODULE(mod_a) +{ + sc_port<write_if> out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_THREAD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port<read_if> input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_THREAD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(120, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test16/golden/test16.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test16/golden/test16.log new file mode 100644 index 000000000..2c73a9072 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test16/golden/test16.log @@ -0,0 +1,24 @@ +SystemC Simulation +simulation time:10 ns writting 0 to channel +simulation time:10 ns reading 0 from channel +simulation time:20 ns writting 1 to channel +simulation time:20 ns reading 1 from channel +simulation time:30 ns reading 1 from channel +simulation time:30 ns writting 2 to channel +simulation time:40 ns reading 2 from channel +simulation time:40 ns writting 3 to channel +simulation time:50 ns writting 4 to channel +simulation time:50 ns reading 4 from channel +simulation time:60 ns reading 4 from channel +simulation time:60 ns writting 5 to channel +simulation time:70 ns writting 6 to channel +simulation time:70 ns reading 6 from channel +simulation time:75 ns reading 6 from channel +simulation time:80 ns writting 7 to channel +simulation time:85 ns reading 7 from channel +simulation time:90 ns writting 8 to channel +simulation time:95 ns reading 8 from channel +simulation time:100 ns writting 9 to channel +simulation time:105 ns reading 9 from channel +simulation time:110 ns writting 10 to channel +simulation time:115 ns reading 10 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test16/test16.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test16/test16.cpp new file mode 100644 index 000000000..c82ec5d06 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test16/test16.cpp @@ -0,0 +1,157 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test16.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::wait(sc_time, sc_event_and_list&) + +#include <systemc.h> + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + int i = 0; + + while(1){ + wait(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + if(i < 3){ + write_event_1.notify(20, SC_NS); + } + else if(3 <= i && i < 6) { + write_event_2.notify(5, SC_NS); + } + else{ + write_event_2.notify(5, SC_NS); + write_event_1.notify(5, SC_NS); + } + i++; + } + } + //read from channel + void read( ){ + int j; + sc_time t(10, SC_NS); + + while(1){ + wait(t, write_event_1 & write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "<<j<<" from channel" << endl; + } + } + + private: + int data; + sc_event write_event_1, write_event_2; + +}; + +//source module +SC_MODULE(mod_a) +{ + sc_port<write_if> out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_THREAD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port<read_if> input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_THREAD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(120, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test17/golden/test17.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test17/golden/test17.log new file mode 100644 index 000000000..6d9eb24d9 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test17/golden/test17.log @@ -0,0 +1,25 @@ +SystemC Simulation +simulation time:10 ns writting 0 to channel +simulation time:10 ns reading 0 from channel +simulation time:20 ns writting 1 to channel +simulation time:20 ns reading 1 from channel +simulation time:30 ns reading 1 from channel +simulation time:30 ns writting 2 to channel +simulation time:40 ns reading 2 from channel +simulation time:40 ns writting 3 to channel +simulation time:45 ns reading 3 from channel +simulation time:50 ns writting 4 to channel +simulation time:55 ns reading 4 from channel +simulation time:60 ns writting 5 to channel +simulation time:65 ns reading 5 from channel +simulation time:70 ns writting 6 to channel +simulation time:75 ns reading 6 from channel +simulation time:76 ns reading 6 from channel +simulation time:80 ns writting 7 to channel +simulation time:86 ns reading 7 from channel +simulation time:90 ns writting 8 to channel +simulation time:96 ns reading 8 from channel +simulation time:100 ns writting 9 to channel +simulation time:106 ns reading 9 from channel +simulation time:110 ns writting 10 to channel +simulation time:116 ns reading 10 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test17/test17.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test17/test17.cpp new file mode 100644 index 000000000..3ed584ea6 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test17/test17.cpp @@ -0,0 +1,156 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test17.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::wait(double, sc_time_unit, sc_event_or_list&) + +#include <systemc.h> + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + int i = 0; + + while(1){ + wait(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + if(i < 3){ + write_event_1.notify(20, SC_NS); + } + else if(3 <= i && i < 6) { + write_event_1.notify(5, SC_NS); + } + else{ + write_event_2.notify(6, SC_NS); + } + i++; + } + } + + //read from channel + void read( ){ + int j; + + while(1){ + wait(10, SC_NS, write_event_1 | write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "<<j<<" from channel" << endl; + } + } + + private: + int data; + sc_event write_event_1, write_event_2; + +}; + +//source module +SC_MODULE(mod_a) +{ + sc_port<write_if> out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_THREAD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port<read_if> input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_THREAD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(120, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test18/golden/test18.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test18/golden/test18.log new file mode 100644 index 000000000..6d9eb24d9 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test18/golden/test18.log @@ -0,0 +1,25 @@ +SystemC Simulation +simulation time:10 ns writting 0 to channel +simulation time:10 ns reading 0 from channel +simulation time:20 ns writting 1 to channel +simulation time:20 ns reading 1 from channel +simulation time:30 ns reading 1 from channel +simulation time:30 ns writting 2 to channel +simulation time:40 ns reading 2 from channel +simulation time:40 ns writting 3 to channel +simulation time:45 ns reading 3 from channel +simulation time:50 ns writting 4 to channel +simulation time:55 ns reading 4 from channel +simulation time:60 ns writting 5 to channel +simulation time:65 ns reading 5 from channel +simulation time:70 ns writting 6 to channel +simulation time:75 ns reading 6 from channel +simulation time:76 ns reading 6 from channel +simulation time:80 ns writting 7 to channel +simulation time:86 ns reading 7 from channel +simulation time:90 ns writting 8 to channel +simulation time:96 ns reading 8 from channel +simulation time:100 ns writting 9 to channel +simulation time:106 ns reading 9 from channel +simulation time:110 ns writting 10 to channel +simulation time:116 ns reading 10 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test18/test18.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test18/test18.cpp new file mode 100644 index 000000000..e57ce7097 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test18/test18.cpp @@ -0,0 +1,157 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test18.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::wait(sc_time, sc_event_or_list&) + +#include <systemc.h> + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + int i = 0; + + while(1){ + wait(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + if(i < 3){ + write_event_1.notify(20, SC_NS); + } + else if(3 <= i && i < 6) { + write_event_1.notify(5, SC_NS); + } + else{ + write_event_2.notify(6, SC_NS); + } + i++; + } + } + + //read from channel + void read( ){ + int j; + sc_time t(10, SC_NS); + + while(1){ + wait(t, write_event_1 | write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "<<j<<" from channel" << endl; + } + } + + private: + int data; + sc_event write_event_1, write_event_2; + +}; + +//source module +SC_MODULE(mod_a) +{ + sc_port<write_if> out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_THREAD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port<read_if> input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_THREAD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(120, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test19/golden/test19.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test19/golden/test19.log new file mode 100644 index 000000000..f1e6af3b0 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test19/golden/test19.log @@ -0,0 +1,11 @@ +SystemC Simulation +simulation time:10 ns writting 0 to channel +simulation time:15 ns reading 0 from channel +simulation time:20 ns writting 1 to channel +simulation time:25 ns reading 1 from channel +simulation time:30 ns writting 2 to channel +simulation time:35 ns reading 2 from channel +simulation time:40 ns writting 3 to channel +simulation time:45 ns reading 3 from channel +simulation time:50 ns writting 4 to channel +simulation time:55 ns reading 4 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test19/test19.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test19/test19.cpp new file mode 100644 index 000000000..a0a6c4330 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test19/test19.cpp @@ -0,0 +1,149 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test19.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::wait(sc_event_and_list&) + +#include <systemc.h> + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + int i = 0; + + while(1){ + wait(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + write_event_2.notify(5, SC_NS); + write_event_1.notify(5, SC_NS); + i++; + } + } + + //read from channel + void read( ){ + int j; + + while(1){ + wait(write_event_1 & write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "<<j<<" from channel" << endl; + } + } + + private: + int data; + sc_event write_event_1, write_event_2; + +}; + +//source module +SC_MODULE(mod_a) +{ + sc_port<write_if> out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_THREAD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port<read_if> input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_THREAD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(60, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test20/golden/test20.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test20/golden/test20.log new file mode 100644 index 000000000..2a867ec5a --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test20/golden/test20.log @@ -0,0 +1,19 @@ +SystemC Simulation +simulation time:20 ns writting 0 to channel +simulation time:25 ns reading 0 from channel +simulation time:40 ns writting 1 to channel +simulation time:45 ns reading 1 from channel +simulation time:60 ns writting 2 to channel +simulation time:65 ns reading 2 from channel +simulation time:80 ns writting 3 to channel +simulation time:90 ns reading 3 from channel +simulation time:100 ns writting 4 to channel +simulation time:110 ns reading 4 from channel +simulation time:120 ns writting 5 to channel +simulation time:130 ns reading 5 from channel +simulation time:140 ns writting 6 to channel +simulation time:155 ns reading 6 from channel +simulation time:160 ns writting 7 to channel +simulation time:175 ns reading 7 from channel +simulation time:180 ns writting 8 to channel +simulation time:195 ns reading 8 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test20/test20.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test20/test20.cpp new file mode 100644 index 000000000..a92b1a0e5 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test20/test20.cpp @@ -0,0 +1,156 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test20.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::wait(sc_event_or_list&) + +#include <systemc.h> + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + int i = 0; + + while(1){ + wait(20, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + if(i < 3){ + write_event_1.notify(5, SC_NS); + write_event_1.notify(5, SC_NS); + } + else if(3 <= i && i < 6) { + write_event_1.notify(10, SC_NS); + } + else{ + write_event_2.notify(15, SC_NS); + } + i++; + } + } + //read from channel + void read( ){ + int j; + + while(1){ + wait(write_event_1 | write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "<<j<<" from channel" << endl; + } + } + + private: + int data; + sc_event write_event_1, write_event_2; + +}; + +//source module +SC_MODULE(mod_a) +{ + sc_port<write_if> out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_THREAD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port<read_if> input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_THREAD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(200, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_semaphore/test01/golden/test01.log new file mode 100644 index 000000000..b498f9139 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test01/golden/test01.log @@ -0,0 +1,56 @@ +SystemC Simulation +1 ns proc_a - lock requested +1 ns proc_a - lock obtained +2 ns proc_b - lock requested +3 ns proc_a - unlock successful +3 ns proc_b - lock obtained +6 ns proc_a - trylock failed +6 ns proc_a - unlock successful +7 ns proc_b - unlock successful +7 ns proc_a - lock requested +7 ns proc_a - lock obtained +9 ns proc_a - unlock successful +10 ns proc_b - trylock successful +10 ns proc_b - unlock successful +12 ns proc_a - trylock successful +12 ns proc_a - unlock successful +12 ns proc_b - lock requested +12 ns proc_b - lock obtained +13 ns proc_a - lock requested +13 ns proc_a - lock obtained +15 ns proc_a - unlock successful +16 ns proc_b - unlock successful +18 ns proc_a - trylock successful +18 ns proc_a - unlock successful +19 ns proc_b - trylock successful +19 ns proc_b - unlock successful +19 ns proc_a - lock requested +19 ns proc_a - lock obtained +21 ns proc_b - lock requested +21 ns proc_b - lock obtained +21 ns proc_a - unlock successful +24 ns proc_a - trylock successful +24 ns proc_a - unlock successful +25 ns proc_b - unlock successful +25 ns proc_a - lock requested +25 ns proc_a - lock obtained +27 ns proc_a - unlock successful +28 ns proc_b - trylock successful +28 ns proc_b - unlock successful +30 ns proc_a - trylock successful +30 ns proc_a - unlock successful +30 ns proc_b - lock requested +30 ns proc_b - lock obtained +31 ns proc_a - lock requested +31 ns proc_a - lock obtained +33 ns proc_a - unlock successful +34 ns proc_b - unlock successful +36 ns proc_a - trylock successful +36 ns proc_a - unlock successful +37 ns proc_b - trylock successful +37 ns proc_b - unlock successful +37 ns proc_a - lock requested +37 ns proc_a - lock obtained +39 ns proc_b - lock requested +39 ns proc_b - lock obtained +39 ns proc_a - unlock successful diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_semaphore/test01/test01.cpp new file mode 100644 index 000000000..dd031f95c --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test01/test01.cpp @@ -0,0 +1,121 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of the sc_semaphore primitive channel -- mutex case + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_semaphore semaphore; + + void write( const char* msg ) + { + cout << sc_time_stamp() << " " << msg << endl; + } + + void proc_a() + { + while( true ) { + wait( 1, SC_NS ); + write( "proc_a - lock requested" ); + semaphore.wait(); + write( "proc_a - lock obtained" ); + wait( 2, SC_NS ); + if( semaphore.post() == 0 ) { + write( "proc_a - unlock successful" ); + } else { + write( "proc_a - unlock failed" ); + } + wait( 3, SC_NS ); + if( semaphore.trywait() == 0 ) { + write( "proc_a - trylock successful" ); + } else { + write( "proc_a - trylock failed" ); + } + if( semaphore.post() == 0 ) { + write( "proc_a - unlock successful" ); + } else { + write( "proc_a - unlock failed" ); + } + } + } + + void proc_b() + { + while( true ) { + wait( 2, SC_NS ); + write( "proc_b - lock requested" ); + semaphore.wait(); + write( "proc_b - lock obtained" ); + wait( 4, SC_NS ); + if( semaphore.post() == 0 ) { + write( "proc_b - unlock successful" ); + } else { + write( "proc_b - unlock failed" ); + } + wait( 3, SC_NS ); + if( semaphore.trywait() == 0 ) { + write( "proc_b - trylock successful" ); + } else { + write( "proc_b - trylock failed" ); + } + if( semaphore.post() == 0 ) { + write( "proc_b - unlock successful" ); + } else { + write( "proc_b - unlock failed" ); + } + } + } + + SC_CTOR( mod_a ) + : semaphore( 1 ) + { + SC_THREAD( proc_a ); + SC_THREAD( proc_b ); + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + + sc_start( 40, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_semaphore/test02/golden/test02.log new file mode 100644 index 000000000..b498f9139 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test02/golden/test02.log @@ -0,0 +1,56 @@ +SystemC Simulation +1 ns proc_a - lock requested +1 ns proc_a - lock obtained +2 ns proc_b - lock requested +3 ns proc_a - unlock successful +3 ns proc_b - lock obtained +6 ns proc_a - trylock failed +6 ns proc_a - unlock successful +7 ns proc_b - unlock successful +7 ns proc_a - lock requested +7 ns proc_a - lock obtained +9 ns proc_a - unlock successful +10 ns proc_b - trylock successful +10 ns proc_b - unlock successful +12 ns proc_a - trylock successful +12 ns proc_a - unlock successful +12 ns proc_b - lock requested +12 ns proc_b - lock obtained +13 ns proc_a - lock requested +13 ns proc_a - lock obtained +15 ns proc_a - unlock successful +16 ns proc_b - unlock successful +18 ns proc_a - trylock successful +18 ns proc_a - unlock successful +19 ns proc_b - trylock successful +19 ns proc_b - unlock successful +19 ns proc_a - lock requested +19 ns proc_a - lock obtained +21 ns proc_b - lock requested +21 ns proc_b - lock obtained +21 ns proc_a - unlock successful +24 ns proc_a - trylock successful +24 ns proc_a - unlock successful +25 ns proc_b - unlock successful +25 ns proc_a - lock requested +25 ns proc_a - lock obtained +27 ns proc_a - unlock successful +28 ns proc_b - trylock successful +28 ns proc_b - unlock successful +30 ns proc_a - trylock successful +30 ns proc_a - unlock successful +30 ns proc_b - lock requested +30 ns proc_b - lock obtained +31 ns proc_a - lock requested +31 ns proc_a - lock obtained +33 ns proc_a - unlock successful +34 ns proc_b - unlock successful +36 ns proc_a - trylock successful +36 ns proc_a - unlock successful +37 ns proc_b - trylock successful +37 ns proc_b - unlock successful +37 ns proc_a - lock requested +37 ns proc_a - lock obtained +39 ns proc_b - lock requested +39 ns proc_b - lock obtained +39 ns proc_a - unlock successful diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_semaphore/test02/test02.cpp new file mode 100644 index 000000000..3ca52a36d --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test02/test02.cpp @@ -0,0 +1,139 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of the sc_semaphore_if interface -- mutex case + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_port<sc_semaphore_if> semaphore; + + void write( const char* msg ) + { + cout << sc_time_stamp() << " " << msg << endl; + } + + void proc_a() + { + while( true ) { + wait( 1, SC_NS ); + write( "proc_a - lock requested" ); + semaphore->wait(); + write( "proc_a - lock obtained" ); + wait( 2, SC_NS ); + if( semaphore->post() == 0 ) { + write( "proc_a - unlock successful" ); + } else { + write( "proc_a - unlock failed" ); + } + wait( 3, SC_NS ); + if( semaphore->trywait() == 0 ) { + write( "proc_a - trylock successful" ); + } else { + write( "proc_a - trylock failed" ); + } + if( semaphore->post() == 0 ) { + write( "proc_a - unlock successful" ); + } else { + write( "proc_a - unlock failed" ); + } + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( proc_a ); + } +}; + +SC_MODULE( mod_b ) +{ + sc_port<sc_semaphore_if> semaphore; + + void write( const char* msg ) + { + cout << sc_time_stamp() << " " << msg << endl; + } + + void proc_b() + { + while( true ) { + wait( 2, SC_NS ); + write( "proc_b - lock requested" ); + semaphore->wait(); + write( "proc_b - lock obtained" ); + wait( 4, SC_NS ); + if( semaphore->post() == 0 ) { + write( "proc_b - unlock successful" ); + } else { + write( "proc_b - unlock failed" ); + } + wait( 3, SC_NS ); + if( semaphore->trywait() == 0 ) { + write( "proc_b - trylock successful" ); + } else { + write( "proc_b - trylock failed" ); + } + if( semaphore->post() == 0 ) { + write( "proc_b - unlock successful" ); + } else { + write( "proc_b - unlock failed" ); + } + } + } + + SC_CTOR( mod_b ) + { + SC_THREAD( proc_b ); + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + mod_b b( "b" ); + sc_semaphore semaphore( "semaphore", 1 ); + + a.semaphore( semaphore ); + b.semaphore( semaphore ); + + sc_start( 40, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test03/golden/test03.log b/src/systemc/tests/systemc/communication/sc_semaphore/test03/golden/test03.log new file mode 100644 index 000000000..784723471 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test03/golden/test03.log @@ -0,0 +1,19 @@ +SystemC Simulation +time 0.000000 => thread1 : took semaphore 1 times +time 0.000000 => thread1 : took semaphore 2 times +time 0.000000 => thread1 : took semaphore 3 times +time 0.000000 => thread1 : took semaphore 4 times +time 0.000000 => thread1 : took semaphore 5 times +time 10.000000 => thread2 : posted semaphore 1 +time 10.000000 => thread1 : took semaphore 6 times +time 30.000000 => thread2 : posted semaphore 1 +time 30.000000 => thread1 : took semaphore 7 times +time 50.000000 => thread2 : posted semaphore 1 +time 50.000000 => thread1 : took semaphore 8 times +time 70.000000 => thread2 : posted semaphore 1 +time 70.000000 => thread1 : took semaphore 9 times +time 90.000000 => thread2 : posted semaphore 1 +time 90.000000 => thread1 : took semaphore 10 times +time 90.000000 => thread1 : value of semaphore = 0 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test03/main.cpp b/src/systemc/tests/systemc/communication/sc_semaphore/test03/main.cpp new file mode 100644 index 000000000..c02d1ae8b --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test03/main.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test_sem.h" + +int sc_main (int argc , char *argv[]) +{ + sc_clock clock1("clock1",10,SC_PS); + + TestSem my_block("test_sem"); + + my_block.clk(clock1); + + sc_start(3000, SC_PS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test03/test03.f b/src/systemc/tests/systemc/communication/sc_semaphore/test03/test03.f new file mode 100644 index 000000000..cd4b09961 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test03/test03.f @@ -0,0 +1,2 @@ +test03/test_sem.cpp +test03/main.cpp diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test03/test_sem.cpp b/src/systemc/tests/systemc/communication/sc_semaphore/test03/test_sem.cpp new file mode 100644 index 000000000..9c7e12eca --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test03/test_sem.cpp @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test_sem.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test_sem.h" + +TestSem::TestSem( sc_module_name ) + :sem_1(5) +{ + SC_THREAD(body_1); + sensitive << clk.pos(); + SC_THREAD(body_2); + sensitive << clk.pos(); +} + +void TestSem::body_1() +{ + unsigned int loop_counter=0; + char buf[BUFSIZ]; + + while (loop_counter++<10 && !sem_1.wait()) + { + sprintf(buf, "time %f => thread1 : took semaphore %d times\n", + sc_time_stamp().to_double(), loop_counter); + cout << buf << flush; +} + + sprintf(buf, "time %f => thread1 : value of semaphore = %d\n", + sc_time_stamp().to_double(), sem_1.get_value()); + cout << buf << flush; + + sc_stop(); +} + +void TestSem::body_2() +{ + unsigned int loop_counter=0; + char buf[BUFSIZ]; + + do + { + wait(2); + sem_1.post(); + sprintf(buf, "time %f => thread2 : posted semaphore 1\n", + sc_time_stamp().to_double()); + cout << buf << flush; + } + while (loop_counter++ < 5); + + wait(100); +} diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test03/test_sem.h b/src/systemc/tests/systemc/communication/sc_semaphore/test03/test_sem.h new file mode 100644 index 000000000..4adb00524 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test03/test_sem.h @@ -0,0 +1,58 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test_sem.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef TESTSEM_H +#define TESTSEM_H + +#include <systemc.h> + +SC_MODULE(TestSem) +{ + sc_in_clk clk; + + SC_CTOR(TestSem); + + void body_1(); + void body_2(); + +private: + + sc_semaphore sem_1; +}; + + +#endif diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test04/golden/test04.log b/src/systemc/tests/systemc/communication/sc_semaphore/test04/golden/test04.log new file mode 100644 index 000000000..5ae06a29f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test04/golden/test04.log @@ -0,0 +1,2 @@ +SystemC Simulation +sc_semaphore diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test04/test04.cpp b/src/systemc/tests/systemc/communication/sc_semaphore/test04/test04.cpp new file mode 100644 index 000000000..7cd1dd2e5 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test04/test04.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_semaphore::kind() + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_semaphore semaphore; + + SC_CTOR( mod_a ) + : semaphore( 1 ) + { } +}; + + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + cout<<a.semaphore.kind()<<endl; + sc_start( 5, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test01/golden/test01.log new file mode 100644 index 000000000..95d2bcaa2 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test01/golden/test01.log @@ -0,0 +1,8 @@ +SystemC Simulation + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `signal_0' (sc_signal) + first driver `a.main_action1' (sc_method_process) + second driver `a.main_action2' (sc_method_process) +In file: <removed by verify.pl> +In process: a.main_action2 @ 500 ps diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test01/test01.cpp new file mode 100644 index 000000000..c6d3c8cc8 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test01/test01.cpp @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of dynamic design rule checking in signals. + +// #define DEBUG_SYSTEMC +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out<int> out_int; + sc_out<bool> out_bool; + sc_out<sc_logic> out_logic; + sc_out<int> out_int2; + sc_out_resolved out_resolved; + sc_out_rv<1> out_rv1; + + void main_action1() + { + out_int = 42; + out_bool = true; + out_logic = SC_LOGIC_1; + out_int2 = 1; + out_resolved = SC_LOGIC_1; + out_rv1 = sc_lv<1>( SC_LOGIC_1 ); + } + + void main_action2() + { + out_int = 0; + out_bool = false; + out_logic = SC_LOGIC_0; + out_int2 = 0; + out_resolved = SC_LOGIC_0; + out_rv1 = sc_lv<1>( SC_LOGIC_0 ); + } + + SC_CTOR( mod_a ) + { + SC_METHOD( main_action1 ); + sensitive << clk.pos(); + dont_initialize(); + SC_METHOD( main_action2 ); + sensitive << clk.neg(); + dont_initialize(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal<int> sig_int; + sc_signal<bool> sig_bool; + sc_signal<sc_logic> sig_logic; + sc_buffer<int> buf_int; + sc_signal_resolved sig_resolved; + sc_signal_rv<1> sig_rv1; + + mod_a a("a"); + a(clk,sig_int,sig_bool,sig_logic,buf_int,sig_resolved,sig_rv1); + + sc_start( 20, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test02/golden/test02.log new file mode 100644 index 000000000..95d2bcaa2 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test02/golden/test02.log @@ -0,0 +1,8 @@ +SystemC Simulation + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `signal_0' (sc_signal) + first driver `a.main_action1' (sc_method_process) + second driver `a.main_action2' (sc_method_process) +In file: <removed by verify.pl> +In process: a.main_action2 @ 500 ps diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test02/test02.cpp new file mode 100644 index 000000000..ec1d30ed2 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test02/test02.cpp @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of dynamic design rule checking in signals. + +#define DEBUG_SYSTEMC +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out<int> out_int; + sc_out<bool> out_bool; + sc_out<sc_logic> out_logic; + sc_out<int> out_int2; + sc_out_resolved out_resolved; + sc_out_rv<1> out_rv1; + + void main_action1() + { + out_int = 42; + out_bool = true; + out_logic = SC_LOGIC_1; + out_int2 = 1; + out_resolved = SC_LOGIC_1; + out_rv1 = sc_lv<1>( SC_LOGIC_1 ); + } + + void main_action2() + { + out_int = 0; + out_bool = false; + out_logic = SC_LOGIC_0; + out_int2 = 0; + out_resolved = SC_LOGIC_0; + out_rv1 = sc_lv<1>( SC_LOGIC_0 ); + } + + SC_CTOR( mod_a ) + { + SC_METHOD( main_action1 ); + sensitive << clk.pos(); + dont_initialize(); + SC_METHOD( main_action2 ); + sensitive << clk.neg(); + dont_initialize(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal<int> sig_int; + sc_signal<bool> sig_bool; + sc_signal<sc_logic> sig_logic; + sc_buffer<int> buf_int; + sc_signal_resolved sig_resolved; + sc_signal_rv<1> sig_rv1; + + mod_a a("a"); + a(clk, sig_int, sig_bool, sig_logic, buf_int, sig_resolved, sig_rv1); + + sc_start( 20, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test03/golden/test03.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test03/golden/test03.log new file mode 100644 index 000000000..5be096a49 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test03/golden/test03.log @@ -0,0 +1,8 @@ +SystemC Simulation + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `sig_int' (sc_signal) + first driver `a.main_action1' (sc_method_process) + second driver `a.main_action2' (sc_method_process) +In file: <removed by verify.pl> +In process: a.main_action2 @ 500 ps diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test03/test03.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test03/test03.cpp new file mode 100644 index 000000000..553014ff8 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test03/test03.cpp @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of dynamic design rule checking in signals. + +#define DEBUG_SYSTEMC +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out<int> out_int; + sc_out<bool> out_bool; + sc_out<sc_logic> out_logic; + sc_out<int> out_int2; + sc_out_resolved out_resolved; + sc_out_rv<1> out_rv1; + + void main_action1() + { + out_int = 42; + out_bool = true; + out_logic = SC_LOGIC_1; + out_int2 = 1; + out_resolved = SC_LOGIC_1; + out_rv1 = sc_lv<1>( SC_LOGIC_1 ); + } + + void main_action2() + { + out_int = 0; + out_bool = false; + out_logic = SC_LOGIC_0; + out_int2 = 0; + out_resolved = SC_LOGIC_0; + out_rv1 = sc_lv<1>( SC_LOGIC_0 ); + } + + SC_CTOR( mod_a ) + { + SC_METHOD( main_action1 ); + sensitive << clk.pos(); + dont_initialize(); + SC_METHOD( main_action2 ); + sensitive << clk.neg(); + dont_initialize(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal<int> sig_int("sig_int"); + sc_signal<bool> sig_bool("sig_bool"); + sc_signal<sc_logic> sig_logic("sig_logic"); + sc_buffer<int> buf_int("buf_int"); + sc_signal_resolved sig_resolved("sig_resolved"); + sc_signal_rv<1> sig_rv1("sig_rv1"); + + mod_a a("a"); + a(clk, sig_int, sig_bool, sig_logic, buf_int, sig_resolved, sig_rv1); + + sc_start( 20, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test04/golden/test04.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test04/golden/test04.log new file mode 100644 index 000000000..7efe9540e --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test04/golden/test04.log @@ -0,0 +1,8 @@ +SystemC Simulation + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `signal_2' (sc_signal) + first driver `a.main_action1' (sc_method_process) + second driver `a.main_action2' (sc_method_process) +In file: <removed by verify.pl> +In process: a.main_action2 @ 500 ps diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test04/test04.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test04/test04.cpp new file mode 100644 index 000000000..af7d991aa --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test04/test04.cpp @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of dynamic design rule checking in signals. + +#define DEBUG_SYSTEMC +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out<int> out_int; + sc_out<bool> out_bool; + sc_out<sc_logic> out_logic; + sc_out<int> out_int2; + sc_out_resolved out_resolved; + sc_out_rv<1> out_rv1; + + void main_action1() + { + out_int = 42; + out_bool = true; + out_logic = SC_LOGIC_1; + out_int2 = 1; + out_resolved = SC_LOGIC_1; + out_rv1 = sc_lv<1>( SC_LOGIC_1 ); + } + + void main_action2() + { + // out_int = 0; + // out_bool = false; + out_logic = SC_LOGIC_0; + out_int2 = 0; + out_resolved = SC_LOGIC_0; + out_rv1 = sc_lv<1>( SC_LOGIC_0 ); + } + + SC_CTOR( mod_a ) + { + SC_METHOD( main_action1 ); + sensitive << clk.pos(); + dont_initialize(); + SC_METHOD( main_action2 ); + sensitive << clk.neg(); + dont_initialize(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal<int> sig_int; + sc_signal<bool> sig_bool; + sc_signal<sc_logic> sig_logic; + sc_buffer<int> buf_int; + sc_signal_resolved sig_resolved; + sc_signal_rv<1> sig_rv1; + + mod_a a("a"); + a(clk, sig_int, sig_bool, sig_logic, buf_int, sig_resolved, sig_rv1); + + sc_start( 20, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test05/golden/test05.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test05/golden/test05.log new file mode 100644 index 000000000..1e2e6730e --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test05/golden/test05.log @@ -0,0 +1,8 @@ +SystemC Simulation + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `buffer_0' (sc_buffer) + first driver `a.main_action1' (sc_method_process) + second driver `a.main_action2' (sc_method_process) +In file: <removed by verify.pl> +In process: a.main_action2 @ 500 ps diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test05/test05.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test05/test05.cpp new file mode 100644 index 000000000..482de1c2e --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test05/test05.cpp @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test05.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of dynamic design rule checking in signals. + +#define DEBUG_SYSTEMC +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out<int> out_int; + sc_out<bool> out_bool; + sc_out<sc_logic> out_logic; + sc_out<int> out_int2; + sc_out_resolved out_resolved; + sc_out_rv<1> out_rv1; + + void main_action1() + { + out_int = 42; + out_bool = true; + out_logic = SC_LOGIC_1; + out_int2 = 1; + out_resolved = SC_LOGIC_1; + out_rv1 = sc_lv<1>( SC_LOGIC_1 ); + } + + void main_action2() + { + // out_int = 0; + // out_bool = false; + // out_logic = SC_LOGIC_0; + out_int2 = 0; + out_resolved = SC_LOGIC_0; + out_rv1 = sc_lv<1>( SC_LOGIC_0 ); + } + + SC_CTOR( mod_a ) + { + SC_METHOD( main_action1 ); + sensitive << clk.pos(); + dont_initialize(); + SC_METHOD( main_action2 ); + sensitive << clk.neg(); + dont_initialize(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal<int> sig_int; + sc_signal<bool> sig_bool; + sc_signal<sc_logic> sig_logic; + sc_buffer<int> buf_int; + sc_signal_resolved sig_resolved; + sc_signal_rv<1> sig_rv1; + + mod_a a("a"); + a(clk, sig_int, sig_bool, sig_logic, buf_int, sig_resolved, sig_rv1); + + sc_start( 20, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test06/golden/test06.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test06/golden/test06.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test06/golden/test06.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test06/test06.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test06/test06.cpp new file mode 100644 index 000000000..ee6ff58ee --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test06/test06.cpp @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test06.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of dynamic design rule checking in signals. + +#define DEBUG_SYSTEMC +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out<int> out_int; + sc_out<bool> out_bool; + sc_out<sc_logic> out_logic; + sc_out<int> out_int2; + sc_out_resolved out_resolved; + sc_out_rv<1> out_rv1; + + void main_action1() + { + out_int = 42; + out_bool = true; + out_logic = SC_LOGIC_1; + out_int2 = 1; + out_resolved = SC_LOGIC_1; + out_rv1 = sc_lv<1>( SC_LOGIC_1 ); + } + + void main_action2() + { + // out_int = 0; + // out_bool = false; + // out_logic = SC_LOGIC_0; + // out_int2 = 0; + out_resolved = SC_LOGIC_0; + out_rv1 = sc_lv<1>( SC_LOGIC_0 ); + } + + SC_CTOR( mod_a ) + { + SC_METHOD( main_action1 ); + sensitive << clk.pos(); + dont_initialize(); + SC_METHOD( main_action2 ); + sensitive << clk.neg(); + dont_initialize(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal<int> sig_int; + sc_signal<bool> sig_bool; + sc_signal<sc_logic> sig_logic; + sc_buffer<int> buf_int; + sc_signal_resolved sig_resolved; + sc_signal_rv<1> sig_rv1; + + mod_a a("a"); + a(clk, sig_int, sig_bool, sig_logic, buf_int, sig_resolved, sig_rv1); + + sc_start( 20, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test07/golden/test07.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test07/golden/test07.log new file mode 100644 index 000000000..fa5aabca2 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test07/golden/test07.log @@ -0,0 +1,8 @@ +SystemC Simulation + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `signal_1' (sc_signal) + first driver `a.main_action1' (sc_method_process) + second driver `a.main_action2' (sc_method_process) +In file: <removed by verify.pl> +In process: a.main_action2 @ 500 ps diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test07/test07.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test07/test07.cpp new file mode 100644 index 000000000..89a9d6566 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test07/test07.cpp @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test07.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: Andy Goodrich, Forte Design Systems, 15 Oct 2003 + Description of Modification: + + *****************************************************************************/ + +// test of dynamic design rule checking in specialized signals. + +#define DEBUG_SYSTEMC +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out<int> out_int; + sc_out<sc_uint<1> > out_uint; + sc_out<sc_logic> out_logic; + sc_out<int> out_int2; + sc_out_resolved out_resolved; + sc_out_rv<1> out_rv1; + + void main_action1() + { + out_int = 42; + out_uint = 1; + out_logic = SC_LOGIC_1; + out_int2 = 1; + out_resolved = SC_LOGIC_1; + out_rv1 = sc_lv<1>( SC_LOGIC_1 ); + } + + void main_action2() + { + // out_int = 0; + out_uint = 0; + out_logic = SC_LOGIC_0; + out_int2 = 0; + out_resolved = SC_LOGIC_0; + out_rv1 = sc_lv<1>( SC_LOGIC_0 ); + } + + SC_CTOR( mod_a ) + { + SC_METHOD( main_action1 ); + sensitive << clk.pos(); + dont_initialize(); + SC_METHOD( main_action2 ); + sensitive << clk.neg(); + dont_initialize(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal<int> sig_int; + sc_signal<sc_uint<1> > sig_bool; + sc_signal<sc_logic> sig_logic; + sc_buffer<int> buf_int; + sc_signal_resolved sig_resolved; + sc_signal_rv<1> sig_rv1; + + mod_a a("a"); + a(clk, sig_int, sig_bool, sig_logic, buf_int, sig_resolved, sig_rv1); + + sc_start( 20, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test08/golden/test08.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test08/golden/test08.log new file mode 100644 index 000000000..2d63f201f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test08/golden/test08.log @@ -0,0 +1,7 @@ +SystemC Simulation + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `signal_0' (sc_signal) + first driver `a.port_2' (sc_out) + second driver `a.port_1' (sc_out) +In file: <removed by verify.pl> diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test08/test08.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test08/test08.cpp new file mode 100644 index 000000000..52f3f54ad --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test08/test08.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test08.cpp -- Test detection of two write ports connected to one signal + + Original Author: Andy Goodrich, Forte Design Systems, 15 Oct 2003 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test register port for more than one writer + +#define DEBUG_SYSTEMC +#include "systemc.h" +typedef int target; + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out<target> out_target; + sc_out<target> out_target2; + + SC_CTOR( mod_a ) + { + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal<target> sig_target; + + mod_a a("a"); + a(clk, sig_target, sig_target); + + sc_start(1, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test09/golden/test09.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test09/golden/test09.log new file mode 100644 index 000000000..2d63f201f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test09/golden/test09.log @@ -0,0 +1,7 @@ +SystemC Simulation + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `signal_0' (sc_signal) + first driver `a.port_2' (sc_out) + second driver `a.port_1' (sc_out) +In file: <removed by verify.pl> diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test09/test09.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test09/test09.cpp new file mode 100644 index 000000000..daf15072d --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test09/test09.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test08.cpp -- + + Original Author: Andy Goodrich, Forte Design Systems, 15 Oct 2003 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test register port for more than one writer + +#define DEBUG_SYSTEMC +#include "systemc.h" +typedef sc_bigint<5> target; + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out<target> out_target; + sc_out<target> out_target2; + + SC_CTOR( mod_a ) + { + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal<target> sig_target; + + mod_a a("a"); + a(clk, sig_target, sig_target); + + sc_start(1, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test10/golden/test10.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test10/golden/test10.log new file mode 100644 index 000000000..2d63f201f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test10/golden/test10.log @@ -0,0 +1,7 @@ +SystemC Simulation + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `signal_0' (sc_signal) + first driver `a.port_2' (sc_out) + second driver `a.port_1' (sc_out) +In file: <removed by verify.pl> diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test10/test10.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test10/test10.cpp new file mode 100644 index 000000000..7844e1307 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test10/test10.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test08.cpp -- + + Original Author: Andy Goodrich, Forte Design Systems, 15 Oct 2003 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test register port for more than one writer + +#define DEBUG_SYSTEMC +#include "systemc.h" +typedef sc_biguint<5> target; + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out<target> out_target; + sc_out<target> out_target2; + + SC_CTOR( mod_a ) + { + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal<target> sig_target; + + mod_a a("a"); + a(clk, sig_target, sig_target); + + sc_start(1, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test11/golden/test11.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test11/golden/test11.log new file mode 100644 index 000000000..2d63f201f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test11/golden/test11.log @@ -0,0 +1,7 @@ +SystemC Simulation + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `signal_0' (sc_signal) + first driver `a.port_2' (sc_out) + second driver `a.port_1' (sc_out) +In file: <removed by verify.pl> diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test11/test11.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test11/test11.cpp new file mode 100644 index 000000000..aa3bafa85 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test11/test11.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test10.cpp -- Test detection of two write ports connected to 1 signal. + + Original Author: Andy Goodrich, Forte Design Systems, 15 Oct 2003 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test register port for more than one writer + +#define DEBUG_SYSTEMC +#include "systemc.h" +typedef sc_int<5> target; + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out<target> out_target; + sc_out<target> out_target2; + + SC_CTOR( mod_a ) + { + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal<target> sig_target; + + mod_a a("a"); + a(clk, sig_target, sig_target); + + sc_start(1, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test12/golden/test12.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test12/golden/test12.log new file mode 100644 index 000000000..2d63f201f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test12/golden/test12.log @@ -0,0 +1,7 @@ +SystemC Simulation + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `signal_0' (sc_signal) + first driver `a.port_2' (sc_out) + second driver `a.port_1' (sc_out) +In file: <removed by verify.pl> diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test12/test12.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test12/test12.cpp new file mode 100644 index 000000000..dd638238e --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test12/test12.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test10.cpp -- Test detection of two write ports connected to 1 signal. + + Original Author: Andy Goodrich, Forte Design Systems, 15 Oct 2003 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test register port for more than one writer + +#define DEBUG_SYSTEMC +#include "systemc.h" +typedef sc_uint<5> target; + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out<target> out_target; + sc_out<target> out_target2; + + SC_CTOR( mod_a ) + { + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal<target> sig_target; + + mod_a a("a"); + a(clk, sig_target, sig_target); + + sc_start(1, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test13/golden/test13.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test13/golden/test13.log new file mode 100644 index 000000000..0d934d401 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test13/golden/test13.log @@ -0,0 +1,2 @@ +SystemC Simulation +Program completed diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test13/test13.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test13/test13.cpp new file mode 100644 index 000000000..93c3b2124 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test13/test13.cpp @@ -0,0 +1,73 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test13.cpp -- Test detection of write from process and sc_main. + + Original Author: Andy Goodrich, Forte Design Systems, 02 Apr 2007 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_CTHREAD(thread,m_clk.pos()); + } + void thread() + { + m_data = false; + for (;;) + { + wait(); + } + } + sc_in<bool> m_clk; + sc_out<bool> m_data; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + sc_signal<bool> data; + DUT dut("dut"); + + dut.m_clk(clock); + dut.m_data(data); + + sc_start(1, SC_NS); + data = true; + sc_start(1, SC_NS); + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test14/golden/test14.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test14/golden/test14.log new file mode 100644 index 000000000..f9660d5a8 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test14/golden/test14.log @@ -0,0 +1,8 @@ +SystemC Simulation + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p2' (sc_thread_process) + second driver `dut.p1' (sc_thread_process) +In file: <removed by verify.pl> +In process: dut.p1 @ 10 ns diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test14/test14.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test14/test14.cpp new file mode 100644 index 000000000..aa1ffbc6f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test14/test14.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test14.cpp -- sc_writer_policy: writer check with terminated writer + + Original Author: Philipp A. Hartmann, OFFIS, 2014-11-15 + + *****************************************************************************/ + +// see https://github.com/OSCI-WG/systemc/issues/104 + +#include <systemc> + +using sc_core::SC_NS; + +SC_MODULE(dut) +{ + sc_core::sc_signal<int> sig; + + SC_CTOR(dut) + : sig("sig") + { + SC_THREAD(p1); + SC_THREAD(p2); + } + + void p1() { + wait( 10, SC_NS ); + sig.write(1); + } + + void p2() { + wait( 1, SC_NS ); + sig.write(0); + } +}; + +int sc_main( int, char*[] ) +{ + dut top("dut"); + sc_core::sc_start(); + std::cout << "Program completed" << std::endl; + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test15/golden/test15.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test15/golden/test15.log new file mode 100644 index 000000000..0a9ea351f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test15/golden/test15.log @@ -0,0 +1,167 @@ +SystemC Simulation + +*** trigger each driver in individual delta cycles + dut.p1: 1 ns @ 1: writing dut.sig = 1 + dut.run: 1 ns @ 2: reading dut.sig = 1 + dut.p2: 1 ns @ 2: writing dut.sig = 2 + dut.run: 1 ns @ 3: reading dut.sig = 2 + dut.p3: 1 ns @ 3: writing dut.sig = 3 + dut.run: 1 ns @ 4: reading dut.sig = 3 + dut.p4: 1 ns @ 4: writing dut.sig = 1 + dut.run: 1 ns @ 5: reading dut.sig = 1 + +*** trigger 1-2-3 in the same delta cycle + dut.p1: 2 ns @ 6: writing dut.sig = 1 + dut.p2: 2 ns @ 6: writing dut.sig = 2 + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p1' (sc_method_process) + second driver `dut.p2' (sc_method_process) + conflicting write in delta cycle 6 +In file: <removed by verify.pl> +In process: dut.p2 @ 2 ns + + dut.p3: 2 ns @ 6: writing dut.sig = 3 + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p1' (sc_method_process) + second driver `dut.p3' (sc_method_process) + conflicting write in delta cycle 6 +In file: <removed by verify.pl> +In process: dut.p3 @ 2 ns + + dut.run: 2 ns @ 7: reading dut.sig = 1 + +*** trigger 2-3-1 in the same delta cycle + dut.p2: 3 ns @ 8: writing dut.sig = 2 + dut.p3: 3 ns @ 8: writing dut.sig = 3 + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p2' (sc_method_process) + second driver `dut.p3' (sc_method_process) + conflicting write in delta cycle 8 +In file: <removed by verify.pl> +In process: dut.p3 @ 3 ns + + dut.p1: 3 ns @ 8: writing dut.sig = 1 + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p2' (sc_method_process) + second driver `dut.p1' (sc_method_process) + conflicting write in delta cycle 8 +In file: <removed by verify.pl> +In process: dut.p1 @ 3 ns + + dut.run: 3 ns @ 9: reading dut.sig = 2 + +*** trigger 3-1-2 in the same delta cycle + dut.p3: 4 ns @ 10: writing dut.sig = 3 + dut.p1: 4 ns @ 10: writing dut.sig = 1 + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p3' (sc_method_process) + second driver `dut.p1' (sc_method_process) + conflicting write in delta cycle 10 +In file: <removed by verify.pl> +In process: dut.p1 @ 4 ns + + dut.p2: 4 ns @ 10: writing dut.sig = 2 + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p3' (sc_method_process) + second driver `dut.p2' (sc_method_process) + conflicting write in delta cycle 10 +In file: <removed by verify.pl> +In process: dut.p2 @ 4 ns + + dut.run: 4 ns @ 11: reading dut.sig = 3 + +*** trigger 1-2-1-2 in the same delta cycle + dut.p1: 5 ns @ 12: writing dut.sig = 1 + dut.p2: 5 ns @ 12: writing dut.sig = 2 + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p1' (sc_method_process) + second driver `dut.p2' (sc_method_process) + conflicting write in delta cycle 12 +In file: <removed by verify.pl> +In process: dut.p2 @ 5 ns + + dut.p1: 5 ns @ 12: writing dut.sig = 1 + dut.p2: 5 ns @ 12: writing dut.sig = 2 + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p1' (sc_method_process) + second driver `dut.p2' (sc_method_process) + conflicting write in delta cycle 12 +In file: <removed by verify.pl> +In process: dut.p2 @ 5 ns + + dut.run: 5 ns @ 13: reading dut.sig = 1 + +*** trigger 2-1 in the same delta cycle + dut.p2: 6 ns @ 14: writing dut.sig = 2 + dut.p1: 6 ns @ 14: writing dut.sig = 1 + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p2' (sc_method_process) + second driver `dut.p1' (sc_method_process) + conflicting write in delta cycle 14 +In file: <removed by verify.pl> +In process: dut.p1 @ 6 ns + + dut.run: 6 ns @ 15: reading dut.sig = 2 + +*** trigger 1-3 in the same delta cycle + dut.p1: 7 ns @ 16: writing dut.sig = 1 + dut.p3: 7 ns @ 16: writing dut.sig = 3 + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p1' (sc_method_process) + second driver `dut.p3' (sc_method_process) + conflicting write in delta cycle 16 +In file: <removed by verify.pl> +In process: dut.p3 @ 7 ns + + dut.run: 7 ns @ 17: reading dut.sig = 1 + +*** trigger 1-4-1 in the same delta cycle + dut.p1: 8 ns @ 18: writing dut.sig = 1 + dut.p4: 8 ns @ 18: writing dut.sig = 1 + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p1' (sc_method_process) + second driver `dut.p4' (sc_method_process) + conflicting write in delta cycle 18 +In file: <removed by verify.pl> +In process: dut.p4 @ 8 ns + + dut.p1: 8 ns @ 18: writing dut.sig = 1 + dut.run: 8 ns @ 19: reading dut.sig = 1 + +*** trigger 4-1 in the same delta cycle + dut.p4: 9 ns @ 20: writing dut.sig = 1 + dut.p1: 9 ns @ 20: writing dut.sig = 1 + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p4' (sc_method_process) + second driver `dut.p1' (sc_method_process) + conflicting write in delta cycle 20 +In file: <removed by verify.pl> +In process: dut.p1 @ 9 ns + + dut.run: 9 ns @ 21: reading dut.sig = 1 + +Program completed diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test15/test15.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test15/test15.cpp new file mode 100644 index 000000000..1719abe87 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test15/test15.cpp @@ -0,0 +1,175 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test15.cpp -- sc_writer_policy: check conflicts within an evaluation phase + + Original Author: Philipp A. Hartmann, Intel, 2017-05-12 + + *****************************************************************************/ + +// see https://github.com/OSCI-WG/systemc/issues/222 + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include <systemc> +#include <iomanip> +#include <sstream> + +using sc_core::SC_NS; +using sc_core::SC_ZERO_TIME; + +SC_MODULE(dut) +{ + static const int num_drivers = 4; + + SC_CTOR(dut) + : sig("sig") + { + SC_THREAD(run); + for(int id=1; id <= num_drivers; ++id) { + // first and last driver write the same values + spawn_driver( id, (id-1) % (num_drivers-1) + 1 ); + } + } + +private: + void spawn_driver(int id, int value) { + sc_assert( id > 0 && id <= num_drivers ); + sc_core::sc_spawn_options sp; + sp.set_sensitivity(&ev[id-1]); + sp.spawn_method(); + sp.dont_initialize(); + + std::stringstream nm; + nm << "p" << id; + sc_spawn( sc_bind(&dut::driver, this, value), nm.str().c_str(), &sp ); + } + + void run() { + wait(1, SC_NS); + + std::cout << "\n*** trigger each driver in individual delta cycles" << std::endl; + for(int id=1; id <= num_drivers; ++id) { + trigger(id); + wait(SC_ZERO_TIME); + log(); + } + + wait(1, SC_NS); + std::cout << "\n*** trigger 1-2-3 in the same delta cycle" << std::endl; + trigger(1); + trigger(2); // error expected + trigger(3); // error expected + wait(SC_ZERO_TIME); + log(); + + wait(1, SC_NS); + std::cout << "\n*** trigger 2-3-1 in the same delta cycle" << std::endl; + trigger(2); + trigger(3); // error expected + trigger(1); // error expected + wait(SC_ZERO_TIME); + log(); + + wait(1, SC_NS); + std::cout << "\n*** trigger 3-1-2 in the same delta cycle" << std::endl; + trigger(3); + trigger(1); // error expected + trigger(2); // error expected + wait(SC_ZERO_TIME); + log(); + + wait(1, SC_NS); + std::cout << "\n*** trigger 1-2-1-2 in the same delta cycle" << std::endl; + trigger(1); + trigger(2); // error expected + trigger(1); // NO error expected (original process) + trigger(2); // error expected + wait(SC_ZERO_TIME); + log(); + + wait(1, SC_NS); + std::cout << "\n*** trigger 2-1 in the same delta cycle" << std::endl; + trigger(2); + trigger(1); // error expected + wait(SC_ZERO_TIME); + log(); + + wait(1, SC_NS); + std::cout << "\n*** trigger 1-3 in the same delta cycle" << std::endl; + trigger(1); + trigger(3); // error expected + wait(SC_ZERO_TIME); + log(); + + wait(1, SC_NS); + std::cout << "\n*** trigger 1-4-1 in the same delta cycle" << std::endl; + trigger(1); + trigger(4); // error expected? (same value) + trigger(1); // NO error expected (original process) + wait(SC_ZERO_TIME); + log(); + + wait(1, SC_NS); + std::cout << "\n*** trigger 4-1 in the same delta cycle" << std::endl; + trigger(4); + trigger(1); // error expected? (same value) + wait(SC_ZERO_TIME); + log(); + } + + void trigger(int id) { + sc_assert( id > 0 && id <= num_drivers ); + ev[id-1].notify(); + wait(ev_schedule); + } + + void driver(int value) { + log(value); + try { + sig.write(value); + } catch (const sc_core::sc_report& msg ) { + std::cout << "\n" << msg.what() << "\n" << std::endl; + } + ev_schedule.notify(); + } + + void log(int value = -1) { + std::cout + << std::setw(8) << sc_core::sc_get_current_process_handle().name() << ": " + << std::setw(5) << sc_core::sc_time_stamp() + << " @ " << std::setw(2) << sc_core::sc_delta_count() << ": " + << ( (value!=-1) ? "writing " : "reading " ) + << sig.name() << " = " + << ( (value!=-1) ? value : sig.read() ) + << std::endl; + } + + sc_core::sc_signal<int, sc_core::SC_MANY_WRITERS> sig; + sc_core::sc_event ev_schedule, ev[num_drivers]; +}; + +int sc_main( int, char*[] ) +{ + dut top("dut"); + sc_core::sc_start(); + std::cout << "\nProgram completed" << std::endl; + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test16/golden/test16.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test16/golden/test16.log new file mode 100644 index 000000000..248e4b616 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test16/golden/test16.log @@ -0,0 +1,115 @@ +SystemC Simulation + +*** trigger each driver in individual delta cycles + + dut.p1: 1 ns @ 1: writing dut.sig = 1 + + dut.run: 1 ns @ 2: reading dut.sig = 1 + + dut.p2: 1 ns @ 2: writing dut.sig = 2 + + dut.run: 1 ns @ 3: reading dut.sig = 2 + + dut.p3: 1 ns @ 3: writing dut.sig = 1 + + dut.run: 1 ns @ 4: reading dut.sig = 1 + +*** trigger 1-2-3 in the same delta cycle + + dut.p1: 2 ns @ 5: writing dut.sig = 1 + + dut.p2: 2 ns @ 5: writing dut.sig = 2 + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p1' (sc_method_process) + second driver `dut.p2' (sc_method_process) + conflicting write in delta cycle 5 +In file: <removed by verify.pl> +In process: dut.p2 @ 2 ns + + dut.p3: 2 ns @ 5: writing dut.sig = 1 + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p2' (sc_method_process) + second driver `dut.p3' (sc_method_process) + conflicting write in delta cycle 5 +In file: <removed by verify.pl> +In process: dut.p3 @ 2 ns + + dut.run: 2 ns @ 6: reading dut.sig = 1 + +*** trigger 2-3-1 in the same delta cycle + + dut.p2: 3 ns @ 7: writing dut.sig = 2 + + dut.p3: 3 ns @ 7: writing dut.sig = 1 + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p2' (sc_method_process) + second driver `dut.p3' (sc_method_process) + conflicting write in delta cycle 7 +In file: <removed by verify.pl> +In process: dut.p3 @ 3 ns + + dut.p1: 3 ns @ 7: writing dut.sig = 1 + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p3' (sc_method_process) + second driver `dut.p1' (sc_method_process) + conflicting write in delta cycle 7 +In file: <removed by verify.pl> +In process: dut.p1 @ 3 ns + + dut.run: 3 ns @ 8: reading dut.sig = 1 + +*** trigger 3-1-2 in the same delta cycle + + dut.p3: 4 ns @ 9: writing dut.sig = 1 + + dut.p1: 4 ns @ 9: writing dut.sig = 1 + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p3' (sc_method_process) + second driver `dut.p1' (sc_method_process) + conflicting write in delta cycle 9 +In file: <removed by verify.pl> +In process: dut.p1 @ 4 ns + + dut.p2: 4 ns @ 9: writing dut.sig = 2 + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p1' (sc_method_process) + second driver `dut.p2' (sc_method_process) + conflicting write in delta cycle 9 +In file: <removed by verify.pl> +In process: dut.p2 @ 4 ns + + dut.run: 4 ns @ 10: reading dut.sig = 2 + +*** trigger 1-1-2-2 in the same delta cycle + + dut.p1: 5 ns @ 11: writing dut.sig = 1 + + dut.p1: 5 ns @ 11: writing dut.sig = 1 + + dut.p2: 5 ns @ 11: writing dut.sig = 2 + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p1' (sc_method_process) + second driver `dut.p2' (sc_method_process) + conflicting write in delta cycle 11 +In file: <removed by verify.pl> +In process: dut.p2 @ 5 ns + + dut.p2: 5 ns @ 11: writing dut.sig = 2 + + dut.run: 5 ns @ 12: reading dut.sig = 2 + +Program completed diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test16/test16.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test16/test16.cpp new file mode 100644 index 000000000..a295b6540 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test16/test16.cpp @@ -0,0 +1,158 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test16.cpp -- sc_writer_policy: test SC_SIGNAL_WRITE_CHECK=CONFLICT + + Original Author: Philipp A. Hartmann, Intel, 2017-05-12 + + *****************************************************************************/ + +// see https://github.com/OSCI-WG/systemc/issues/222 + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include <systemc> +#include <iomanip> +#include <sstream> + +using sc_core::SC_NS; +using sc_core::SC_ZERO_TIME; + +SC_MODULE(dut) +{ + static const int num_drivers = 3; + + SC_CTOR(dut) + : sig("sig") + { + SC_THREAD(run); + for(int id=1; id <= num_drivers; ++id) { + // first and last driver write the same values + spawn_driver( id, (id-1) % (num_drivers-1) + 1 ); + } + } + +private: + void spawn_driver(int id, int value) { + sc_assert( id > 0 && id <= num_drivers ); + sc_core::sc_spawn_options sp; + sp.set_sensitivity(&ev[id-1]); + sp.spawn_method(); + sp.dont_initialize(); + + std::stringstream nm; + nm << "p" << id; + sc_spawn( sc_bind(&dut::driver, this, value), nm.str().c_str(), &sp ); + } + + void run() { + wait(1, SC_NS); + + std::cout << "\n*** trigger each driver in individual delta cycles" << std::endl; + for(int id=1; id <= num_drivers; ++id) { + trigger(id); // NO error expected (environment override) + wait(SC_ZERO_TIME); + log(); + } + + wait(1, SC_NS); + std::cout << "\n*** trigger 1-2-3 in the same delta cycle" << std::endl; + trigger(1); + trigger(2); // error expected + trigger(3); // error expected + wait(SC_ZERO_TIME); + log(); + + wait(1, SC_NS); + std::cout << "\n*** trigger 2-3-1 in the same delta cycle" << std::endl; + trigger(2); + trigger(3); // error expected + trigger(1); // error expected + wait(SC_ZERO_TIME); + log(); + + wait(1, SC_NS); + std::cout << "\n*** trigger 3-1-2 in the same delta cycle" << std::endl; + trigger(3); + trigger(1); // error expected + trigger(2); // error expected + wait(SC_ZERO_TIME); + log(); + + wait(1, SC_NS); + std::cout << "\n*** trigger 1-1-2-2 in the same delta cycle" << std::endl; + trigger(1); + trigger(1); // NO error expected (current process) + trigger(2); // error expected + trigger(2); // NO error expected (current process) + wait(SC_ZERO_TIME); + log(); + } + + void trigger(int id) { + sc_assert( id > 0 && id <= num_drivers ); + ev[id-1].notify(); + wait(ev_schedule); + } + + void driver(int value) { + log(value); + sig.write(value); // errors suppressed via report handler below + ev_schedule.notify(); + } + + void log(int value = -1) { + std::cout + << "\n" + << std::setw(8) << sc_core::sc_get_current_process_handle().name() << ": " + << std::setw(5) << sc_core::sc_time_stamp() + << " @ " << std::setw(2) << sc_core::sc_delta_count() << ": " + << ( (value!=-1) ? "writing " : "reading " ) + << sig.name() << " = " + << ( (value!=-1) ? value : sig.read() ) + << std::endl; + } + + sc_core::sc_signal<int, sc_core::SC_ONE_WRITER> sig; // use single-writer signal + sc_core::sc_event ev_schedule, ev[num_drivers]; +}; + +#ifdef _WIN32 +#define putenv _putenv // Windows deprecates putenv +#endif + +int sc_main( int, char*[] ) +{ + // prepare environment variable (takes a char*) + putenv(const_cast<char*>("SC_SIGNAL_WRITE_CHECK=CONFLICT")); + // and reset simulation context to pick it up (non-standard) + sc_core::sc_get_curr_simcontext()->reset(); + + // report multiple writer errors as warnings + sc_core::sc_report_handler::set_actions( + sc_core::SC_ID_MORE_THAN_ONE_SIGNAL_DRIVER_ + , sc_core::SC_DEFAULT_WARNING_ACTIONS + ); + + dut top("dut"); + sc_core::sc_start(); + std::cout << "\nProgram completed" << std::endl; + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/constructors/golden/test01.log b/src/systemc/tests/systemc/communication/sc_signal/constructors/golden/test01.log new file mode 100644 index 000000000..ddbc3ca3d --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/constructors/golden/test01.log @@ -0,0 +1,13 @@ +SystemC Simulation +signal_0 = 0 +sig2 = 0 +sig3 = 42 + +signal_1 = 0 +sig2 = 0 +sig3 = 1 + +signal_2 = X +sig2 = X +sig3 = 0 + diff --git a/src/systemc/tests/systemc/communication/sc_signal/constructors/test01.cpp b/src/systemc/tests/systemc/communication/sc_signal/constructors/test01.cpp new file mode 100644 index 000000000..d8ee215b5 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/constructors/test01.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// sc_signal test; +// constructors + +#include "systemc.h" + +template <class T> +void +test_constructors( T const & val = T() ) +{ + sc_signal<T> sig1; + sc_signal<T> sig2( "sig2" ); + sc_signal<T> sig3( "sig3", val ); + + cout << sig1.name() << " = " << sig1.read() << endl; + cout << sig2.name() << " = " << sig2.read() << endl; + cout << sig3.name() << " = " << sig3.read() << endl; + cout << endl; +} + +int +sc_main( int, char*[] ) +{ + test_constructors( 42 ); + + // bool specialization + test_constructors( true ); + + // sc_logic specialization + test_constructors( SC_LOGIC_0 ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/datatypes/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_signal/datatypes/test01/golden/test01.log new file mode 100644 index 000000000..8e6c47049 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/datatypes/test01/golden/test01.log @@ -0,0 +1,2 @@ +SystemC Simulation +123 diff --git a/src/systemc/tests/systemc/communication/sc_signal/datatypes/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_signal/datatypes/test01/test01.cpp new file mode 100644 index 000000000..a6c5657d1 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/datatypes/test01/test01.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of signals with user-defined datatypes +// -- operator =, operator ==, and operator << must be defined +// -- sc_trace() does not have to be defined (unless used) +// -- here, sc_trace() is not defined and not used + +#include "systemc.h" + +class my_datatype +{ +public: + my_datatype() + : m_val( 0 ) {} + my_datatype( int val_ ) + : m_val( val_ ) {} + my_datatype( const my_datatype& a ) + : m_val( a.m_val ) {} + ~my_datatype() + {} + my_datatype& operator = ( const my_datatype& a ) + { m_val = a.m_val; return *this; } + friend bool operator == ( const my_datatype& a, const my_datatype& b ) + { return ( a.m_val == b.m_val ); } + void print( ostream& os ) const + { os << m_val; } +private: + int m_val; +}; + +ostream& +operator << ( ostream& os, const my_datatype& a ) +{ + a.print( os ); + return os; +} + +int +sc_main( int, char*[] ) +{ + my_datatype a( 123 ); + a.print( cout ); + cout << endl; + + sc_signal<my_datatype> sig; + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/datatypes/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_signal/datatypes/test02/golden/test02.log new file mode 100644 index 000000000..597bc2ef1 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/datatypes/test02/golden/test02.log @@ -0,0 +1,12 @@ +SystemC Simulation +123 +10 +9 +8 +7 +6 +5 +4 +3 +2 +1 diff --git a/src/systemc/tests/systemc/communication/sc_signal/datatypes/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_signal/datatypes/test02/test02.cpp new file mode 100644 index 000000000..474aa3e79 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/datatypes/test02/test02.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of signals with user-defined datatypes +// -- operator =, operator ==, and operator << must be defined +// -- sc_trace() does not have to be defined (unless used) +// -- here, sc_trace() is defined and used + +#include "systemc.h" + +class my_datatype +{ +public: + my_datatype() + : m_val( 0 ) {} + my_datatype( int val_ ) + : m_val( val_ ) {} + my_datatype( const my_datatype& a ) + : m_val( a.m_val ) {} + ~my_datatype() + {} + my_datatype& operator = ( const my_datatype& a ) + { m_val = a.m_val; return *this; } + friend bool operator == ( const my_datatype& a, const my_datatype& b ) + { return ( a.m_val == b.m_val ); } + friend void sc_trace( sc_trace_file* tf, const my_datatype& a, + const std::string& name ) + { sc_core::sc_trace( tf, a.m_val, name ); } + void print( ostream& os ) const + { os << m_val; } +private: + int m_val; +}; + +ostream& +operator << ( ostream& os, const my_datatype& a ) +{ + a.print( os ); + return os; +} + +int +sc_main( int, char*[] ) +{ + my_datatype a( 123 ); + a.print( cout ); + cout << endl; + + sc_signal<my_datatype> sig; + + sc_trace_file* tf = sc_create_vcd_trace_file( "test02" ); + sc_trace( tf, sig, "sig" ); + for( int i = 0; i < 10; ++ i ) { + sig = my_datatype( 10 - i ); + sc_start( 1, SC_NS ); + cout << sig.read() << endl; + } + sc_close_vcd_trace_file( tf ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/register_port/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_signal/register_port/test01/golden/test01.log new file mode 100644 index 000000000..1b061bb5f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/register_port/test01/golden/test01.log @@ -0,0 +1,7 @@ +SystemC Simulation + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `t1.signal_0' (sc_signal) + first driver `t1.w2.port_0' (sc_out) + second driver `t1.w1.port_0' (sc_out) +In file: <removed by verify.pl> diff --git a/src/systemc/tests/systemc/communication/sc_signal/register_port/test01/test.h b/src/systemc/tests/systemc/communication/sc_signal/register_port/test01/test.h new file mode 100644 index 000000000..77f579f41 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/register_port/test01/test.h @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// sc_signal test; +// interface methods -- register_port() + +#ifndef TEST_H +#define TEST_H + +#include "systemc.h" + +template <class T> +class writer +: public sc_module +{ +public: + + // output port + sc_out<T> out; + + // constructor + writer( sc_module_name ) + {} +}; + +template <class T> +class top +: public sc_module +{ +public: + + // channel + sc_signal<T> sig; + + // modules + writer<T> w1; + writer<T> w2; + + // constructor + top( sc_module_name ) + : sig(), w1( "w1" ), w2( "w2" ) + { + w1.out( sig ); + w2.out( sig ); + } +}; + +#endif + +// Taf! diff --git a/src/systemc/tests/systemc/communication/sc_signal/register_port/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_signal/register_port/test01/test01.cpp new file mode 100644 index 000000000..3e343bf86 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/register_port/test01/test01.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// sc_signal test; +// interface methods -- register_port() -- T + +#include "test.h" + +int +sc_main( int, char*[] ) +{ + top<int> t1( "t1" ); + + sc_start(0, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/register_port/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_signal/register_port/test02/golden/test02.log new file mode 100644 index 000000000..1b061bb5f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/register_port/test02/golden/test02.log @@ -0,0 +1,7 @@ +SystemC Simulation + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `t1.signal_0' (sc_signal) + first driver `t1.w2.port_0' (sc_out) + second driver `t1.w1.port_0' (sc_out) +In file: <removed by verify.pl> diff --git a/src/systemc/tests/systemc/communication/sc_signal/register_port/test02/test.h b/src/systemc/tests/systemc/communication/sc_signal/register_port/test02/test.h new file mode 100644 index 000000000..77f579f41 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/register_port/test02/test.h @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// sc_signal test; +// interface methods -- register_port() + +#ifndef TEST_H +#define TEST_H + +#include "systemc.h" + +template <class T> +class writer +: public sc_module +{ +public: + + // output port + sc_out<T> out; + + // constructor + writer( sc_module_name ) + {} +}; + +template <class T> +class top +: public sc_module +{ +public: + + // channel + sc_signal<T> sig; + + // modules + writer<T> w1; + writer<T> w2; + + // constructor + top( sc_module_name ) + : sig(), w1( "w1" ), w2( "w2" ) + { + w1.out( sig ); + w2.out( sig ); + } +}; + +#endif + +// Taf! diff --git a/src/systemc/tests/systemc/communication/sc_signal/register_port/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_signal/register_port/test02/test02.cpp new file mode 100644 index 000000000..f62a0e86b --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/register_port/test02/test02.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// sc_signal test; +// interface methods -- register_port() -- bool + +#include "test.h" + +int +sc_main( int, char*[] ) +{ + top<bool> t1( "t1" ); + + sc_start(0, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/register_port/test03/golden/test03.log b/src/systemc/tests/systemc/communication/sc_signal/register_port/test03/golden/test03.log new file mode 100644 index 000000000..1b061bb5f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/register_port/test03/golden/test03.log @@ -0,0 +1,7 @@ +SystemC Simulation + +Error: (E115) sc_signal<T> cannot have more than one driver: + signal `t1.signal_0' (sc_signal) + first driver `t1.w2.port_0' (sc_out) + second driver `t1.w1.port_0' (sc_out) +In file: <removed by verify.pl> diff --git a/src/systemc/tests/systemc/communication/sc_signal/register_port/test03/test.h b/src/systemc/tests/systemc/communication/sc_signal/register_port/test03/test.h new file mode 100644 index 000000000..77f579f41 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/register_port/test03/test.h @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// sc_signal test; +// interface methods -- register_port() + +#ifndef TEST_H +#define TEST_H + +#include "systemc.h" + +template <class T> +class writer +: public sc_module +{ +public: + + // output port + sc_out<T> out; + + // constructor + writer( sc_module_name ) + {} +}; + +template <class T> +class top +: public sc_module +{ +public: + + // channel + sc_signal<T> sig; + + // modules + writer<T> w1; + writer<T> w2; + + // constructor + top( sc_module_name ) + : sig(), w1( "w1" ), w2( "w2" ) + { + w1.out( sig ); + w2.out( sig ); + } +}; + +#endif + +// Taf! diff --git a/src/systemc/tests/systemc/communication/sc_signal/register_port/test03/test03.cpp b/src/systemc/tests/systemc/communication/sc_signal/register_port/test03/test03.cpp new file mode 100644 index 000000000..cc94eed68 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/register_port/test03/test03.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// sc_signal test; +// interface methods -- register_port() -- sc_logic + +#include "test.h" + +int +sc_main( int, char*[] ) +{ + top<sc_logic> t1( "t1" ); + + sc_start(0, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal_ports/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_signal_ports/test01/golden/test01.log new file mode 100644 index 000000000..9098253a7 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_ports/test01/golden/test01.log @@ -0,0 +1,9 @@ +SystemC Simulation +0 +0 +X +XXXX +2 +1 +1 +1111 diff --git a/src/systemc/tests/systemc/communication/sc_signal_ports/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_signal_ports/test01/test01.cpp new file mode 100644 index 000000000..f321f6c21 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_ports/test01/test01.cpp @@ -0,0 +1,89 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of the initialize() method in output signal ports + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_out<int> out_int; + sc_out<bool> out_bool; + sc_out<sc_logic> out_logic; + sc_out_rv<4> out_rv4; + + SC_CTOR( mod_a ) + { + out_int.initialize( 1 ); + out_int.initialize( 2 ); + out_bool.initialize( true ); + out_logic.initialize( sc_dt::Log_Z ); + out_logic.initialize( sc_dt::Log_1 ); + out_rv4.initialize( sc_lv<4>( "ZZZZ" ) ); + out_rv4.initialize( sc_lv<4>( "1111" ) ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_signal<int> sig_int; + sc_signal<bool> sig_bool; + sc_signal<sc_logic> sig_logic; + sc_signal_rv<4> sig_rv4; + + mod_a a( "a" ); + + a.out_int( sig_int ); + a.out_bool( sig_bool ); + a.out_logic( sig_logic ); + a.out_rv4( sig_rv4 ); + + cout << sig_int << endl; + cout << sig_bool << endl; + cout << sig_logic << endl; + cout << sig_rv4 << endl; + + sc_start(0, SC_NS); + + cout << sig_int << endl; + cout << sig_bool << endl; + cout << sig_logic << endl; + cout << sig_rv4 << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal_ports/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_signal_ports/test02/golden/test02.log new file mode 100644 index 000000000..a692610c0 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_ports/test02/golden/test02.log @@ -0,0 +1,13 @@ +SystemC Simulation +in_int default_event() +in_int value_changed_event() +in_bool default_event() +in_bool value_changed_event() +in_bool posedge_event() +in_bool negedge_event() +in_logic default_event() +in_logic value_changed_event() +in_logic posedge_event() +in_logic negedge_event() + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/communication/sc_signal_ports/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_signal_ports/test02/test02.cpp new file mode 100644 index 000000000..230056a62 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_ports/test02/test02.cpp @@ -0,0 +1,137 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of signal port event methods + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in<int> in_int; + sc_in<bool> in_bool; + sc_in<sc_logic> in_logic; + + void main_action() + { + wait( in_int.default_event() ); + cout << "in_int default_event()" << endl; + wait( in_int.value_changed_event() ); + cout << "in_int value_changed_event()" << endl; + + wait( in_bool.default_event() ); + cout << "in_bool default_event()" << endl; + wait( in_bool.value_changed_event() ); + cout << "in_bool value_changed_event()" << endl; + wait( in_bool.posedge_event() ); + cout << "in_bool posedge_event()" << endl; + wait( in_bool.negedge_event() ); + cout << "in_bool negedge_event()" << endl; + + wait( in_logic.default_event() ); + cout << "in_logic default_event()" << endl; + wait( in_logic.value_changed_event() ); + cout << "in_logic value_changed_event()" << endl; + wait( in_logic.posedge_event() ); + cout << "in_logic posedge_event()" << endl; + wait( in_logic.negedge_event() ); + cout << "in_logic negedge_event()" << endl; + + sc_stop(); + } + + SC_CTOR( mod_a ) + { + SC_THREAD( main_action ); + } +}; + +SC_MODULE( mod_b ) +{ + sc_in_clk clk; + + sc_out<bool> out_bool; + sc_out<int> out_int; + sc_out<sc_logic> out_logic; + + void main_action() + { + int i = 0; + bool b = false; + sc_logic l = SC_LOGIC_0; + while( true ) { + wait(); + out_int.write( i ); + i ++; + out_bool.write( b ); + b = !b; + out_logic.write( l ); + l = ~l; + } + } + + SC_CTOR( mod_b ) + { + SC_THREAD( main_action ); + sensitive << clk.pos(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk( "clk", 10, SC_NS ); + + mod_a a( "a" ); + mod_b b( "b" ); + + sc_signal<int> sig_int; + sc_signal<bool> sig_bool; + sc_signal<sc_logic> sig_logic; + + b.clk( clk ); + b.out_bool( sig_bool ); + b.out_int( sig_int ); + b.out_logic( sig_logic ); + + a.in_int( sig_int ); + a.in_bool( sig_bool ); + a.in_logic( sig_logic ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal_resolved/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_signal_resolved/test01/golden/test01.log new file mode 100644 index 000000000..a6bb9d360 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_resolved/test01/golden/test01.log @@ -0,0 +1,17 @@ +SystemC Simulation +0 0 -> 0 +0 1 -> X +0 Z -> 0 +0 X -> X +1 0 -> X +1 1 -> 1 +1 Z -> 1 +1 X -> X +Z 0 -> 0 +Z 1 -> 1 +Z Z -> Z +Z X -> X +X 0 -> X +X 1 -> X +X Z -> X +X X -> X diff --git a/src/systemc/tests/systemc/communication/sc_signal_resolved/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_signal_resolved/test01/test01.cpp new file mode 100644 index 000000000..191e974dd --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_resolved/test01/test01.cpp @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_signal_resolved + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + // ports + sc_out_resolved out1; + sc_out_resolved out2; + sc_in_resolved in; + + // variables + sc_logic l1; + sc_logic l2; + + // events + sc_event ready1; + sc_event ready2; + + void out_action1() + { + for( int i = 0; i < 4; ++ i ) { + l1 = sc_dt::sc_logic_value_t( i ); + for( int j = 0; j < 4; ++j ) { + out1.write( l1 ); + wait( 1, SC_NS ); + ready1.notify(); + wait( SC_ZERO_TIME ); + } + } + } + + void out_action2() + { + for( int i = 0; i < 4; ++ i ) { + for( int j = 0; j < 4; ++ j ) { + l2 = sc_dt::sc_logic_value_t( j ); + out2.write( l2 ); + wait( 1, SC_NS ); + ready2.notify(); + wait( SC_ZERO_TIME ); + } + } + } + + void in_action() + { + for( int i = 0; i < 16; ++ i ) { + wait( ready1 & ready2 ); + cout << l1 << " " << l2 << " -> " << in.read() << endl; + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( out_action1 ); + SC_THREAD( out_action2 ); + SC_THREAD( in_action ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_signal_resolved sig; + + mod_a a( "a" ); + + a.out1( sig ); + a.out2( sig ); + a.in( sig ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal_resolved/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_signal_resolved/test02/golden/test02.log new file mode 100644 index 000000000..35f526382 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_resolved/test02/golden/test02.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E117) resolved port not bound to resolved signal: port 'a.port_2' (sc_in_resolved) +In file: <removed by verify.pl> diff --git a/src/systemc/tests/systemc/communication/sc_signal_resolved/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_signal_resolved/test02/test02.cpp new file mode 100644 index 000000000..8c41eec53 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_resolved/test02/test02.cpp @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_signal_resolved port classes. + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + // ports + sc_out_resolved out1; + sc_out_resolved out2; + sc_in_resolved in; + + // variables + sc_logic l1; + sc_logic l2; + + // events + sc_event ready1; + sc_event ready2; + + void out_action1() + { + for( int i = 0; i < 4; ++ i ) { + l1 = sc_dt::sc_logic_value_t( i ); + for( int j = 0; j < 4; ++j ) { + out1.write( l1 ); + wait( 1, SC_NS ); + ready1.notify(); + wait( SC_ZERO_TIME ); + } + } + } + + void out_action2() + { + for( int i = 0; i < 4; ++ i ) { + for( int j = 0; j < 4; ++ j ) { + l2 = sc_dt::sc_logic_value_t( j ); + out2.write( l2 ); + wait( 1, SC_NS ); + ready2.notify(); + wait( SC_ZERO_TIME ); + } + } + } + + void in_action() + { + for( int i = 0; i < 16; ++ i ) { + wait( ready1 & ready2 ); + cout << l1 << " " << l2 << " -> " << in.read() << endl; + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( out_action1 ); + SC_THREAD( out_action2 ); + SC_THREAD( in_action ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_signal_resolved sig_resolved; + sc_signal<sc_logic> sig_logic; + + mod_a a( "a" ); + + a.out1( sig_resolved ); + a.out2( sig_logic ); + a.in( sig_logic ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal_resolved/test03/golden/test03.log b/src/systemc/tests/systemc/communication/sc_signal_resolved/test03/golden/test03.log new file mode 100644 index 000000000..812fad951 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_resolved/test03/golden/test03.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E117) resolved port not bound to resolved signal: port 'a.port_1' (sc_out_resolved) +In file: <removed by verify.pl> diff --git a/src/systemc/tests/systemc/communication/sc_signal_resolved/test03/test03.cpp b/src/systemc/tests/systemc/communication/sc_signal_resolved/test03/test03.cpp new file mode 100644 index 000000000..e107d211e --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_resolved/test03/test03.cpp @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_signal_resolved port classes. + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + // ports + sc_out_resolved out1; + sc_out_resolved out2; + // sc_in_resolved in; + sc_in<sc_logic> in; + + // variables + sc_logic l1; + sc_logic l2; + + // events + sc_event ready1; + sc_event ready2; + + void out_action1() + { + for( int i = 0; i < 4; ++ i ) { + l1 = sc_dt::sc_logic_value_t( i ); + for( int j = 0; j < 4; ++j ) { + out1.write( l1 ); + wait( 1, SC_NS ); + ready1.notify(); + wait( SC_ZERO_TIME ); + } + } + } + + void out_action2() + { + for( int i = 0; i < 4; ++ i ) { + for( int j = 0; j < 4; ++ j ) { + l2 = sc_dt::sc_logic_value_t( j ); + out2.write( l2 ); + wait( 1, SC_NS ); + ready2.notify(); + wait( SC_ZERO_TIME ); + } + } + } + + void in_action() + { + for( int i = 0; i < 16; ++ i ) { + wait( ready1 & ready2 ); + cout << l1 << " " << l2 << " -> " << in.read() << endl; + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( out_action1 ); + SC_THREAD( out_action2 ); + SC_THREAD( in_action ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_signal_resolved sig_resolved; + sc_signal<sc_logic> sig_logic; + + mod_a a( "a" ); + + a.out1( sig_resolved ); + a.out2( sig_logic ); + a.in( sig_logic ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal_resolved/test04/golden/test04.log b/src/systemc/tests/systemc/communication/sc_signal_resolved/test04/golden/test04.log new file mode 100644 index 000000000..41e76e0af --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_resolved/test04/golden/test04.log @@ -0,0 +1,9 @@ +SystemC Simulation +a.res_sig1 +a.res_sig2 +1. cycle +1 +X +2. cycle +1 +1 diff --git a/src/systemc/tests/systemc/communication/sc_signal_resolved/test04/test04.cpp b/src/systemc/tests/systemc/communication/sc_signal_resolved/test04/test04.cpp new file mode 100644 index 000000000..5915f8377 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_resolved/test04/test04.cpp @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_signal_resolved::operator + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in<bool> clk; + + sc_signal_resolved sig1; + sc_signal_resolved sig2; + + void main_action(){ + sc_logic data('1'); + sig1.write(data); + int i = 1; + + while(1){ + wait(); + cout<<i<<". cycle\n"; + cout<<sig1.read()<<endl; + sig2 = sig1; + cout<<sig2.read()<<endl; + i = i+1; + } + } + + SC_CTOR( mod_a ):sig1("res_sig1"), sig2("res_sig2") + { + SC_THREAD(main_action); + sensitive << clk.pos(); + } +}; + + +int +sc_main( int, char*[] ) +{ + sc_clock clk("clk",5, SC_NS); + mod_a a( "a" ); + a.clk( clk ); + cout<<a.sig1.name()<<endl; + cout<<a.sig2.name()<<endl; + sc_start(10, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal_resolved_port/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_signal_resolved_port/test01/golden/test01.log new file mode 100644 index 000000000..9e6389210 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_resolved_port/test01/golden/test01.log @@ -0,0 +1,17 @@ +SystemC Simulation +b.a.port_0 (sc_in_resolved) +b.a.in_2 (sc_in_resolved) +b.a.port_1 (sc_in_resolved) +b.a.in_4 (sc_in_resolved) +b.a.port_2 (sc_in_resolved) +b.a.port_3 (sc_in_resolved) +b.a.port_4 (sc_inout_resolved) +b.a.port_5 (sc_inout_resolved) +b.a.port_6 (sc_inout_resolved) +b.a.in_out4 (sc_inout_resolved) +b.a.port_7 (sc_inout_resolved) +b.a.in_out6 (sc_inout_resolved) +b.port_0 (sc_in_resolved) +b.input_2 (sc_in_resolved) +b.port_1 (sc_in_resolved) +b.input_4 (sc_in_resolved) diff --git a/src/systemc/tests/systemc/communication/sc_signal_resolved_port/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_signal_resolved_port/test01/test01.cpp new file mode 100644 index 000000000..158910bf6 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_resolved_port/test01/test01.cpp @@ -0,0 +1,119 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_signal_resolved_port constructors + +#include "systemc.h" + + +#define WRITE(a) \ + cout << a.name() << " (" << a.kind() << ")" << endl + + +SC_MODULE( mod_a) +{ + sc_signal_resolved sig_1; + sc_signal_resolved sig_2; + sc_signal_resolved sig_3; + sc_signal_resolved sig_4; + + sc_in_resolved in_1; + sc_in_resolved in_2; + sc_in_resolved in_3; + sc_in_resolved in_4; + sc_in_resolved in_5; + sc_in_resolved in_6; + sc_inout_resolved in_out1; + sc_inout_resolved in_out2; + sc_inout_resolved in_out3; + sc_inout_resolved in_out4; + sc_inout_resolved in_out5; + sc_inout_resolved in_out6; + + SC_CTOR( mod_a ):in_1(), in_2("in_2"), in_4("in_4"), + in_out4("in_out4"), in_out5(), in_out6("in_out6") + { + in_3(sig_1); + in_4(sig_2); + in_out3(sig_3); + in_out4(sig_4); + WRITE(in_1); + WRITE(in_2); + WRITE(in_3); + WRITE(in_4); + WRITE(in_5); + WRITE(in_6); + WRITE(in_out1); + WRITE(in_out2); + WRITE(in_out3); + WRITE(in_out4); + WRITE(in_out5); + WRITE(in_out6); + } +}; + +SC_MODULE(mod_b) +{ + mod_a a; + sc_in_resolved input_1; + sc_in_resolved input_2; + sc_in_resolved input_3; + sc_in_resolved input_4; + + + SC_CTOR( mod_b ):a("a"), input_2("input_2"), input_4("input_4") + { + input_1(a.in_5); + input_2(a.in_6); + input_3(a.in_out1); + input_4(a.in_out2); + WRITE(input_1); + WRITE(input_2); + WRITE(input_3); + WRITE(input_4); + } + + +}; + +int sc_main(int, char* []){ + + mod_b b("b"); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal_resolved_port/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_signal_resolved_port/test02/golden/test02.log new file mode 100644 index 000000000..9d09bf370 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_resolved_port/test02/golden/test02.log @@ -0,0 +1,4 @@ +SystemC Simulation +Z X X X X +Z Z X X X +Z Z Z X X diff --git a/src/systemc/tests/systemc/communication/sc_signal_resolved_port/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_signal_resolved_port/test02/test02.cpp new file mode 100644 index 000000000..bad264179 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_resolved_port/test02/test02.cpp @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_inout_resolved::operator= + +#include "systemc.h" + + +SC_MODULE( mod_a) +{ + sc_inout_resolved in_out1; + sc_inout_resolved in_out2; + sc_inout_resolved in_out3; + sc_inout_resolved in_out4; + sc_port<sc_signal_inout_if<sc_logic>,1> in_out5; + sc_port<sc_signal_in_if<sc_logic>,1> in_1; + + sc_in<bool> clk; + + void main_action() + { + + sc_logic m; + m = 'Z'; + + while(1){ + wait(); + cout<< m<<" "; + in_out1 = m; + cout<<in_out1->read()<<" "; + in_out2 = in_out1; + cout<<in_out2->read()<<" "; + in_out3 = in_1; + cout<<in_out3->read()<<" "; + in_out4 = in_out5; + cout<<in_out4->read()<<endl; + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD(main_action) + sensitive << clk.pos(); + } +}; + +int sc_main(int, char*[]) +{ + sc_clock clk("clk", 5, SC_NS); + mod_a a("a"); + sc_signal_resolved sig1; + sc_signal_resolved sig2; + sc_signal_resolved sig3; + sc_signal<sc_logic> sig4; + sc_signal_resolved sig5; + sc_signal<sc_logic> sig6; + + a.clk(clk); + a.in_out1(sig1); + a.in_out2(sig2); + a.in_out3(sig3); + a.in_1(sig4); + a.in_out4(sig5); + a.in_out5(sig6); + + sc_start(15, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal_rv/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_signal_rv/test01/golden/test01.log new file mode 100644 index 000000000..a6bb9d360 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_rv/test01/golden/test01.log @@ -0,0 +1,17 @@ +SystemC Simulation +0 0 -> 0 +0 1 -> X +0 Z -> 0 +0 X -> X +1 0 -> X +1 1 -> 1 +1 Z -> 1 +1 X -> X +Z 0 -> 0 +Z 1 -> 1 +Z Z -> Z +Z X -> X +X 0 -> X +X 1 -> X +X Z -> X +X X -> X diff --git a/src/systemc/tests/systemc/communication/sc_signal_rv/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_signal_rv/test01/test01.cpp new file mode 100644 index 000000000..b5facb3ce --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_rv/test01/test01.cpp @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_signal_rv. + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + // ports + sc_out_rv<1> out1; + sc_out_rv<1> out2; + sc_in_rv<1> in; + + // variables + sc_logic l1; + sc_logic l2; + + // events + sc_event ready1; + sc_event ready2; + + void out_action1() + { + for( int i = 0; i < 4; ++ i ) { + l1 = sc_dt::sc_logic_value_t( i ); + for( int j = 0; j < 4; ++j ) { + out1.write( sc_lv<1>( l1 ) ); + /*::sc_core::*/wait( 1, SC_NS ); + ready1.notify(); + ::sc_core::wait( SC_ZERO_TIME ); + } + } + } + + void out_action2() + { + for( int i = 0; i < 4; ++ i ) { + for( int j = 0; j < 4; ++ j ) { + l2 = sc_dt::sc_logic_value_t( j ); + out2.write( sc_lv<1>( l2 ) ); + ::sc_core::wait( 1, SC_NS ); + ready2.notify(); + ::sc_core::wait( SC_ZERO_TIME ); + } + } + } + + void in_action() + { + for( int i = 0; i < 16; ++ i ) { + ::sc_core::wait( ready1 & ready2 ); + cout << l1 << " " << l2 << " -> " << in.read() << endl; + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( out_action1 ); + SC_THREAD( out_action2 ); + SC_THREAD( in_action ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_signal_rv<1> sig; + + mod_a a( "a" ); + + a.out1( sig ); + a.out2( sig ); + a.in( sig ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal_rv/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_signal_rv/test02/golden/test02.log new file mode 100644 index 000000000..dee5f96b3 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_rv/test02/golden/test02.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E117) resolved port not bound to resolved signal: port 'a.port_2' (sc_in_rv) +In file: <removed by verify.pl> diff --git a/src/systemc/tests/systemc/communication/sc_signal_rv/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_signal_rv/test02/test02.cpp new file mode 100644 index 000000000..878e69eb7 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_rv/test02/test02.cpp @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_signal_rv port classes. + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + // ports + sc_out_rv<1> out1; + sc_out_rv<1> out2; + sc_in_rv<1> in; + + // variables + sc_logic l1; + sc_logic l2; + + // events + sc_event ready1; + sc_event ready2; + + void out_action1() + { + for( int i = 0; i < 4; ++ i ) { + l1 = sc_dt::sc_logic_value_t( i ); + for( int j = 0; j < 4; ++j ) { + out1.write( sc_lv<1>( l1 ) ); + wait( 1, SC_NS ); + ready1.notify(); + wait( SC_ZERO_TIME ); + } + } + } + + void out_action2() + { + for( int i = 0; i < 4; ++ i ) { + for( int j = 0; j < 4; ++ j ) { + l2 = sc_dt::sc_logic_value_t( j ); + out2.write( sc_lv<1>( l2 ) ); + wait( 1, SC_NS ); + ready2.notify(); + wait( SC_ZERO_TIME ); + } + } + } + + void in_action() + { + for( int i = 0; i < 16; ++ i ) { + wait( ready1 & ready2 ); + cout << l1 << " " << l2 << " -> " << in.read() << endl; + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( out_action1 ); + SC_THREAD( out_action2 ); + SC_THREAD( in_action ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_signal_rv<1> sig_rv; + sc_signal<sc_lv<1> > sig_lv; + + mod_a a( "a" ); + + a.out1( sig_lv ); + a.out2( sig_rv ); + a.in( sig_lv ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal_rv/test03/golden/test03.log b/src/systemc/tests/systemc/communication/sc_signal_rv/test03/golden/test03.log new file mode 100644 index 000000000..7739a7781 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_rv/test03/golden/test03.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E117) resolved port not bound to resolved signal: port 'a.port_1' (sc_out_rv) +In file: <removed by verify.pl> diff --git a/src/systemc/tests/systemc/communication/sc_signal_rv/test03/test03.cpp b/src/systemc/tests/systemc/communication/sc_signal_rv/test03/test03.cpp new file mode 100644 index 000000000..539fc6af0 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_rv/test03/test03.cpp @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_signal_rv port classes. + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + // ports + sc_out_rv<1> out1; + sc_out_rv<1> out2; + // sc_in_rv<1> in; + sc_in<sc_lv<1> > in; + + // variables + sc_logic l1; + sc_logic l2; + + // events + sc_event ready1; + sc_event ready2; + + void out_action1() + { + for( int i = 0; i < 4; ++ i ) { + l1 = sc_dt::sc_logic_value_t( i ); + for( int j = 0; j < 4; ++j ) { + out1.write( sc_lv<1>( l1 ) ); + wait( 1, SC_NS ); + ready1.notify(); + wait( SC_ZERO_TIME ); + } + } + } + + void out_action2() + { + for( int i = 0; i < 4; ++ i ) { + for( int j = 0; j < 4; ++ j ) { + l2 = sc_dt::sc_logic_value_t( j ); + out2.write( sc_lv<1>( l2 ) ); + wait( 1, SC_NS ); + ready2.notify(); + wait( SC_ZERO_TIME ); + } + } + } + + void in_action() + { + for( int i = 0; i < 16; ++ i ) { + wait( ready1 & ready2 ); + cout << l1 << " " << l2 << " -> " << in.read() << endl; + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( out_action1 ); + SC_THREAD( out_action2 ); + SC_THREAD( in_action ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_signal_rv<1> sig_rv; + sc_signal<sc_lv<1> > sig_lv; + + mod_a a( "a" ); + + a.out1( sig_rv ); + a.out2( sig_lv ); + a.in( sig_lv ); + + sc_start(); + + return 0; +} |