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-rw-r--r--src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/common.h46
-rw-r--r--src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/display.cpp62
-rw-r--r--src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/display.h78
-rw-r--r--src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/golden/subtract.log31
-rw-r--r--src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/main.cpp98
-rw-r--r--src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/stimulus.cpp86
-rw-r--r--src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/stimulus.h81
-rw-r--r--src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.cpp166
-rw-r--r--src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.f4
-rw-r--r--src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.h109
10 files changed, 761 insertions, 0 deletions
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/common.h
new file mode 100644
index 000000000..8a560ac63
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/common.h
@@ -0,0 +1,46 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ common.h --
+
+ Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+#ifndef COMMON_H
+#define COMMON_H
+
+#include "systemc.h"
+
+typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4;
+typedef sc_signal<sc_bv<8> > sc_signal_bool_vector8;
+
+#endif
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/display.cpp
new file mode 100644
index 000000000..966569d48
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/display.cpp
@@ -0,0 +1,62 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ display.cpp --
+
+ Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+
+#include "display.h"
+
+void display::entry(){
+ int i = 0;
+
+ wait(2);
+ while(1) {
+ // Reading Data, and Counter i,j is counted up.
+ while (in_valid.read()==false) wait();
+ cout << "Display : " << in_data1.read() << " "
+ << in_data2.read() << " "
+ << in_data3.read() << " "
+ << in_data4.read() << " "
+ << in_data5.read() << " "
+ << " at " << sc_time_stamp() << endl;
+
+ i++;
+ if(i == 24) sc_stop();
+ wait();
+ }
+}
+
+
+// EOF
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/display.h
new file mode 100644
index 000000000..a11ccd275
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/display.h
@@ -0,0 +1,78 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ display.h --
+
+ Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+
+#include "common.h"
+
+SC_MODULE( display )
+{
+ SC_HAS_PROCESS( display );
+
+ sc_in_clk clk;
+
+ const sc_signal<int>& in_data1; // Input port
+ const sc_signal_bool_vector4& in_data2; // Input port
+ const sc_signal_bool_vector4& in_data3; // Input port
+ const sc_signal_bool_vector8& in_data4; // Input port
+ const sc_signal_bool_vector8& in_data5; // Input port
+ const sc_signal<bool>& in_valid;
+
+ display( sc_module_name NAME,
+ sc_clock& CLK,
+ const sc_signal<int>& IN_DATA1,
+ const sc_signal_bool_vector4& IN_DATA2,
+ const sc_signal_bool_vector4& IN_DATA3,
+ const sc_signal_bool_vector8& IN_DATA4,
+ const sc_signal_bool_vector8& IN_DATA5,
+ const sc_signal<bool>& IN_VALID
+ )
+ :
+ in_data1(IN_DATA1),
+ in_data2(IN_DATA2),
+ in_data3(IN_DATA3),
+ in_data4(IN_DATA4),
+ in_data5(IN_DATA5),
+ in_valid(IN_VALID)
+ {
+ clk(CLK);
+ SC_CTHREAD( entry, clk.pos() );
+ }
+
+ void entry();
+};
+
+// EOF
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/golden/subtract.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/golden/subtract.log
new file mode 100644
index 000000000..9486fc2bd
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/golden/subtract.log
@@ -0,0 +1,31 @@
+SystemC Simulation
+Stimuli : 255 -1 15 -1 255 at 23 ns
+Display : 254 1110 1110 11111110 11111110 at 27 ns
+Display : 254 1110 1110 11111110 11111110 at 29 ns
+Display : 252 1100 1100 11111100 11111100 at 31 ns
+Display : -2 1110 1110 11111110 11111110 at 34 ns
+Display : -256 0000 0000 00000000 00000000 at 37 ns
+Display : 0 0000 0000 00000000 00000000 at 40 ns
+Stimuli : 254 -2 14 -2 254 at 44 ns
+Display : 253 1101 1101 11111101 11111101 at 48 ns
+Display : 253 1101 1101 11111101 11111101 at 50 ns
+Display : 251 1011 1011 11111011 11111011 at 52 ns
+Display : -3 1101 1101 11111101 11111101 at 55 ns
+Display : -257 1111 1111 11111111 11111111 at 58 ns
+Display : 16 0000 0000 00000000 00000001 at 61 ns
+Stimuli : 253 -3 13 -3 253 at 65 ns
+Display : 252 1100 1100 11111100 11111100 at 69 ns
+Display : 252 1100 1100 11111100 11111100 at 71 ns
+Display : 250 1010 1010 11111010 11111010 at 73 ns
+Display : -4 1100 1100 11111100 11111100 at 76 ns
+Display : -258 1110 1110 11111110 11111110 at 79 ns
+Display : 16 0000 0000 00000000 00000010 at 82 ns
+Stimuli : 252 -4 12 -4 252 at 86 ns
+Display : 251 1011 1011 11111011 11111011 at 90 ns
+Display : 251 1011 1011 11111011 11111011 at 92 ns
+Display : 249 1001 1001 11111001 11111001 at 94 ns
+Display : -5 1011 1011 11111011 11111011 at 97 ns
+Display : -259 1101 1101 11111101 11111101 at 100 ns
+Display : 16 0000 0000 00000000 00000011 at 103 ns
+
+Info: /OSCI/SystemC: Simulation stopped by user.
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/main.cpp
new file mode 100644
index 000000000..86a1b91b1
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/main.cpp
@@ -0,0 +1,98 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ main.cpp --
+
+ Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+
+#include "stimulus.h"
+#include "display.h"
+#include "subtract.h"
+
+int sc_main (int argc , char *argv[]) {
+ sc_clock clock;
+ sc_signal<bool> reset;
+ sc_signal<int> stimulus_line1;
+ sc_signal_bool_vector4 stimulus_line2;
+ sc_signal_bool_vector4 stimulus_line3;
+ sc_signal_bool_vector8 stimulus_line4;
+ sc_signal_bool_vector8 stimulus_line5;
+ sc_signal<bool> input_valid;
+ sc_signal<bool> output_valid;
+ sc_signal<int> result_line1;
+ sc_signal_bool_vector4 result_line2;
+ sc_signal_bool_vector4 result_line3;
+ sc_signal_bool_vector8 result_line4;
+ sc_signal_bool_vector8 result_line5;
+
+ stimulus stimulus1("stimulus_block",
+ clock,
+ reset,
+ stimulus_line1,
+ stimulus_line2,
+ stimulus_line3,
+ stimulus_line4,
+ stimulus_line5,
+ input_valid);
+
+ subtraction subtraction1 ( "process_body",
+ clock,
+ reset,
+ stimulus_line1,
+ stimulus_line2,
+ stimulus_line3,
+ stimulus_line4,
+ stimulus_line5,
+ input_valid,
+ result_line1,
+ result_line2,
+ result_line3,
+ result_line4,
+ result_line5,
+ output_valid);
+
+ display display1 ( "display",
+ clock,
+ result_line1,
+ result_line2,
+ result_line3,
+ result_line4,
+ result_line5,
+ output_valid);
+
+ sc_start();
+ return 0;
+}
+
+// EOF
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/stimulus.cpp
new file mode 100644
index 000000000..8856451d4
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/stimulus.cpp
@@ -0,0 +1,86 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ stimulus.cpp --
+
+ Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+
+#include "stimulus.h"
+
+void stimulus::entry() {
+ int send_value1 = 255;
+ sc_signed send_value2(4);
+ sc_unsigned send_value3(4);
+ sc_signed send_value4(8);
+ sc_unsigned send_value5(8);
+
+
+ reset.write(true);
+ out_valid.write(false);
+ send_value2 = 15;
+ send_value3 = 15;
+ send_value4 = 255;
+ send_value5 = 255;
+ out_stimulus1.write(0);
+ out_stimulus2.write(0);
+ out_stimulus3.write(0);
+ out_stimulus4.write(0);
+ out_stimulus5.write(0);
+ wait(3);
+ reset.write(false);
+ while(true){
+ wait(20);
+ out_stimulus1.write( send_value1 );
+ out_stimulus2.write( send_value2 );
+ out_stimulus3.write( send_value3 );
+ out_stimulus4.write( send_value4 );
+ out_stimulus5.write( send_value5 );
+ out_valid.write( true );
+ cout << "Stimuli : " << send_value1 << " "
+ << send_value2 << " "
+ << send_value3 << " "
+ << send_value4 << " "
+ << send_value5 << " " << " at "
+ << sc_time_stamp() << endl;
+ send_value1--;
+ send_value2 -= 1;
+ send_value3 -= 1;
+ send_value4 -= 1;
+ send_value5 -= 1;
+ wait();
+ out_valid.write( false );
+ }
+}
+
+// EOF
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/stimulus.h
new file mode 100644
index 000000000..1d675ef5c
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/stimulus.h
@@ -0,0 +1,81 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ stimulus.h --
+
+ Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+
+#include "common.h"
+
+SC_MODULE( stimulus )
+{
+ SC_HAS_PROCESS( stimulus );
+
+ sc_in_clk clk;
+
+ sc_signal<bool>& reset;
+ sc_signal<int>& out_stimulus1;
+ sc_signal_bool_vector4& out_stimulus2;
+ sc_signal_bool_vector4& out_stimulus3;
+ sc_signal_bool_vector8& out_stimulus4;
+ sc_signal_bool_vector8& out_stimulus5;
+ sc_signal<bool>& out_valid;
+
+ stimulus(sc_module_name NAME,
+ sc_clock& CLK,
+ sc_signal<bool>& RESET,
+ sc_signal<int>& OUT_STIMULUS1,
+ sc_signal_bool_vector4& OUT_STIMULUS2,
+ sc_signal_bool_vector4& OUT_STIMULUS3,
+ sc_signal_bool_vector8& OUT_STIMULUS4,
+ sc_signal_bool_vector8& OUT_STIMULUS5,
+ sc_signal<bool>& OUT_VALID
+ )
+ :
+ reset(RESET),
+ out_stimulus1(OUT_STIMULUS1),
+ out_stimulus2(OUT_STIMULUS2),
+ out_stimulus3(OUT_STIMULUS3),
+ out_stimulus4(OUT_STIMULUS4),
+ out_stimulus5(OUT_STIMULUS5),
+ out_valid(OUT_VALID)
+ {
+ clk (CLK);
+ SC_CTHREAD( entry, clk.pos() );
+ }
+
+ void entry();
+};
+
+// EOF
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.cpp
new file mode 100644
index 000000000..a3fc5ee4b
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.cpp
@@ -0,0 +1,166 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ subtract.cpp --
+
+ Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+
+#include "subtract.h"
+
+void subtraction::entry(){
+
+ int tmp1;
+ sc_bigint<4> tmp2;
+ sc_biguint<4> tmp3;
+ sc_bigint<8> tmp4;
+ sc_biguint<8> tmp5;
+
+ // reset_loop
+ if (reset.read() == true) {
+ out_valid.write(false);
+ wait();
+ } else wait();
+
+ //
+ // main loop
+ //
+ //
+ while(1) {
+ while(in_valid.read()==false) wait();
+ wait();
+
+ //reading the inputs
+ tmp1 = in_value1.read();
+ tmp2 = in_value2.read();
+ tmp3 = in_value3.read();
+ tmp4 = in_value4.read();
+ tmp5 = in_value5.read();
+
+ //execute operations
+ tmp1 = tmp1 - 1;
+ tmp2 = tmp2 - 1;
+ tmp3 = tmp3 - 1;
+ tmp4 = tmp4 - 1;
+ tmp5 = tmp5 - 1;
+ wait();
+
+ // write outputs
+ out_value1.write(tmp1);
+ out_value2.write(tmp2);
+ out_value3.write(tmp3);
+ out_value4.write(tmp4);
+ out_value5.write(tmp5);
+ out_valid.write(true);
+ wait();
+ out_valid.write(false);
+ wait();
+ // write outputs
+ out_value1.write(tmp1--);
+ out_value2.write(tmp2--);
+ out_value3.write(tmp3--);
+ out_value4.write(tmp4--);
+ out_value5.write(tmp5--);
+ out_valid.write(true);
+ wait();
+ out_valid.write(false);
+ wait();
+ // write outputs
+ out_value1.write(--tmp1);
+ out_value2.write(--tmp2);
+ out_value3.write(--tmp3);
+ out_value4.write(--tmp4);
+ out_value5.write(--tmp5);
+ out_valid.write(true);
+ wait();
+ out_valid.write(false);
+ wait();
+ //execute operations
+ tmp1 = tmp1 - 254;
+ tmp2 = tmp2 - 14;
+ tmp3 = tmp3 - 14;
+ tmp4 = tmp4 - 254;
+ tmp5 = tmp5 - 254;
+ wait();
+
+ // write outputs
+ out_value1.write(tmp1);
+ out_value2.write(tmp2);
+ out_value3.write(tmp3);
+ out_value4.write(tmp4);
+ out_value5.write(tmp5);
+ out_valid.write(true);
+ wait();
+ out_valid.write(false);
+ wait();
+ //execute operations
+ tmp1 -= 254;
+ tmp2 -= 14;
+ tmp3 -= 14;
+ tmp4 -= 254;
+ tmp5 -= 254;
+ wait();
+
+ // write outputs
+ out_value1.write(tmp1);
+ out_value2.write(tmp2);
+ out_value3.write(tmp3);
+ out_value4.write(tmp4);
+ out_value5.write(tmp5);
+ out_valid.write(true);
+ wait();
+ out_valid.write(false);
+ wait();
+ //execute operations with signed and unsigned mix and mixed bit width
+ tmp1 = (tmp3 - tmp2).to_int();
+ tmp2 = tmp2 - tmp4;
+ tmp3 = tmp3 - tmp5;
+ tmp4 = tmp4 - tmp5;
+ tmp5 = tmp4 - tmp5;
+ wait();
+
+ // write outputs
+ out_value1.write(tmp1);
+ out_value2.write(tmp2);
+ out_value3.write(tmp3);
+ out_value4.write(tmp4);
+ out_value5.write(tmp5);
+ out_valid.write(true);
+ wait();
+ out_valid.write(false);
+ wait();
+ }
+}
+
+// EOF
+
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.f
new file mode 100644
index 000000000..fe9d1d54d
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.f
@@ -0,0 +1,4 @@
+subtract/stimulus.cpp
+subtract/display.cpp
+subtract/subtract.cpp
+subtract/main.cpp
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.h
new file mode 100644
index 000000000..bac065909
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.h
@@ -0,0 +1,109 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ subtract.h --
+
+ Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+
+#include "common.h"
+
+SC_MODULE( subtraction )
+{
+ SC_HAS_PROCESS( subtraction );
+
+ sc_in_clk clk;
+
+ const sc_signal<bool>& reset ;
+ const sc_signal<int>& in_value1; // Input port
+ const sc_signal_bool_vector4& in_value2;
+ const sc_signal_bool_vector4& in_value3;
+ const sc_signal_bool_vector8& in_value4;
+ const sc_signal_bool_vector8& in_value5;
+ const sc_signal<bool>& in_valid; // Input port
+ sc_signal<int>& out_value1; // Output port
+ sc_signal_bool_vector4& out_value2;
+ sc_signal_bool_vector4& out_value3;
+ sc_signal_bool_vector8& out_value4;
+ sc_signal_bool_vector8& out_value5;
+ sc_signal<bool>& out_valid; // Output port
+
+ //
+ // Constructor
+ //
+
+ subtraction(
+ sc_module_name NAME, // referense name
+ sc_clock& CLK, // clock
+ const sc_signal<bool>& RESET,
+ const sc_signal<int>& IN_VALUE1,
+ const sc_signal_bool_vector4& IN_VALUE2,
+ const sc_signal_bool_vector4& IN_VALUE3,
+ const sc_signal_bool_vector8& IN_VALUE4,
+ const sc_signal_bool_vector8& IN_VALUE5,
+ const sc_signal<bool>& IN_VALID, // Input port
+ sc_signal<int>& OUT_VALUE1,
+ sc_signal_bool_vector4& OUT_VALUE2,
+ sc_signal_bool_vector4& OUT_VALUE3,
+ sc_signal_bool_vector8& OUT_VALUE4,
+ sc_signal_bool_vector8& OUT_VALUE5,
+ sc_signal<bool>& OUT_VALID // Output port
+ )
+ :
+ reset (RESET),
+ in_value1 (IN_VALUE1),
+ in_value2 (IN_VALUE2),
+ in_value3 (IN_VALUE3),
+ in_value4 (IN_VALUE4),
+ in_value5 (IN_VALUE5),
+ in_valid (IN_VALID),
+ out_value1 (OUT_VALUE1),
+ out_value2 (OUT_VALUE2),
+ out_value3 (OUT_VALUE3),
+ out_value4 (OUT_VALUE4),
+ out_value5 (OUT_VALUE5),
+ out_valid (OUT_VALID)
+
+ {
+ clk (CLK);
+ SC_CTHREAD( entry, clk.pos() );
+ reset_signal_is(reset,true);
+ };
+
+ //
+
+ void entry ();
+
+};
+
+// EOF