diff options
Diffstat (limited to 'src/systemc/tests/systemc/misc/cae_test/general/arith')
142 files changed, 11457 insertions, 0 deletions
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/addition.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/addition.cpp new file mode 100644 index 000000000..10eb25125 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/addition.cpp @@ -0,0 +1,165 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + addition.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-12 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "addition.h" + +void addition::entry(){ + + int tmp1; + sc_bigint<4> tmp2; + sc_biguint<4> tmp3; + sc_bigint<8> tmp4; + sc_biguint<8> tmp5; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + //execute simple operations + tmp1 = tmp1 + 1; + tmp2 = tmp2 + 1; + tmp3 = tmp3 + 1; + tmp4 = tmp4 + 1; + tmp5 = tmp5 + 1; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + // execute increment post-operation and write outputs + out_value1.write(tmp1++); + out_value2.write(tmp2++); + out_value3.write(tmp3++); + out_value4.write(tmp4++); + out_value5.write(tmp5++); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + // execute increment pre-operation and write outputs + out_value1.write(++tmp1); + out_value2.write(++tmp2); + out_value3.write(++tmp3); + out_value4.write(++tmp4); + out_value5.write(++tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute operations with overflow + tmp1 = tmp1 + 254; + tmp2 = tmp2 + 254; + tmp3 = tmp3 + 254; + tmp4 = tmp4 + 254; + tmp5 = tmp5 + 254; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute operations with self assignment + tmp1 += 254; + tmp2 += 254; + tmp3 += 254; + tmp4 += 254; + tmp5 += 254; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute operations with signed and unsigned mix and mixed bit width + tmp1 = (tmp3 + tmp2).to_int(); + tmp2 = tmp2 + tmp4; + tmp3 = tmp3 + tmp5; + tmp4 = tmp4 + tmp5; + tmp5 = tmp4 + tmp5; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/addition.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/addition.f new file mode 100644 index 000000000..b4ba6bd0f --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/addition.f @@ -0,0 +1,4 @@ +addition/stimulus.cpp +addition/display.cpp +addition/addition.cpp +addition/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/addition.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/addition.h new file mode 100644 index 000000000..899bc9983 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/addition.h @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + addition.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-12 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( addition ) +{ + SC_HAS_PROCESS( addition ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal<bool>& reset ; + const sc_signal<int>& in_value1; + const sc_signal_bool_vector4& in_value2; + const sc_signal_bool_vector4& in_value3; + const sc_signal_bool_vector8& in_value4; + const sc_signal_bool_vector8& in_value5; + const sc_signal<bool>& in_valid; // Input port + sc_signal<int>& out_value1; // Output port + sc_signal_bool_vector4& out_value2; + sc_signal_bool_vector4& out_value3; + sc_signal_bool_vector8& out_value4; + sc_signal_bool_vector8& out_value5; + sc_signal<bool>& out_valid; + + // + // Constructor + // + + addition( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal<int>& IN_VALUE1, + const sc_signal_bool_vector4& IN_VALUE2, + const sc_signal_bool_vector4& IN_VALUE3, + const sc_signal_bool_vector8& IN_VALUE4, + const sc_signal_bool_vector8& IN_VALUE5, + const sc_signal<bool>& IN_VALID, // Input port + sc_signal<int>& OUT_VALUE1, + sc_signal_bool_vector4& OUT_VALUE2, + sc_signal_bool_vector4& OUT_VALUE3, + sc_signal_bool_vector8& OUT_VALUE4, + sc_signal_bool_vector8& OUT_VALUE5, + sc_signal<bool>& OUT_VALID // Output port + ) + : + reset (RESET), // connection definition + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/common.h new file mode 100644 index 000000000..8a560ac63 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4; +typedef sc_signal<sc_bv<8> > sc_signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/display.cpp new file mode 100644 index 000000000..38e5c8b61 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/display.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-12 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data3.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/display.h new file mode 100644 index 000000000..4c20196ac --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/display.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-12 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal<int>& in_data1; // Input port + const sc_signal_bool_vector4& in_data2; // Input port + const sc_signal_bool_vector4& in_data3; // Input port + const sc_signal_bool_vector8& in_data4; // Input port + const sc_signal_bool_vector8& in_data5; // Input port + const sc_signal<bool>& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal<int>& IN_DATA1, + const sc_signal_bool_vector4& IN_DATA2, + const sc_signal_bool_vector4& IN_DATA3, + const sc_signal_bool_vector8& IN_DATA4, + const sc_signal_bool_vector8& IN_DATA5, + const sc_signal<bool>& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/golden/addition.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/golden/addition.log new file mode 100644 index 000000000..ee6b81b72 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/golden/addition.log @@ -0,0 +1,31 @@ +SystemC Simulation +Stimuli : 0 0 0 0 0 at 23 ns +Display : 1 0001 0001 00000001 00000001 at 27 ns +Display : 1 0001 0001 00000001 00000001 at 29 ns +Display : 3 0011 0011 00000011 00000011 at 31 ns +Display : 257 0001 0001 00000001 00000001 at 34 ns +Display : 511 1111 1111 11111111 11111111 at 37 ns +Display : 14 1110 1110 11111110 11111101 at 40 ns +Stimuli : 1 1 1 1 1 at 44 ns +Display : 2 0010 0010 00000010 00000010 at 48 ns +Display : 2 0010 0010 00000010 00000010 at 50 ns +Display : 4 0100 0100 00000100 00000100 at 52 ns +Display : 258 0010 0010 00000010 00000010 at 55 ns +Display : 512 0000 0000 00000000 00000000 at 58 ns +Display : 0 0000 0000 00000000 00000000 at 61 ns +Stimuli : 2 2 2 2 2 at 65 ns +Display : 3 0011 0011 00000011 00000011 at 69 ns +Display : 3 0011 0011 00000011 00000011 at 71 ns +Display : 5 0101 0101 00000101 00000101 at 73 ns +Display : 259 0011 0011 00000011 00000011 at 76 ns +Display : 513 0001 0001 00000001 00000001 at 79 ns +Display : 2 0010 0010 00000010 00000011 at 82 ns +Stimuli : 3 3 3 3 3 at 86 ns +Display : 4 0100 0100 00000100 00000100 at 90 ns +Display : 4 0100 0100 00000100 00000100 at 92 ns +Display : 6 0110 0110 00000110 00000110 at 94 ns +Display : 260 0100 0100 00000100 00000100 at 97 ns +Display : 514 0010 0010 00000010 00000010 at 100 ns +Display : 4 0100 0100 00000100 00000110 at 103 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/main.cpp new file mode 100644 index 000000000..3e32605f9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/main.cpp @@ -0,0 +1,97 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-12 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" +#include "display.h" +#include "addition.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal<int> stimulus_line1; + sc_signal_bool_vector4 stimulus_line2; + sc_signal_bool_vector4 stimulus_line3; + sc_signal_bool_vector8 stimulus_line4; + sc_signal_bool_vector8 stimulus_line5; + sc_signal<bool> input_valid; + sc_signal<bool> output_valid; + sc_signal<int> result_line1; + sc_signal_bool_vector4 result_line2; + sc_signal_bool_vector4 result_line3; + sc_signal_bool_vector8 result_line4; + sc_signal_bool_vector8 result_line5; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid); + + addition addition1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/stimulus.cpp new file mode 100644 index 000000000..2d43a45c4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/stimulus.cpp @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-12 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" + +void stimulus::entry() { + int send_value1 = 0; + sc_signed send_value2(4); + sc_unsigned send_value3(4); + sc_signed send_value4(8); + sc_unsigned send_value5(8); + + + // sending some reset values + reset.write(true); + out_valid.write(false); + send_value2 = 0; + send_value3 = 0; + send_value4 = 0; + send_value5 = 0; + out_stimulus1.write(0); + out_stimulus2.write(0); + out_stimulus3.write(0); + out_stimulus4.write(0); + out_stimulus5.write(0); + wait(3); + reset.write(false); + // sending normal mode values + while(true){ + wait(20); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_stimulus3.write( send_value3 ); + out_stimulus4.write( send_value4 ); + out_stimulus5.write( send_value5 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " " + << send_value3 << " " + << send_value4 << " " + << send_value5 << " " << " at " + << sc_time_stamp() << endl; + send_value1++; + send_value2 = send_value2+1; + send_value3 = send_value3+1; + send_value4 = send_value4+1; + send_value5 = send_value5+1; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/stimulus.h new file mode 100644 index 000000000..b73fb9d4c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/stimulus.h @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-12 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset; + sc_signal<int>& out_stimulus1; + sc_signal_bool_vector4& out_stimulus2; + sc_signal_bool_vector4& out_stimulus3; + sc_signal_bool_vector8& out_stimulus4; + sc_signal_bool_vector8& out_stimulus5; + sc_signal<bool>& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal<bool>& RESET, + sc_signal<int>& OUT_STIMULUS1, + sc_signal_bool_vector4& OUT_STIMULUS2, + sc_signal_bool_vector4& OUT_STIMULUS3, + sc_signal_bool_vector8& OUT_STIMULUS4, + sc_signal_bool_vector8& OUT_STIMULUS5, + sc_signal<bool>& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_stimulus3(OUT_STIMULUS3), + out_stimulus4(OUT_STIMULUS4), + out_stimulus5(OUT_STIMULUS5), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/bitwidth.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/bitwidth.cpp new file mode 100644 index 000000000..df19755c1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/bitwidth.cpp @@ -0,0 +1,99 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + bitwidth.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-08-02 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "bitwidth.h" + +void bitwidth::entry(){ + + sc_bigint<4> tmp1; + sc_biguint<4> tmp2; + sc_bigint<6> tmp3; + sc_biguint<6> tmp4; + sc_bigint<8> tmp5; + sc_biguint<8> tmp6; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + tmp6 = in_value6.read(); + + //execute simple operations + // expected bitwidth 4 4 4 signed + tmp1 = tmp1 + tmp2; + // expected bitwidth 4 6 6 signed + tmp3 = tmp1 + tmp3; + // expected bitwidth 4 4 6 signed + tmp6 = tmp2 + tmp1; + // expected bitwidth 8 8 6 signed + tmp4 = tmp5 + tmp6; + // expected bitwidth 6 8 4 unsigned + tmp2 = tmp4 + tmp6; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_value6.write(tmp6); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/bitwidth.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/bitwidth.f new file mode 100644 index 000000000..53a59162e --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/bitwidth.f @@ -0,0 +1,4 @@ +bitwidth/stimulus.cpp +bitwidth/display.cpp +bitwidth/bitwidth.cpp +bitwidth/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/bitwidth.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/bitwidth.h new file mode 100644 index 000000000..9ced486ea --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/bitwidth.h @@ -0,0 +1,120 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + bitwidth.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-08-02 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( bitwidth ) +{ + SC_HAS_PROCESS( bitwidth ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal<bool>& reset ; + const sc_signal_bool_vector4& in_value1; // Input port + const sc_signal_bool_vector4& in_value2; // Input port + const sc_signal_bool_vector6& in_value3; // Input port + const sc_signal_bool_vector6& in_value4; // Input port + const sc_signal_bool_vector8& in_value5; // Input port + const sc_signal_bool_vector8& in_value6; // Input port + const sc_signal<bool>& in_valid; // Input port + sc_signal_bool_vector4& out_value1; // Output port + sc_signal_bool_vector4& out_value2; // Output port + sc_signal_bool_vector6& out_value3; // Output port + sc_signal_bool_vector6& out_value4; // Output port + sc_signal_bool_vector8& out_value5; // Output port + sc_signal_bool_vector8& out_value6; // Output port + sc_signal<bool>& out_valid; // Output port + + // + // Constructor + // + + bitwidth ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal_bool_vector4& IN_VALUE1, + const sc_signal_bool_vector4& IN_VALUE2, + const sc_signal_bool_vector6& IN_VALUE3, + const sc_signal_bool_vector6& IN_VALUE4, + const sc_signal_bool_vector8& IN_VALUE5, + const sc_signal_bool_vector8& IN_VALUE6, + const sc_signal<bool>& IN_VALID, // Input port + sc_signal_bool_vector4& OUT_VALUE1, + sc_signal_bool_vector4& OUT_VALUE2, + sc_signal_bool_vector6& OUT_VALUE3, + sc_signal_bool_vector6& OUT_VALUE4, + sc_signal_bool_vector8& OUT_VALUE5, + sc_signal_bool_vector8& OUT_VALUE6, + sc_signal<bool>& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/common.h new file mode 100644 index 000000000..2a49981d9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/common.h @@ -0,0 +1,47 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4; +typedef sc_signal<sc_bv<6> > sc_signal_bool_vector6; +typedef sc_signal<sc_bv<8> > sc_signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/display.cpp new file mode 100644 index 000000000..76acd9e62 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/display.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-08-02 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up.
+ while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << in_data6.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/display.h new file mode 100644 index 000000000..d35bb1abc --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/display.h @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-08-02 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector4& in_data1; // Input port + const sc_signal_bool_vector4& in_data2; // Input port + const sc_signal_bool_vector6& in_data3; // Input port + const sc_signal_bool_vector6& in_data4; // Input port + const sc_signal_bool_vector8& in_data5; // Input port + const sc_signal_bool_vector8& in_data6; // Input port + const sc_signal<bool>& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector4& IN_DATA1, + const sc_signal_bool_vector4& IN_DATA2, + const sc_signal_bool_vector6& IN_DATA3, + const sc_signal_bool_vector6& IN_DATA4, + const sc_signal_bool_vector8& IN_DATA5, + const sc_signal_bool_vector8& IN_DATA6, + const sc_signal<bool>& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_data6(IN_DATA6), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/golden/bitwidth.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/golden/bitwidth.log new file mode 100644 index 000000000..d8f3d5726 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/golden/bitwidth.log @@ -0,0 +1,51 @@ +SystemC Simulation +Stimuli : 0 0 0 0 0 0 at 23 ns +Display : 0000 0000 000000 000000 00000000 00000000 at 27 ns +Stimuli : 2 2 8 8 32 32 at 44 ns +Display : 0100 1100 001100 100110 00100000 00000110 at 48 ns +Stimuli : 4 4 16 16 64 64 at 65 ns +Display : 1000 1000 001000 111100 01000000 11111100 at 69 ns +Stimuli : 6 6 24 24 96 96 at 86 ns +Display : 1100 0100 010100 100010 01100000 00000010 at 90 ns +Stimuli : -8 8 -32 32 -128 128 at 107 ns +Display : 0000 0000 100000 001000 10000000 00001000 at 111 ns +Stimuli : -6 10 -24 40 -96 160 at 128 ns +Display : 0100 1100 101100 101110 10100000 00001110 at 132 ns +Stimuli : -4 12 -16 48 -64 192 at 149 ns +Display : 1000 1000 101000 000100 11000000 00000100 at 153 ns +Stimuli : -2 14 -8 56 -32 224 at 170 ns +Display : 1100 0100 110100 101010 11100000 00001010 at 174 ns +Stimuli : 0 0 0 0 0 0 at 191 ns +Display : 0000 0000 000000 000000 00000000 00000000 at 195 ns +Stimuli : 2 2 8 8 32 32 at 212 ns +Display : 0100 1100 001100 100110 00100000 00000110 at 216 ns +Stimuli : 4 4 16 16 64 64 at 233 ns +Display : 1000 1000 001000 111100 01000000 11111100 at 237 ns +Stimuli : 6 6 24 24 96 96 at 254 ns +Display : 1100 0100 010100 100010 01100000 00000010 at 258 ns +Stimuli : -8 8 -32 32 -128 128 at 275 ns +Display : 0000 0000 100000 001000 10000000 00001000 at 279 ns +Stimuli : -6 10 -24 40 -96 160 at 296 ns +Display : 0100 1100 101100 101110 10100000 00001110 at 300 ns +Stimuli : -4 12 -16 48 -64 192 at 317 ns +Display : 1000 1000 101000 000100 11000000 00000100 at 321 ns +Stimuli : -2 14 -8 56 -32 224 at 338 ns +Display : 1100 0100 110100 101010 11100000 00001010 at 342 ns +Stimuli : 0 0 0 0 0 0 at 359 ns +Display : 0000 0000 000000 000000 00000000 00000000 at 363 ns +Stimuli : 2 2 8 8 32 32 at 380 ns +Display : 0100 1100 001100 100110 00100000 00000110 at 384 ns +Stimuli : 4 4 16 16 64 64 at 401 ns +Display : 1000 1000 001000 111100 01000000 11111100 at 405 ns +Stimuli : 6 6 24 24 96 96 at 422 ns +Display : 1100 0100 010100 100010 01100000 00000010 at 426 ns +Stimuli : -8 8 -32 32 -128 128 at 443 ns +Display : 0000 0000 100000 001000 10000000 00001000 at 447 ns +Stimuli : -6 10 -24 40 -96 160 at 464 ns +Display : 0100 1100 101100 101110 10100000 00001110 at 468 ns +Stimuli : -4 12 -16 48 -64 192 at 485 ns +Display : 1000 1000 101000 000100 11000000 00000100 at 489 ns +Stimuli : -2 14 -8 56 -32 224 at 506 ns +Display : 1100 0100 110100 101010 11100000 00001010 at 510 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/main.cpp new file mode 100644 index 000000000..238dd032a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/main.cpp @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-08-02 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" +#include "display.h" +#include "bitwidth.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal_bool_vector4 stimulus_line1; + sc_signal_bool_vector4 stimulus_line2; + sc_signal_bool_vector6 stimulus_line3; + sc_signal_bool_vector6 stimulus_line4; + sc_signal_bool_vector8 stimulus_line5; + sc_signal_bool_vector8 stimulus_line6; + sc_signal<bool> input_valid; + sc_signal<bool> output_valid; + sc_signal_bool_vector4 result_line1; + sc_signal_bool_vector4 result_line2; + sc_signal_bool_vector6 result_line3; + sc_signal_bool_vector6 result_line4; + sc_signal_bool_vector8 result_line5; + sc_signal_bool_vector8 result_line6; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + input_valid); + + bitwidth bitwidth1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/stimulus.cpp new file mode 100644 index 000000000..15546d1b2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/stimulus.cpp @@ -0,0 +1,94 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-08-02 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" + +void stimulus::entry() { + sc_signed send_value1(4); + sc_unsigned send_value2(4); + sc_signed send_value3(6); + sc_unsigned send_value4(6); + sc_signed send_value5(8); + sc_unsigned send_value6(8); + + + // sending some reset values + reset.write(true); + out_valid.write(false); + send_value1 = 0; + send_value2 = 0; + send_value3 = 0; + send_value4 = 0; + send_value5 = 0; + send_value6 = 0; + out_stimulus1.write(0); + out_stimulus2.write(0); + out_stimulus3.write(0); + out_stimulus4.write(0); + out_stimulus5.write(0); + out_stimulus6.write(0); + wait(3); + reset.write(false); + // sending normal mode values + while(true){ + wait(20); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_stimulus3.write( send_value3 ); + out_stimulus4.write( send_value4 ); + out_stimulus5.write( send_value5 ); + out_stimulus6.write( send_value6 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " " + << send_value3 << " " + << send_value4 << " " + << send_value5 << " " + << send_value6 << " " << " at " + << sc_time_stamp() << endl; + send_value1 = send_value1+2; + send_value2 = send_value2+2; + send_value3 = send_value3+8; + send_value4 = send_value4+8; + send_value5 = send_value5+32; + send_value6 = send_value6+32; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/stimulus.h new file mode 100644 index 000000000..edbd6be48 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/stimulus.h @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-08-02 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset; + sc_signal_bool_vector4& out_stimulus1; + sc_signal_bool_vector4& out_stimulus2; + sc_signal_bool_vector6& out_stimulus3; + sc_signal_bool_vector6& out_stimulus4; + sc_signal_bool_vector8& out_stimulus5; + sc_signal_bool_vector8& out_stimulus6; + sc_signal<bool>& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal<bool>& RESET, + sc_signal_bool_vector4& OUT_STIMULUS1, + sc_signal_bool_vector4& OUT_STIMULUS2, + sc_signal_bool_vector6& OUT_STIMULUS3, + sc_signal_bool_vector6& OUT_STIMULUS4, + sc_signal_bool_vector8& OUT_STIMULUS5, + sc_signal_bool_vector8& OUT_STIMULUS6, + sc_signal<bool>& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_stimulus3(OUT_STIMULUS3), + out_stimulus4(OUT_STIMULUS4), + out_stimulus5(OUT_STIMULUS5), + out_stimulus6(OUT_STIMULUS6), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/common.h new file mode 100644 index 000000000..1af56c523 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal<sc_bv<8> > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/datatypes.cpp new file mode 100644 index 000000000..753647536 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/datatypes.cpp @@ -0,0 +1,134 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "datatypes.h" +#define true 1 +#define false 0 + +void datatypes::entry() + +{ + + sc_bigint<8> tmp1; + sc_bigint<8> tmp1r; + sc_biguint<8> tmp2; + sc_biguint<8> tmp2r; + long tmp3; + long tmp3r; + int tmp4; + int tmp4r; + short tmp5; + short tmp5r; + char tmp6; + char tmp6r; + +// define 1 dimensional array + int tmp7[2]; + char tmp8[2]; + // int tmp9[2]; + int* tmp9; + +// define sc_bool_vector + sc_bv<4> tmp10; + tmp10[3] = 0; tmp10[2] = 1; tmp10[1] = 0; tmp10[0] = 1; + +// define 2 dimentional array + sc_bv<1> tmp11[2]; + +// reset_loop + if (reset.read() == true) { + out_valid.write(false); + out_ack.write(false); + wait(); + } else wait(); + +// +// main loop +// + +// initialization of sc_array + + tmp7[0] = 3; + tmp7[1] = 12; + tmp8[0] = 'S'; + tmp8[1] = 'C'; + tmp9 = tmp7; + tmp11[0][0] = "1"; + tmp11[1][0] = "0"; + + + while(1) { + while(in_valid.read()==false) wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + tmp6 = in_value6.read(); + + out_ack.write(true); + + //execute mixed data type addition operations + tmp1r = tmp1 + tmp2 + (sc_bigint<1>)tmp1.range(0, 0) ; // #### + // tmp2r = tmp6 + tmp1 + int(tmp10[2]); // treat tmp10[2] as carry in + tmp2r = tmp6 + tmp1 + tmp10[2].to_bool(); // treat tmp10[2] as carry in + tmp3r = tmp4 + tmp6; + tmp4r = ++tmp5; + // tmp4r -= int(tmp11[0][0]); + tmp4r -= tmp11[0][0].to_bool(); + tmp5r = tmp6 + tmp4; + tmp6r = tmp8[0] + tmp9[1]; + + //write outputs + out_value1.write(tmp1r); + out_value2.write(tmp2r); + out_value3.write(tmp3r); + out_value4.write(tmp4r); + out_value5.write(tmp5r); + out_value6.write(tmp6r); + + out_valid.write(true); + wait(); + out_ack.write(false); + out_valid.write(false); + + } + +} // End + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/datatypes.f new file mode 100644 index 000000000..64f4c05f1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/datatypes.f @@ -0,0 +1,4 @@ +datatypes/stimulus.cpp +datatypes/display.cpp +datatypes/datatypes.cpp +datatypes/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/datatypes.h new file mode 100644 index 000000000..7ce8039e3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/datatypes.h @@ -0,0 +1,123 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( datatypes ) +{ + SC_HAS_PROCESS( datatypes ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal<bool>& reset ; + const sc_signal_bool_vector& in_value1; // Input port + const sc_signal_bool_vector& in_value2; // Input port + const sc_signal<long>& in_value3; // Input port + const sc_signal<int>& in_value4; // Input port + const sc_signal<short>& in_value5; // Input port + const sc_signal<char>& in_value6; // Input port + const sc_signal<bool>& in_valid; // Input port + sc_signal<bool>& out_ack; // Output port + sc_signal_bool_vector& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal<long>& out_value3; // Output port + sc_signal<int>& out_value4; // Output port + sc_signal<short>& out_value5; // Output port + sc_signal<char>& out_value6; // Output port + sc_signal<bool>& out_valid; // Output port + + // + // Constructor + // + + datatypes( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal<long>& IN_VALUE3, + const sc_signal<int>& IN_VALUE4, + const sc_signal<short>& IN_VALUE5, + const sc_signal<char>& IN_VALUE6, + const sc_signal<bool>& IN_VALID, + + sc_signal<bool>& OUT_ACK, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal<long>& OUT_VALUE3, + sc_signal<int>& OUT_VALUE4, + sc_signal<short>& OUT_VALUE5, + sc_signal<char>& OUT_VALUE6, + sc_signal<bool>& OUT_VALID + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_valid (IN_VALID), + out_ack (OUT_ACK), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + +//Process Functionality: Described in the member function below + void entry(); +}; + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/display.cpp new file mode 100644 index 000000000..ef7667e69 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/display.cpp @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "display.h" + +void display::entry() { + + while(true){ + do { wait(); } while ( in_valid == false ); + cout << "Display: " << in_value1.read() << " " << in_value2.read() << " " << in_value3.read() << " " << in_value4.read() << " " << in_value5.read() << " " << in_value6.read() << endl; + do { wait(); } while ( in_valid == true); + } + +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/display.h new file mode 100644 index 000000000..7804753f9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/display.h @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_value1; // Output port + const sc_signal_bool_vector& in_value2; // Output port + const sc_signal<long>& in_value3; // Output port + const sc_signal<int>& in_value4; // Output port + const sc_signal<short>& in_value5; // Output port + const sc_signal<char>& in_value6; // Output port + const sc_signal<bool>& in_valid; // Output port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal<long>& IN_VALUE3, + const sc_signal<int>& IN_VALUE4, + const sc_signal<short>& IN_VALUE5, + const sc_signal<char>& IN_VALUE6, + const sc_signal<bool>& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/golden/datatypes.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/golden/datatypes.log new file mode 100644 index 000000000..db69787de --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/golden/datatypes.log @@ -0,0 +1,203 @@ +SystemC Simulation +Stimuli: 0 1 12345678 -123456 20000 +Display: 00000001 01010011 -123374 20000 7698 _ +Stimuli: 1 3 12345683 -123453 20006 +Display: 00000011 01011000 -123367 20006 7705 _ +Stimuli: 2 5 12345688 -123450 20012 +Display: 00000111 01011101 -123360 20012 7712 _ +Stimuli: 3 7 12345693 -123447 20018 +Display: 00001001 01100010 -123353 20018 7719 _ +Stimuli: 4 9 12345698 -123444 20024 +Display: 00001101 01100111 -123346 20024 7726 _ +Stimuli: 5 11 12345703 -123441 20030 +Display: 00001111 01101100 -123339 20030 7733 _ +Stimuli: 6 13 12345708 -123438 20036 +Display: 00010011 01110001 -123332 20036 7740 _ +Stimuli: 7 15 12345713 -123435 20042 +Display: 00010101 01110110 -123325 20042 7747 _ +Stimuli: 8 17 12345718 -123432 20048 +Display: 00011001 01111011 -123318 20048 7754 _ +Stimuli: 9 19 12345723 -123429 20054 +Display: 00011011 10000000 -123311 20054 7761 _ +Stimuli: 10 21 12345728 -123426 20060 +Display: 00011111 10000101 -123304 20060 7768 _ +Stimuli: 11 23 12345733 -123423 20066 +Display: 00100001 10001010 -123297 20066 7775 _ +Stimuli: 12 25 12345738 -123420 20072 +Display: 00100101 10001111 -123546 20072 7526 _ +Stimuli: 13 27 12345743 -123417 20078 +Display: 00100111 10010100 -123539 20078 7533 _ +Stimuli: 14 29 12345748 -123414 20084 +Display: 00101011 10011001 -123532 20084 7540 _ +Stimuli: 15 31 12345753 -123411 20090 +Display: 00101101 10011110 -123525 20090 7547 _ +Stimuli: 16 33 12345758 -123408 20096 +Display: 00110001 10100011 -123518 20096 7554 _ +Stimuli: 17 35 12345763 -123405 20102 +Display: 00110011 10101000 -123511 20102 7561 _ +Stimuli: 18 37 12345768 -123402 20108 +Display: 00110111 10101101 -123504 20108 7568 _ +Stimuli: 19 39 12345773 -123399 20114 +Display: 00111001 10110010 -123497 20114 7575 _ +Stimuli: 20 41 12345778 -123396 20120 +Display: 00111101 10110111 -123490 20120 7582 _ +Stimuli: 21 43 12345783 -123393 20126 +Display: 00111111 10111100 -123483 20126 7589 _ +Stimuli: 22 45 12345788 -123390 20132 +Display: 01000011 11000001 -123476 20132 7596 _ +Stimuli: 23 47 12345793 -123387 20138 +Display: 01000101 11000110 -123469 20138 7603 _ +Stimuli: 24 49 12345798 -123384 20144 +Display: 01001001 11001011 -123462 20144 7610 _ +Stimuli: 25 51 12345803 -123381 20150 +Display: 01001011 11010000 -123455 20150 7617 _ +Stimuli: 26 53 12345808 -123378 20156 +Display: 01001111 11010101 -123448 20156 7624 _ +Stimuli: 27 55 12345813 -123375 20162 +Display: 01010001 11011010 -123441 20162 7631 _ +Stimuli: 28 57 12345818 -123372 20168 +Display: 01010101 11011111 -123434 20168 7638 _ +Stimuli: 29 59 12345823 -123369 20174 +Display: 01010111 11100100 -123427 20174 7645 _ +Stimuli: 30 61 12345828 -123366 20180 +Display: 01011011 11101001 -123420 20180 7652 _ +Stimuli: 31 63 12345833 -123363 20186 +Display: 01011101 11101110 -123413 20186 7659 _ +Stimuli: 32 65 12345838 -123360 20192 +Display: 01100001 11110011 -123406 20192 7666 _ +Stimuli: 33 67 12345843 -123357 20198 +Display: 01100011 11111000 -123399 20198 7673 _ +Stimuli: 34 69 12345848 -123354 20204 +Display: 01100111 11111101 -123392 20204 7680 _ +Stimuli: 35 71 12345853 -123351 20210 +Display: 01101001 00000010 -123385 20210 7687 _ +Stimuli: 36 73 12345858 -123348 20216 +Display: 01101101 00000111 -123378 20216 7694 _ +Stimuli: 37 75 12345863 -123345 20222 +Display: 01101111 00001100 -123371 20222 7701 _ +Stimuli: 38 77 12345868 -123342 20228 +Display: 01110011 00010001 -123364 20228 7708 _ +Stimuli: 39 79 12345873 -123339 20234 +Display: 01110101 00010110 -123357 20234 7715 _ +Stimuli: 40 81 12345878 -123336 20240 +Display: 01111001 00011011 -123350 20240 7722 _ +Stimuli: 41 83 12345883 -123333 20246 +Display: 01111011 00100000 -123343 20246 7729 _ +Stimuli: 42 85 12345888 -123330 20252 +Display: 01111111 00100101 -123336 20252 7736 _ +Stimuli: 43 87 12345893 -123327 20258 +Display: 10000001 00101010 -123329 20258 7743 _ +Stimuli: 44 89 12345898 -123324 20264 +Display: 10000101 00101111 -123322 20264 7750 _ +Stimuli: 45 91 12345903 -123321 20270 +Display: 10000111 00110100 -123315 20270 7757 _ +Stimuli: 46 93 12345908 -123318 20276 +Display: 10001011 00111001 -123308 20276 7764 _ +Stimuli: 47 95 12345913 -123315 20282 +Display: 10001101 00111110 -123301 20282 7771 _ +Stimuli: 48 97 12345918 -123312 20288 +Display: 10010001 01000011 -123294 20288 7778 _ +Stimuli: 49 99 12345923 -123309 20294 +Display: 10010011 01001000 -123287 20294 7785 _ +Stimuli: 50 101 12345928 -123306 20300 +Display: 10010111 01001101 -123280 20300 7792 _ +Stimuli: 51 103 12345933 -123303 20306 +Display: 10011001 01010010 -123273 20306 7799 _ +Stimuli: 52 105 12345938 -123300 20312 +Display: 10011101 01010111 -123266 20312 7806 _ +Stimuli: 53 107 12345943 -123297 20318 +Display: 10011111 01011100 -123259 20318 7813 _ +Stimuli: 54 109 12345948 -123294 20324 +Display: 10100011 01100001 -123252 20324 7820 _ +Stimuli: 55 111 12345953 -123291 20330 +Display: 10100101 01100110 -123245 20330 7827 _ +Stimuli: 56 113 12345958 -123288 20336 +Display: 10101001 01101011 -123238 20336 7834 _ +Stimuli: 57 115 12345963 -123285 20342 +Display: 10101011 01110000 -123231 20342 7841 _ +Stimuli: 58 117 12345968 -123282 20348 +Display: 10101111 01110101 -123224 20348 7848 _ +Stimuli: 59 119 12345973 -123279 20354 +Display: 10110001 01111010 -123217 20354 7855 _ +Stimuli: 60 121 12345978 -123276 20360 +Display: 10110101 01111111 -123210 20360 7862 _ +Stimuli: 61 123 12345983 -123273 20366 +Display: 10110111 10000100 -123203 20366 7869 _ +Stimuli: 62 125 12345988 -123270 20372 +Display: 10111011 10001001 -123196 20372 7876 _ +Stimuli: 63 127 12345993 -123267 20378 +Display: 10111101 10001110 -123189 20378 7883 _ +Stimuli: 64 -127 12345998 -123264 20384 +Display: 11000001 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+ + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Stan Liao, Synopsys, Inc., 1999-09-21 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" +#include "display.h" +#include "datatypes.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal_bool_vector stimulus_line1; + sc_signal_bool_vector stimulus_line2; + sc_signal<long> stimulus_line3; + sc_signal<int> stimulus_line4; + sc_signal<short> stimulus_line5; + sc_signal<char> stimulus_line6; + sc_signal<bool> input_valid; + sc_signal<bool> ack; + sc_signal<bool> output_valid; + sc_signal_bool_vector result_line1; + sc_signal_bool_vector result_line2; + sc_signal<long> result_line3; + sc_signal<int> result_line4; + sc_signal<short> result_line5; + sc_signal<char> result_line6; + + output_valid = 0; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + input_valid, + ack); + + datatypes datatypes1( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + input_valid, + ack, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + display display1( "display_block", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/stimulus.cpp new file mode 100644 index 000000000..79a2d896a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/stimulus.cpp @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" + +void stimulus::entry() { + + reset.write(true); + wait(); + reset.write(false); + + sc_signed tmp1(8); + sc_signed tmp2(8); + long tmp3; + int tmp4; + short tmp5; + char tmp6; + + int counter = 0; + tmp1 = "00000000"; + tmp2 = "00000001"; + tmp3 = 12345678; + tmp4 = -123456; + tmp5 = 20000; + tmp6 = 'R'; + + + while(counter<100){ + out_valid.write(true); + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_value6.write(tmp6); + cout << "Stimuli: " << tmp1 << " " << tmp2 << " " << tmp3 << " " << tmp4 << " " << tmp5 << " " << endl; + tmp1 = tmp1 + 1; + tmp2 = tmp2 + 2; + tmp3 = tmp3 + 5; + tmp4 = tmp4 + 3; + tmp5 = tmp5 + 6; + tmp6 = tmp6 + 4; + do { wait(); } while (in_ack==false); + out_valid.write(false); + counter++; + wait(); + } + sc_stop(); +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/stimulus.h new file mode 100644 index 000000000..689995a6a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/stimulus.h @@ -0,0 +1,89 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset; + sc_signal_bool_vector& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal<long>& out_value3; // Output port + sc_signal<int>& out_value4; // Output port + sc_signal<short>& out_value5; // Output port + sc_signal<char>& out_value6; // Output port + sc_signal<bool>& out_valid; // Output port + const sc_signal<bool>& in_ack; + + // + // Constructor + // + + stimulus( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + sc_signal<bool>& RESET, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal<long>& OUT_VALUE3, + sc_signal<int>& OUT_VALUE4, + sc_signal<short>& OUT_VALUE5, + sc_signal<char>& OUT_VALUE6, + sc_signal<bool>& OUT_VALID, + const sc_signal<bool>& IN_ACK + ) + : + reset (RESET), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_valid (OUT_VALID), + in_ack (IN_ACK) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + void entry(); +}; +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/common.h new file mode 100644 index 000000000..b0b56195b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal<sc_bv<5> > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/display.cpp new file mode 100644 index 000000000..64c5ee2b4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/display.cpp @@ -0,0 +1,58 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up.
+ while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/display.h new file mode 100644 index 000000000..21e3c27fd --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/display.h @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal<int>& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal<bool>& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal<int>& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal<bool>& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/golden/increment.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/golden/increment.log new file mode 100644 index 000000000..e8205e774 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/golden/increment.log @@ -0,0 +1,51 @@ +SystemC Simulation +Stimuli : 0 0 at 23 ns +Display : 3 00011 at 27 ns +Stimuli : 4 4 at 44 ns +Display : 7 00111 at 48 ns +Stimuli : 8 8 at 65 ns +Display : 11 01011 at 69 ns +Stimuli : 12 12 at 86 ns +Display : 15 01111 at 90 ns +Stimuli : 16 -16 at 107 ns +Display : 19 10011 at 111 ns +Stimuli : 20 -12 at 128 ns +Display : 23 10111 at 132 ns +Stimuli : 24 -8 at 149 ns +Display : 27 11011 at 153 ns +Stimuli : 28 -4 at 170 ns +Display : 31 11111 at 174 ns +Stimuli : 32 0 at 191 ns +Display : 35 00011 at 195 ns +Stimuli : 36 4 at 212 ns +Display : 39 00111 at 216 ns +Stimuli : 40 8 at 233 ns +Display : 43 01011 at 237 ns +Stimuli : 44 12 at 254 ns +Display : 47 01111 at 258 ns +Stimuli : 48 -16 at 275 ns +Display : 51 10011 at 279 ns +Stimuli : 52 -12 at 296 ns +Display : 55 10111 at 300 ns +Stimuli : 56 -8 at 317 ns +Display : 59 11011 at 321 ns +Stimuli : 60 -4 at 338 ns +Display : 63 11111 at 342 ns +Stimuli : 64 0 at 359 ns +Display : 67 00011 at 363 ns +Stimuli : 68 4 at 380 ns +Display : 71 00111 at 384 ns +Stimuli : 72 8 at 401 ns +Display : 75 01011 at 405 ns +Stimuli : 76 12 at 422 ns +Display : 79 01111 at 426 ns +Stimuli : 80 -16 at 443 ns +Display : 83 10011 at 447 ns +Stimuli : 84 -12 at 464 ns +Display : 87 10111 at 468 ns +Stimuli : 88 -8 at 485 ns +Display : 91 11011 at 489 ns +Stimuli : 92 -4 at 506 ns +Display : 95 11111 at 510 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/increment.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/increment.cpp new file mode 100644 index 000000000..3b32d2317 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/increment.cpp @@ -0,0 +1,85 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + increment.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "increment.h" + +void increment::entry(){ + + #define ONE 1 + const int eins = 1; + int tmp1; + sc_bigint<5> tmp2; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + + //execute simple operations + tmp1 = tmp1 + 1; + tmp1 = tmp1 + ONE; + tmp1 = tmp1 + eins; + tmp2 = tmp2 + 1; + tmp2 = tmp2 + ONE; + tmp2 = tmp2 + eins; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/increment.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/increment.f new file mode 100644 index 000000000..3e7b5f3b7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/increment.f @@ -0,0 +1,4 @@ +increment/stimulus.cpp +increment/display.cpp +increment/increment.cpp +increment/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/increment.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/increment.h new file mode 100644 index 000000000..30093ede8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/increment.h @@ -0,0 +1,96 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + increment.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( increment ) +{ + SC_HAS_PROCESS( increment ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal<bool>& reset ; + const sc_signal<int>& in_value1; // Input port + const sc_signal_bool_vector& in_value2; // Input port + const sc_signal<bool>& in_valid; // Input port + sc_signal<int>& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal<bool>& out_valid; // Output port + + // + // Constructor + // + + increment ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal<int>& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal<bool>& IN_VALID, // Input port + sc_signal<int>& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal<bool>& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/main.cpp new file mode 100644 index 000000000..6189f9dc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" +#include "display.h" +#include "increment.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal<int> stimulus_line1; + sc_signal_bool_vector stimulus_line2; + sc_signal<bool> input_valid; + sc_signal<bool> output_valid; + sc_signal<int> result_line1; + sc_signal_bool_vector result_line2; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + input_valid); + + increment increment1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + input_valid, + result_line1, + result_line2, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/stimulus.cpp new file mode 100644 index 000000000..9f22a9c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/stimulus.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" + +void stimulus::entry() +{ + int send_value1 = 0; + sc_signed send_value2(5); + + // sending some reset values + reset.write(true); + out_valid.write(false); + send_value2 = 0; + out_stimulus1.write(0); + out_stimulus2.write(0); + wait(3); + reset.write(false); + // sending normal mode values + while(true){ + wait(20); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " at " + << sc_time_stamp() << endl; + send_value1 = send_value1+4; + send_value2 = send_value2+4; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/stimulus.h new file mode 100644 index 000000000..0bda545fa --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/stimulus.h @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset; + sc_signal<int>& out_stimulus1; + sc_signal_bool_vector& out_stimulus2; + sc_signal<bool>& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal<bool>& RESET, + sc_signal<int>& OUT_STIMULUS1, + sc_signal_bool_vector& OUT_STIMULUS2, + sc_signal<bool>& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/common.h new file mode 100644 index 000000000..60baad076 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/common.h @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4; +typedef sc_signal<sc_bv<5> > sc_signal_bool_vector5; +typedef sc_signal<sc_bv<6> > sc_signal_bool_vector6; +typedef sc_signal<sc_bv<7> > sc_signal_bool_vector7; +typedef sc_signal<sc_bv<8> > sc_signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/display.cpp new file mode 100644 index 000000000..b13920d6c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/display.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up.
+ while (in_valid.read()==false) wait(); + cout << "Display : " + << in_data1.read() << " " + << in_data3.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/display.h new file mode 100644 index 000000000..524ee27b0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/display.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector4& in_data1; // Input port + const sc_signal_bool_vector5& in_data2; // Input port + const sc_signal_bool_vector6& in_data3; // Input port + const sc_signal_bool_vector7& in_data4; // Input port + const sc_signal_bool_vector8& in_data5; // Input port + const sc_signal<bool>& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector4& IN_DATA1, + const sc_signal_bool_vector5& IN_DATA2, + const sc_signal_bool_vector6& IN_DATA3, + const sc_signal_bool_vector7& IN_DATA4, + const sc_signal_bool_vector8& IN_DATA5, + const sc_signal<bool>& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/golden/sharing.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/golden/sharing.log new file mode 100644 index 000000000..dda9320f3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/golden/sharing.log @@ -0,0 +1,39 @@ +SystemC Simulation +Stimuli : 0 0 0 0 0 at 23 ns +Display : 1010 001010 001010 0001010 00001010 at 27 ns +Display : 1011 001011 001011 0010100 00001011 at 30 ns +Stimuli : 1 1 1 1 1 at 44 ns +Display : 1011 001011 001011 0001011 00001011 at 48 ns +Display : 1100 001100 001100 0010101 00001100 at 51 ns +Stimuli : 2 2 2 2 2 at 65 ns +Display : 1100 001100 001100 0001100 00001100 at 69 ns +Display : 1101 001101 001101 0010110 00001101 at 72 ns +Stimuli : 3 3 3 3 3 at 86 ns +Display : 1101 001101 001101 0001101 00001101 at 90 ns +Display : 1110 001110 001110 0010111 00001110 at 93 ns +Stimuli : 4 4 4 4 4 at 107 ns +Display : 1110 001110 001110 0001110 00001110 at 111 ns +Display : 1111 001111 001111 0011000 00001111 at 114 ns +Stimuli : 5 5 5 5 5 at 128 ns +Display : 1111 001111 001111 0001111 00001111 at 132 ns +Display : 0000 010000 010000 0011001 00010000 at 135 ns +Stimuli : 6 6 6 6 6 at 149 ns +Display : 0000 010000 010000 0010000 00010000 at 153 ns +Display : 0001 010001 010001 0011010 00010001 at 156 ns +Stimuli : 7 7 7 7 7 at 170 ns +Display : 0001 010001 010001 0010001 00010001 at 174 ns +Display : 0010 010010 010010 0011011 00010010 at 177 ns +Stimuli : -8 8 8 8 8 at 191 ns +Display : 0010 010010 010010 0010010 00010010 at 195 ns +Display : 0011 010011 010011 0011100 00010011 at 198 ns +Stimuli : -7 9 9 9 9 at 212 ns +Display : 0011 010011 010011 0010011 00010011 at 216 ns +Display : 0100 010100 010100 0011101 00010100 at 219 ns +Stimuli : -6 10 10 10 10 at 233 ns +Display : 0100 010100 010100 0010100 00010100 at 237 ns +Display : 0101 010101 010101 0011110 00010101 at 240 ns +Stimuli : -5 11 11 11 11 at 254 ns +Display : 0101 010101 010101 0010101 00010101 at 258 ns +Display : 0110 010110 010110 0011111 00010110 at 261 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/main.cpp new file mode 100644 index 000000000..056a41e79 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/main.cpp @@ -0,0 +1,97 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" +#include "display.h" +#include "sharing.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal_bool_vector4 stimulus_line1; + sc_signal_bool_vector5 stimulus_line2; + sc_signal_bool_vector6 stimulus_line3; + sc_signal_bool_vector7 stimulus_line4; + sc_signal_bool_vector8 stimulus_line5; + sc_signal<bool> input_valid; + sc_signal<bool> output_valid; + sc_signal_bool_vector4 result_line1; + sc_signal_bool_vector5 result_line2; + sc_signal_bool_vector6 result_line3; + sc_signal_bool_vector7 result_line4; + sc_signal_bool_vector8 result_line5; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid); + + sharing sharing1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/sharing.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/sharing.cpp new file mode 100644 index 000000000..aa1dca4c5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/sharing.cpp @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sharing.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "sharing.h" + +void sharing::entry(){ + + sc_bigint<4> tmp1; + sc_biguint<5> tmp2; + sc_bigint<6> tmp3; + sc_biguint<7> tmp4; + sc_biguint<8> tmp5; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + //execute simple operations + tmp1 = tmp1 + 10; + tmp2 = tmp2 + 10; + tmp3 = tmp3 + 10; + tmp4 = tmp4 + 10; + tmp5 = tmp5 + 10; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute simple operations + tmp1 = tmp1 + 1; + tmp2 = tmp2 + 10; + tmp3 = tmp3 + 1; + tmp4 = tmp4 + 10; + tmp5 = tmp5 + 1; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/sharing.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/sharing.f new file mode 100644 index 000000000..0c0f3ff29 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/sharing.f @@ -0,0 +1,4 @@ +sharing/stimulus.cpp +sharing/display.cpp +sharing/sharing.cpp +sharing/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/sharing.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/sharing.h new file mode 100644 index 000000000..d185d964c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/sharing.h @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sharing.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( sharing ) +{ + SC_HAS_PROCESS( sharing ); + + sc_in_clk clk; + + const sc_signal<bool>& reset ; + const sc_signal_bool_vector4& in_value1; // Input port + const sc_signal_bool_vector5& in_value2; // Input port + const sc_signal_bool_vector6& in_value3; // Input port + const sc_signal_bool_vector7& in_value4; // Input port + const sc_signal_bool_vector8& in_value5; // Input port + const sc_signal<bool>& in_valid; // Input port + sc_signal_bool_vector4& out_value1; // Output port + sc_signal_bool_vector5& out_value2; // Output port + sc_signal_bool_vector6& out_value3; // Output port + sc_signal_bool_vector7& out_value4; // Output port + sc_signal_bool_vector8& out_value5; // Output port + sc_signal<bool>& out_valid; // Output port + + // + // Constructor + // + + sharing ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal_bool_vector4& IN_VALUE1, + const sc_signal_bool_vector5& IN_VALUE2, + const sc_signal_bool_vector6& IN_VALUE3, + const sc_signal_bool_vector7& IN_VALUE4, + const sc_signal_bool_vector8& IN_VALUE5, + const sc_signal<bool>& IN_VALID, // Input port + sc_signal_bool_vector4& OUT_VALUE1, + sc_signal_bool_vector5& OUT_VALUE2, + sc_signal_bool_vector6& OUT_VALUE3, + sc_signal_bool_vector7& OUT_VALUE4, + sc_signal_bool_vector8& OUT_VALUE5, + sc_signal<bool>& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/stimulus.cpp new file mode 100644 index 000000000..7b71dd7a7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/stimulus.cpp @@ -0,0 +1,88 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" + +void stimulus::entry() { + sc_bigint<4> send_value1; + sc_biguint<5> send_value2; + sc_bigint<6> send_value3; + sc_biguint<7> send_value4; + sc_biguint<8> send_value5; + + + // sending some reset values + reset.write(true); + out_valid.write(false); + send_value1 = 0; + send_value2 = 0; + send_value3 = 0; + send_value4 = 0; + send_value5 = 0; + out_stimulus1.write(0); + out_stimulus2.write(0); + out_stimulus3.write(0); + out_stimulus4.write(0); + out_stimulus5.write(0); + wait(3); + reset.write(false); + // sending normal mode values + while(true){ + wait(20); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_stimulus3.write( send_value3 ); + out_stimulus4.write( send_value4 ); + out_stimulus5.write( send_value5 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " " + << send_value3 << " " + << send_value4 << " " + << send_value5 << " " << " at " + << sc_time_stamp() << endl; + send_value1 = send_value1+1; + send_value2 = send_value2+1; + send_value3 = send_value3+1; + send_value4 = send_value4+1; + send_value5 = send_value5+1; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/stimulus.h new file mode 100644 index 000000000..28a75e233 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/stimulus.h @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset; + sc_signal_bool_vector4& out_stimulus1; + sc_signal_bool_vector5& out_stimulus2; + sc_signal_bool_vector6& out_stimulus3; + sc_signal_bool_vector7& out_stimulus4; + sc_signal_bool_vector8& out_stimulus5; + sc_signal<bool>& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal<bool>& RESET, + sc_signal_bool_vector4& OUT_STIMULUS1, + sc_signal_bool_vector5& OUT_STIMULUS2, + sc_signal_bool_vector6& OUT_STIMULUS3, + sc_signal_bool_vector7& OUT_STIMULUS4, + sc_signal_bool_vector8& OUT_STIMULUS5, + sc_signal<bool>& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_stimulus3(OUT_STIMULUS3), + out_stimulus4(OUT_STIMULUS4), + out_stimulus5(OUT_STIMULUS5), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/common.h new file mode 100644 index 000000000..335b51334 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal<sc_bv<2> > sc_signal_bool_vector2; +typedef sc_signal<sc_bv<3> > sc_signal_bool_vector3; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.cpp new file mode 100644 index 000000000..1418eba9b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.cpp @@ -0,0 +1,105 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-12-10 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "datatypes.h" + +void datatypes::entry(){ + + sc_biguint<2> tmp1; + sc_bigint<2> tmp2; + sc_biguint<3> tmp3; + sc_bigint<3> tmp4; + sc_biguint<2> tmp1r; + sc_bigint<2> tmp2r; + sc_biguint<3> tmp3r; + sc_bigint<3> tmp4r; + + // reset_loop + out_valid.write(false); + out_ack.write(false); + wait(); + + // + // main loop + // + + while(1) { + //input handshake + while(in_valid.read()==false) wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + + // input handshake + out_ack.write(true); + + //execute datatypes operations + // unsigned(2) <- signed(3)/unsigned(2) + tmp1r = tmp4 / tmp1; + // signed(2) <- unsigned(2)/signed(3) + tmp2r = tmp1 / tmp4; + // unsigned(3) <- unsigned(3)/unsigned(2) + tmp3r = tmp3 / tmp1; + // signed(3) <- signed(3)/signed(2) + tmp4r = tmp4 / tmp2; + + // write outputs + out_value1.write(tmp1r); + out_value2.write(tmp2r); + out_value3.write(tmp3r); + out_value4.write(tmp4r); + + //output handshake + out_valid.write(true); + wait(); + + //input handshake + out_ack.write(false); + + //output handshake + out_valid.write(false); + wait(); + } +} + +// EOF + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.f new file mode 100644 index 000000000..64f4c05f1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.f @@ -0,0 +1,4 @@ +datatypes/stimulus.cpp +datatypes/display.cpp +datatypes/datatypes.cpp +datatypes/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.h new file mode 100644 index 000000000..0d58458fd --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.h @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( datatypes ) +{ + SC_HAS_PROCESS( datatypes ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal<bool>& reset ; + const sc_signal_bool_vector2& in_value1; // Input port + const sc_signal_bool_vector2& in_value2; // Input port + const sc_signal_bool_vector3& in_value3; // Input port + const sc_signal_bool_vector3& in_value4; // Input port + const sc_signal<bool>& in_valid; // Input port + sc_signal_bool_vector2& out_value1; // Output port + sc_signal_bool_vector2& out_value2; // Output port + sc_signal_bool_vector3& out_value3; // Output port + sc_signal_bool_vector3& out_value4; // Output port + sc_signal<bool>& out_ack; // Output port + sc_signal<bool>& out_valid; // Output port + + + // + // Constructor + // + + datatypes ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal_bool_vector2& IN_VALUE1, + const sc_signal_bool_vector2& IN_VALUE2, + const sc_signal_bool_vector3& IN_VALUE3, + const sc_signal_bool_vector3& IN_VALUE4, + const sc_signal<bool>& IN_VALID, // Input port + sc_signal_bool_vector2& OUT_VALUE1, + sc_signal_bool_vector2& OUT_VALUE2, + sc_signal_bool_vector3& OUT_VALUE3, + sc_signal_bool_vector3& OUT_VALUE4, + sc_signal<bool>& OUT_ACK, + sc_signal<bool>& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_ack (OUT_ACK), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + +void entry (); + +}; + +// EOF + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/display.cpp new file mode 100644 index 000000000..649ac74a3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/display.cpp @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-12-11 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry() { + + int counter = 0; + wait(); + + while(counter<100){ + do { wait(); } while ( in_valid == false); + cout << "Display: " << in_value1.read() << " " << in_value2.read() << " " << in_value3.read() << " " << in_value4.read() << endl; + do { wait(); } while ( in_valid == true); + counter++; + } + sc_stop(); +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/display.h new file mode 100644 index 000000000..c4efff539 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/display.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector2& in_value1; // Input port + const sc_signal_bool_vector2& in_value2; // Input port + const sc_signal_bool_vector3& in_value3; // Input port + const sc_signal_bool_vector3& in_value4; // Input port + const sc_signal<bool>& in_valid; // Input port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal_bool_vector2& IN_VALUE1, + const sc_signal_bool_vector2& IN_VALUE2, + const sc_signal_bool_vector3& IN_VALUE3, + const sc_signal_bool_vector3& IN_VALUE4, + const sc_signal<bool>& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/golden/datatypes.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/golden/datatypes.log new file mode 100644 index 000000000..487107cf4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/golden/datatypes.log @@ -0,0 +1,204 @@ +SystemC Simulation +Stimuli: 1 -2 2 3 +Display: 11 00 010 111 +Stimuli: 2 -1 3 -4 +Display: 10 00 001 100 +Stimuli: 3 1 4 -3 +Display: 11 11 001 101 +Stimuli: 1 -2 5 -2 +Display: 10 00 101 001 +Stimuli: 2 -1 6 -1 +Display: 00 10 011 001 +Stimuli: 3 1 7 1 +Display: 00 11 010 001 +Stimuli: 1 -2 1 2 +Display: 10 00 001 111 +Stimuli: 2 -1 2 3 +Display: 01 00 001 101 +Stimuli: 3 1 3 -4 +Display: 11 00 001 100 +Stimuli: 1 -2 4 -3 +Display: 01 00 100 001 +Stimuli: 2 -1 5 -2 +Display: 11 11 010 010 +Stimuli: 3 1 6 -1 +Display: 00 01 010 111 +Stimuli: 1 -2 7 1 +Display: 01 01 111 000 +Stimuli: 2 -1 1 2 +Display: 01 01 000 110 +Stimuli: 3 1 2 3 +Display: 01 01 000 011 +Stimuli: 1 -2 3 -4 +Display: 00 00 011 010 +Stimuli: 2 -1 4 -3 +Display: 11 00 010 011 +Stimuli: 3 1 5 -2 +Display: 00 11 001 110 +Stimuli: 1 -2 6 -1 +Display: 11 11 110 000 +Stimuli: 2 -1 7 1 +Display: 00 10 011 111 +Stimuli: 3 1 1 2 +Display: 00 01 000 010 +Stimuli: 1 -2 2 3 +Display: 11 00 010 111 +Stimuli: 2 -1 3 -4 +Display: 10 00 001 100 +Stimuli: 3 1 4 -3 +Display: 11 11 001 101 +Stimuli: 1 -2 5 -2 +Display: 10 00 101 001 +Stimuli: 2 -1 6 -1 +Display: 00 10 011 001 +Stimuli: 3 1 7 1 +Display: 00 11 010 001 +Stimuli: 1 -2 1 2 +Display: 10 00 001 111 +Stimuli: 2 -1 2 3 +Display: 01 00 001 101 +Stimuli: 3 1 3 -4 +Display: 11 00 001 100 +Stimuli: 1 -2 4 -3 +Display: 01 00 100 001 +Stimuli: 2 -1 5 -2 +Display: 11 11 010 010 +Stimuli: 3 1 6 -1 +Display: 00 01 010 111 +Stimuli: 1 -2 7 1 +Display: 01 01 111 000 +Stimuli: 2 -1 1 2 +Display: 01 01 000 110 +Stimuli: 3 1 2 3 +Display: 01 01 000 011 +Stimuli: 1 -2 3 -4 +Display: 00 00 011 010 +Stimuli: 2 -1 4 -3 +Display: 11 00 010 011 +Stimuli: 3 1 5 -2 +Display: 00 11 001 110 +Stimuli: 1 -2 6 -1 +Display: 11 11 110 000 +Stimuli: 2 -1 7 1 +Display: 00 10 011 111 +Stimuli: 3 1 1 2 +Display: 00 01 000 010 +Stimuli: 1 -2 2 3 +Display: 11 00 010 111 +Stimuli: 2 -1 3 -4 +Display: 10 00 001 100 +Stimuli: 3 1 4 -3 +Display: 11 11 001 101 +Stimuli: 1 -2 5 -2 +Display: 10 00 101 001 +Stimuli: 2 -1 6 -1 +Display: 00 10 011 001 +Stimuli: 3 1 7 1 +Display: 00 11 010 001 +Stimuli: 1 -2 1 2 +Display: 10 00 001 111 +Stimuli: 2 -1 2 3 +Display: 01 00 001 101 +Stimuli: 3 1 3 -4 +Display: 11 00 001 100 +Stimuli: 1 -2 4 -3 +Display: 01 00 100 001 +Stimuli: 2 -1 5 -2 +Display: 11 11 010 010 +Stimuli: 3 1 6 -1 +Display: 00 01 010 111 +Stimuli: 1 -2 7 1 +Display: 01 01 111 000 +Stimuli: 2 -1 1 2 +Display: 01 01 000 110 +Stimuli: 3 1 2 3 +Display: 01 01 000 011 +Stimuli: 1 -2 3 -4 +Display: 00 00 011 010 +Stimuli: 2 -1 4 -3 +Display: 11 00 010 011 +Stimuli: 3 1 5 -2 +Display: 00 11 001 110 +Stimuli: 1 -2 6 -1 +Display: 11 11 110 000 +Stimuli: 2 -1 7 1 +Display: 00 10 011 111 +Stimuli: 3 1 1 2 +Display: 00 01 000 010 +Stimuli: 1 -2 2 3 +Display: 11 00 010 111 +Stimuli: 2 -1 3 -4 +Display: 10 00 001 100 +Stimuli: 3 1 4 -3 +Display: 11 11 001 101 +Stimuli: 1 -2 5 -2 +Display: 10 00 101 001 +Stimuli: 2 -1 6 -1 +Display: 00 10 011 001 +Stimuli: 3 1 7 1 +Display: 00 11 010 001 +Stimuli: 1 -2 1 2 +Display: 10 00 001 111 +Stimuli: 2 -1 2 3 +Display: 01 00 001 101 +Stimuli: 3 1 3 -4 +Display: 11 00 001 100 +Stimuli: 1 -2 4 -3 +Display: 01 00 100 001 +Stimuli: 2 -1 5 -2 +Display: 11 11 010 010 +Stimuli: 3 1 6 -1 +Display: 00 01 010 111 +Stimuli: 1 -2 7 1 +Display: 01 01 111 000 +Stimuli: 2 -1 1 2 +Display: 01 01 000 110 +Stimuli: 3 1 2 3 +Display: 01 01 000 011 +Stimuli: 1 -2 3 -4 +Display: 00 00 011 010 +Stimuli: 2 -1 4 -3 +Display: 11 00 010 011 +Stimuli: 3 1 5 -2 +Display: 00 11 001 110 +Stimuli: 1 -2 6 -1 +Display: 11 11 110 000 +Stimuli: 2 -1 7 1 +Display: 00 10 011 111 +Stimuli: 3 1 1 2 +Display: 00 01 000 010 +Stimuli: 1 -2 2 3 +Display: 11 00 010 111 +Stimuli: 2 -1 3 -4 +Display: 10 00 001 100 +Stimuli: 3 1 4 -3 +Display: 11 11 001 101 +Stimuli: 1 -2 5 -2 +Display: 10 00 101 001 +Stimuli: 2 -1 6 -1 +Display: 00 10 011 001 +Stimuli: 3 1 7 1 +Display: 00 11 010 001 +Stimuli: 1 -2 1 2 +Display: 10 00 001 111 +Stimuli: 2 -1 2 3 +Display: 01 00 001 101 +Stimuli: 3 1 3 -4 +Display: 11 00 001 100 +Stimuli: 1 -2 4 -3 +Display: 01 00 100 001 +Stimuli: 2 -1 5 -2 +Display: 11 11 010 010 +Stimuli: 3 1 6 -1 +Display: 00 01 010 111 +Stimuli: 1 -2 7 1 +Display: 01 01 111 000 +Stimuli: 2 -1 1 2 +Display: 01 01 000 110 +Stimuli: 3 1 2 3 +Display: 01 01 000 011 +Stimuli: 1 -2 3 -4 +Display: 00 00 011 010 +Stimuli: 2 -1 4 -3 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/main.cpp new file mode 100644 index 000000000..a56c0c05e --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/main.cpp @@ -0,0 +1,94 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" +#include "display.h" +#include "datatypes.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal_bool_vector2 stimulus_line1; + sc_signal_bool_vector2 stimulus_line2; + sc_signal_bool_vector3 stimulus_line3; + sc_signal_bool_vector3 stimulus_line4; + sc_signal<bool> input_valid; + sc_signal<bool> ack; + sc_signal<bool> output_valid; + sc_signal_bool_vector2 result_line1; + sc_signal_bool_vector2 result_line2; + sc_signal_bool_vector3 result_line3; + sc_signal_bool_vector3 result_line4; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + input_valid, + ack); + + datatypes datatypes1( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + ack, + output_valid); + + display display1( "display_block", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/stimulus.cpp new file mode 100644 index 000000000..5f0d4fc1d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/stimulus.cpp @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-10-01 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + reset.write(true); + wait(); + reset.write(false); + + sc_unsigned tmp1(2); + sc_signed tmp2(2); + sc_unsigned tmp3(3); + sc_signed tmp4(3); + sc_unsigned zero_2(2); + sc_unsigned zero_3(3); + + zero_3 = "000"; + zero_2 = "00"; + tmp1 = "01"; + tmp2 = "10"; + tmp3 = "010"; + tmp4 = "011"; + + + while(true){ + // handshake + out_valid.write(true); + // write stimuli + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + cout << "Stimuli: "<< tmp1 << " " << tmp2 << " " << tmp3 << " " << tmp4 << endl; + // update stimuli + tmp1 = tmp1 + 1; + if (tmp1 == zero_2) tmp1 = "01"; + tmp2 = tmp2 + 1; + if (tmp2 == zero_2) tmp2 = "01"; + tmp3 = tmp3 + 1; + if (tmp3 == zero_3) tmp3 = "001"; + tmp4 = tmp4 + 1; + if (tmp4 == zero_3) tmp4 = "001"; + // handshake + do { wait(); } while (in_ack==false); + out_valid.write(false); + wait(); + } +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/stimulus.h new file mode 100644 index 000000000..5e7335244 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/stimulus.h @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset ; + sc_signal_bool_vector2& out_value1; // Output port + sc_signal_bool_vector2& out_value2; // Output port + sc_signal_bool_vector3& out_value3; // Output port + sc_signal_bool_vector3& out_value4; // Output port + sc_signal<bool>& out_valid; // Output port + const sc_signal<bool>& in_ack; + + // + // Constructor + // + + stimulus( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + sc_signal<bool>& RESET, + sc_signal_bool_vector2& OUT_VALUE1, + sc_signal_bool_vector2& OUT_VALUE2, + sc_signal_bool_vector3& OUT_VALUE3, + sc_signal_bool_vector3& OUT_VALUE4, + sc_signal<bool>& OUT_VALID, + const sc_signal<bool>& IN_ACK + ) + : + reset (RESET), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_valid (OUT_VALID), + in_ack (IN_ACK) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + void entry(); +}; +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/common.h new file mode 100644 index 000000000..8a560ac63 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4; +typedef sc_signal<sc_bv<8> > sc_signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/display.cpp new file mode 100644 index 000000000..2a99472b8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/display.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up.
+ while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/display.h new file mode 100644 index 000000000..5902ca652 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal<int>& in_data1; // Input port + const sc_signal_bool_vector4& in_data2; // Input port + const sc_signal_bool_vector4& in_data3; // Input port + const sc_signal_bool_vector8& in_data4; // Input port + const sc_signal_bool_vector8& in_data5; // Input port + const sc_signal<bool>& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal<int>& IN_DATA1, + const sc_signal_bool_vector4& IN_DATA2, + const sc_signal_bool_vector4& IN_DATA3, + const sc_signal_bool_vector8& IN_DATA4, + const sc_signal_bool_vector8& IN_DATA5, + const sc_signal<bool>& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.cpp new file mode 100644 index 000000000..bc363dc9a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.cpp @@ -0,0 +1,129 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + divide.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "divide.h" + +void divide::entry(){ + + int tmp1; + sc_bigint<4> tmp2; + sc_biguint<4> tmp3; + sc_bigint<8> tmp4; + sc_biguint<8> tmp5; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + //execute operations + tmp1 = tmp1/2; + tmp2 = tmp2/2; + tmp3 = tmp3/2; + tmp4 = tmp4/2; + tmp5 = tmp5/2; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute slf assigning operations + tmp1 /= 3; + tmp2 /= 3; + tmp3 /= 3; + tmp4 /= 3; + tmp5 /= 3; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute self assigning operations + if (tmp3!=0) + tmp1 = (tmp2/tmp3).to_int(); + if (tmp4!=0) + tmp2 = tmp2/tmp4; + if (tmp5!=0) + tmp3 = tmp3/tmp5; + if (tmp5!=0) + tmp4 = tmp4/tmp5; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.f new file mode 100644 index 000000000..2e58a7f37 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.f @@ -0,0 +1,4 @@ +divide/stimulus.cpp +divide/display.cpp +divide/divide.cpp +divide/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.h new file mode 100644 index 000000000..20be049c1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.h @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + divide.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( divide ) +{ + SC_HAS_PROCESS( divide ); + + sc_in_clk clk; + + const sc_signal<bool>& reset ; + const sc_signal<int>& in_value1; // Input port + const sc_signal_bool_vector4& in_value2; // Input port + const sc_signal_bool_vector4& in_value3; // Input port + const sc_signal_bool_vector8& in_value4; // Input port + const sc_signal_bool_vector8& in_value5; // Input port + const sc_signal<bool>& in_valid; // Input port + sc_signal<int>& out_value1; // Output port + sc_signal_bool_vector4& out_value2; // Output port + sc_signal_bool_vector4& out_value3; // Output port + sc_signal_bool_vector8& out_value4; // Output port + sc_signal_bool_vector8& out_value5; // Output port + sc_signal<bool>& out_valid; // Output port + + // + // Constructor + // + + divide( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal<int>& IN_VALUE1, + const sc_signal_bool_vector4& IN_VALUE2, + const sc_signal_bool_vector4& IN_VALUE3, + const sc_signal_bool_vector8& IN_VALUE4, + const sc_signal_bool_vector8& IN_VALUE5, + const sc_signal<bool>& IN_VALID, // Input port + sc_signal<int>& OUT_VALUE1, + sc_signal_bool_vector4& OUT_VALUE2, + sc_signal_bool_vector4& OUT_VALUE3, + sc_signal_bool_vector8& OUT_VALUE4, + sc_signal_bool_vector8& OUT_VALUE5, + sc_signal<bool>& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/golden/divide.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/golden/divide.log new file mode 100644 index 000000000..e48b2110a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/golden/divide.log @@ -0,0 +1,35 @@ +SystemC Simulation +Stimuli : 254 -2 14 -2 254 at 18 ns +Display : 127 1111 0111 11111111 01111111 at 22 ns +Display : 42 1111 0010 00000000 00101010 at 25 ns +Display : 0 1111 0000 00000000 00101010 at 28 ns +Stimuli : 253 -3 13 -3 253 at 34 ns +Display : 126 1111 0110 11111111 01111110 at 38 ns +Display : 42 1111 0010 00000000 00101010 at 41 ns +Display : 0 1111 0000 00000000 00101010 at 44 ns +Stimuli : 252 -4 12 -4 252 at 50 ns +Display : 126 1110 0110 11111110 01111110 at 54 ns +Display : 42 1110 0010 00000000 00101010 at 57 ns +Display : 0 1110 0000 00000000 00101010 at 60 ns +Stimuli : 251 -5 11 -5 251 at 66 ns +Display : 125 1110 0101 11111110 01111101 at 70 ns +Display : 41 1110 0001 00000000 00101001 at 73 ns +Display : 0 1110 0000 00000000 00101001 at 76 ns +Stimuli : 250 -6 10 -6 250 at 82 ns +Display : 125 1101 0101 11111101 01111101 at 86 ns +Display : 41 1101 0001 11111111 00101001 at 89 ns +Display : -1 1101 0000 00000000 00101001 at 92 ns +Stimuli : 249 -7 9 -7 249 at 98 ns +Display : 124 1101 0100 11111101 01111100 at 102 ns +Display : 41 1101 0001 11111111 00101001 at 105 ns +Display : -1 1101 0000 00000000 00101001 at 108 ns +Stimuli : 248 -8 8 -8 248 at 114 ns +Display : 124 1100 0100 11111100 01111100 at 118 ns +Display : 41 1100 0001 11111111 00101001 at 121 ns +Display : -1 1100 0000 00000000 00101001 at 124 ns +Stimuli : 247 7 7 -9 247 at 130 ns +Display : 123 0011 0011 11111100 01111011 at 134 ns +Display : 41 0011 0001 11111111 00101001 at 137 ns +Display : 1 0011 0000 00000000 00101001 at 140 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/main.cpp new file mode 100644 index 000000000..5285ae4aa --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/main.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "divide.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal<int> stimulus_line1; + sc_signal_bool_vector4 stimulus_line2; + sc_signal_bool_vector4 stimulus_line3; + sc_signal_bool_vector8 stimulus_line4; + sc_signal_bool_vector8 stimulus_line5; + sc_signal<bool> input_valid; + sc_signal<bool> output_valid; + sc_signal<int> result_line1; + sc_signal_bool_vector4 result_line2; + sc_signal_bool_vector4 result_line3; + sc_signal_bool_vector8 result_line4; + sc_signal_bool_vector8 result_line5; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid); + + divide divide1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/stimulus.cpp new file mode 100644 index 000000000..f4f3ffac7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/stimulus.cpp @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + int send_value1 = 254; + sc_signed send_value2(4); + sc_unsigned send_value3(4); + sc_signed send_value4(8); + sc_unsigned send_value5(8); + + + reset.write(true); + out_valid.write(false); + send_value2 = 14; + send_value3 = 14; + send_value4 = 254; + send_value5 = 254; + out_stimulus1.write(0); + out_stimulus2.write(0); + out_stimulus3.write(0); + out_stimulus4.write(0); + out_stimulus5.write(0); + wait(3); + reset.write(false); + while(true){ + wait(15); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_stimulus3.write( send_value3 ); + out_stimulus4.write( send_value4 ); + out_stimulus5.write( send_value5 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " " + << send_value3 << " " + << send_value4 << " " + << send_value5 << " " << " at " + << sc_time_stamp() << endl; + send_value1--; + send_value2 = send_value2-1; + send_value3 = send_value3-1; + send_value4 = send_value4-1; + send_value5 = send_value5-1; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/stimulus.h new file mode 100644 index 000000000..4fe06d3f2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/stimulus.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset; + sc_signal<int>& out_stimulus1; + sc_signal_bool_vector4& out_stimulus2; + sc_signal_bool_vector4& out_stimulus3; + sc_signal_bool_vector8& out_stimulus4; + sc_signal_bool_vector8& out_stimulus5; + sc_signal<bool>& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal<bool>& RESET, + sc_signal<int>& OUT_STIMULUS1, + sc_signal_bool_vector4& OUT_STIMULUS2, + sc_signal_bool_vector4& OUT_STIMULUS3, + sc_signal_bool_vector8& OUT_STIMULUS4, + sc_signal_bool_vector8& OUT_STIMULUS5, + sc_signal<bool>& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_stimulus3(OUT_STIMULUS3), + out_stimulus4(OUT_STIMULUS4), + out_stimulus5(OUT_STIMULUS5), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/common.h new file mode 100644 index 000000000..8a560ac63 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4; +typedef sc_signal<sc_bv<8> > sc_signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/display.cpp new file mode 100644 index 000000000..2a99472b8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/display.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up.
+ while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/display.h new file mode 100644 index 000000000..93a9e567b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal<int>& in_data1; // Input port + const sc_signal_bool_vector4& in_data2; // Input port + const sc_signal_bool_vector4& in_data3; // Input port + const sc_signal_bool_vector8& in_data4; // Input port + const sc_signal_bool_vector8& in_data5; // Input port + const sc_signal<bool>& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal<int>& IN_DATA1, + const sc_signal_bool_vector4& IN_DATA2, + const sc_signal_bool_vector4& IN_DATA3, + const sc_signal_bool_vector8& IN_DATA4, + const sc_signal_bool_vector8& IN_DATA5, + const sc_signal<bool>& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/golden/modulo.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/golden/modulo.log new file mode 100644 index 000000000..2fffc9ded --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/golden/modulo.log @@ -0,0 +1,35 @@ +SystemC Simulation +Stimuli : 254 -2 14 -2 254 at 18 ns +Display : 4 1110 0100 11111110 00000100 at 22 ns +Display : 1 1110 0001 11111110 00000001 at 25 ns +Display : 0 0000 0000 00000000 00000001 at 28 ns +Stimuli : 253 -3 13 -3 253 at 34 ns +Display : 3 1101 0011 11111101 00000011 at 38 ns +Display : 0 0000 0000 00000000 00000000 at 41 ns +Display : 0 0000 0000 00000000 00000000 at 44 ns +Stimuli : 252 -4 12 -4 252 at 50 ns +Display : 2 1100 0010 11111100 00000010 at 54 ns +Display : 2 1111 0010 11111111 00000010 at 57 ns +Display : -1 0000 0000 11111111 00000010 at 60 ns +Stimuli : 251 -5 11 -5 251 at 66 ns +Display : 1 0000 0001 00000000 00000001 at 70 ns +Display : 1 0000 0001 00000000 00000001 at 73 ns +Display : 0 0000 0000 00000000 00000001 at 76 ns +Stimuli : 250 -6 10 -6 250 at 82 ns +Display : 0 1111 0000 11111111 00000000 at 86 ns +Display : 0 1111 0000 11111111 00000000 at 89 ns +Display : 0 0000 0000 11111111 00000000 at 92 ns +Stimuli : 249 -7 9 -7 249 at 98 ns +Display : 4 1110 0100 11111110 00000100 at 102 ns +Display : 1 1110 0001 11111110 00000001 at 105 ns +Display : 0 0000 0000 00000000 00000001 at 108 ns +Stimuli : 248 -8 8 -8 248 at 114 ns +Display : 3 1101 0011 11111101 00000011 at 118 ns +Display : 0 0000 0000 00000000 00000000 at 121 ns +Display : 0 0000 0000 00000000 00000000 at 124 ns +Stimuli : 247 7 7 -9 247 at 130 ns +Display : 2 0010 0010 11111100 00000010 at 134 ns +Display : 2 0010 0010 11111111 00000010 at 137 ns +Display : 0 0000 0000 11111111 00000010 at 140 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/main.cpp new file mode 100644 index 000000000..db408bc47 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/main.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "modulo.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal<int> stimulus_line1; + sc_signal_bool_vector4 stimulus_line2; + sc_signal_bool_vector4 stimulus_line3; + sc_signal_bool_vector8 stimulus_line4; + sc_signal_bool_vector8 stimulus_line5; + sc_signal<bool> input_valid; + sc_signal<bool> output_valid; + sc_signal<int> result_line1; + sc_signal_bool_vector4 result_line2; + sc_signal_bool_vector4 result_line3; + sc_signal_bool_vector8 result_line4; + sc_signal_bool_vector8 result_line5; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid); + + modulo modulo1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/modulo.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/modulo.cpp new file mode 100644 index 000000000..eba16c8f4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/modulo.cpp @@ -0,0 +1,131 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + modulo.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "modulo.h" + +void modulo::entry(){ + + int tmp1; + sc_bigint<4> tmp2; + sc_biguint<4> tmp3; + sc_bigint<8> tmp4; + sc_biguint<8> tmp5; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + //execute operations + tmp1 = tmp1%5; + tmp2 = tmp2%5; + tmp3 = tmp3%5; + tmp4 = tmp4%5; + tmp5 = tmp5%5; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute self assignment operations + tmp1 %= 3; + tmp2 %= 3; + tmp3 %= 3; + tmp4 %= 3; + tmp5 %= 3; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute different type operations + if (tmp3!=0) + tmp1 = (tmp2%tmp3).to_int(); + if (tmp4!=0) + tmp2 = tmp2%tmp4; + if (tmp5!=0) + tmp3 = tmp3%tmp5; + if (tmp5!=0) + tmp4 = tmp4%tmp5; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/modulo.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/modulo.f new file mode 100644 index 000000000..444eb5b42 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/modulo.f @@ -0,0 +1,4 @@ +modulo/stimulus.cpp +modulo/display.cpp +modulo/modulo.cpp +modulo/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/modulo.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/modulo.h new file mode 100644 index 000000000..e77849c8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/modulo.h @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + modulo.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( modulo ) +{ + SC_HAS_PROCESS( modulo ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal<bool>& reset ; + const sc_signal<int>& in_value1; // Input port + const sc_signal_bool_vector4& in_value2; // Input port + const sc_signal_bool_vector4& in_value3; // Input port + const sc_signal_bool_vector8& in_value4; // Input port + const sc_signal_bool_vector8& in_value5; // Input port + const sc_signal<bool>& in_valid; // Input port + sc_signal<int>& out_value1; // Output port + sc_signal_bool_vector4& out_value2; // Output port + sc_signal_bool_vector4& out_value3; // Output port + sc_signal_bool_vector8& out_value4; // Output port + sc_signal_bool_vector8& out_value5; // Output port + sc_signal<bool>& out_valid; // Output port + + // + // Constructor + // + + modulo( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal<int>& IN_VALUE1, + const sc_signal_bool_vector4& IN_VALUE2, + const sc_signal_bool_vector4& IN_VALUE3, + const sc_signal_bool_vector8& IN_VALUE4, + const sc_signal_bool_vector8& IN_VALUE5, + const sc_signal<bool>& IN_VALID, // Input port + sc_signal<int>& OUT_VALUE1, + sc_signal_bool_vector4& OUT_VALUE2, + sc_signal_bool_vector4& OUT_VALUE3, + sc_signal_bool_vector8& OUT_VALUE4, + sc_signal_bool_vector8& OUT_VALUE5, + sc_signal<bool>& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/stimulus.cpp new file mode 100644 index 000000000..f224e9210 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/stimulus.cpp @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + int send_value1 = 254; + sc_signed send_value2(4); + sc_unsigned send_value3(4); + sc_signed send_value4(8); + sc_unsigned send_value5(8); + + + reset.write(true); + out_valid.write(false); + send_value2 = 14; + send_value3 = 14; + send_value4 = 254; + send_value5 = 254; + out_stimulus1.write(0); + out_stimulus3.write(0); + out_stimulus3.write(0); + out_stimulus4.write(0); + out_stimulus5.write(0); + wait(3); + reset.write(false); + while(true){ + wait(15); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_stimulus3.write( send_value3 ); + out_stimulus4.write( send_value4 ); + out_stimulus5.write( send_value5 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " " + << send_value3 << " " + << send_value4 << " " + << send_value5 << " " << " at " + << sc_time_stamp() << endl; + send_value1--; + send_value2 = send_value2-1; + send_value3 = send_value3-1; + send_value4 = send_value4-1; + send_value5 = send_value5-1; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/stimulus.h new file mode 100644 index 000000000..7d02a2958 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/stimulus.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset; + sc_signal<int>& out_stimulus1; + sc_signal_bool_vector4& out_stimulus2; + sc_signal_bool_vector4& out_stimulus3; + sc_signal_bool_vector8& out_stimulus4; + sc_signal_bool_vector8& out_stimulus5; + sc_signal<bool>& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal<bool>& RESET, + sc_signal<int>& OUT_STIMULUS1, + sc_signal_bool_vector4& OUT_STIMULUS2, + sc_signal_bool_vector4& OUT_STIMULUS3, + sc_signal_bool_vector8& OUT_STIMULUS4, + sc_signal_bool_vector8& OUT_STIMULUS5, + sc_signal<bool>& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_stimulus3(OUT_STIMULUS3), + out_stimulus4(OUT_STIMULUS4), + out_stimulus5(OUT_STIMULUS5), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/common.h new file mode 100644 index 000000000..8a560ac63 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4; +typedef sc_signal<sc_bv<8> > sc_signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/display.cpp new file mode 100644 index 000000000..2a99472b8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/display.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up.
+ while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/display.h new file mode 100644 index 000000000..5902ca652 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal<int>& in_data1; // Input port + const sc_signal_bool_vector4& in_data2; // Input port + const sc_signal_bool_vector4& in_data3; // Input port + const sc_signal_bool_vector8& in_data4; // Input port + const sc_signal_bool_vector8& in_data5; // Input port + const sc_signal<bool>& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal<int>& IN_DATA1, + const sc_signal_bool_vector4& IN_DATA2, + const sc_signal_bool_vector4& IN_DATA3, + const sc_signal_bool_vector8& IN_DATA4, + const sc_signal_bool_vector8& IN_DATA5, + const sc_signal<bool>& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/golden/mult.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/golden/mult.log new file mode 100644 index 000000000..7f225d536 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/golden/mult.log @@ -0,0 +1,35 @@ +SystemC Simulation +Stimuli : 0 0 0 0 0 at 18 ns +Display : 0 0000 0000 00000000 00000000 at 22 ns +Display : 0 0000 0000 00000000 00000000 at 25 ns +Display : 0 0000 0000 00000000 00000000 at 28 ns +Stimuli : 1 1 1 1 1 at 34 ns +Display : 2 0010 0010 00000010 00000010 at 38 ns +Display : 4 0100 0100 00000100 00000100 at 41 ns +Display : 16 0000 0000 00010000 01000000 at 44 ns +Stimuli : 2 2 2 2 2 at 50 ns +Display : 4 0100 0100 00000100 00000100 at 54 ns +Display : 8 1000 1000 00001000 00001000 at 57 ns +Display : -64 0000 0000 01000000 00000000 at 60 ns +Stimuli : 3 3 3 3 3 at 66 ns +Display : 6 0110 0110 00000110 00000110 at 70 ns +Display : 12 1100 1100 00001100 00001100 at 73 ns +Display : -48 0000 0000 10010000 11000000 at 76 ns +Stimuli : 4 4 4 4 4 at 82 ns +Display : 8 1000 1000 00001000 00001000 at 86 ns +Display : 16 0000 0000 00010000 00010000 at 89 ns +Display : 0 0000 0000 00000000 00000000 at 92 ns +Stimuli : 5 5 5 5 5 at 98 ns +Display : 10 1010 1010 00001010 00001010 at 102 ns +Display : 20 0100 0100 00010100 00010100 at 105 ns +Display : 16 0000 0000 10010000 01000000 at 108 ns +Stimuli : 6 6 6 6 6 at 114 ns +Display : 12 1100 1100 00001100 00001100 at 118 ns +Display : 24 1000 1000 00011000 00011000 at 121 ns +Display : -64 0000 0000 01000000 00000000 at 124 ns +Stimuli : 7 7 7 7 7 at 130 ns +Display : 14 1110 1110 00001110 00001110 at 134 ns +Display : 28 1100 1100 00011100 00011100 at 137 ns +Display : -48 0000 0000 00010000 11000000 at 140 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/main.cpp new file mode 100644 index 000000000..9ef3b5199 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/main.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "mult.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal<int> stimulus_line1; + sc_signal_bool_vector4 stimulus_line2; + sc_signal_bool_vector4 stimulus_line3; + sc_signal_bool_vector8 stimulus_line4; + sc_signal_bool_vector8 stimulus_line5; + sc_signal<bool> input_valid; + sc_signal<bool> output_valid; + sc_signal<int> result_line1; + sc_signal_bool_vector4 result_line2; + sc_signal_bool_vector4 result_line3; + sc_signal_bool_vector8 result_line4; + sc_signal_bool_vector8 result_line5; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid); + + mult mult1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/mult.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/mult.cpp new file mode 100644 index 000000000..3faec6274 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/mult.cpp @@ -0,0 +1,128 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mult.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "mult.h" + +void mult::entry(){ + + int tmp1; + sc_bigint<4> tmp2; + sc_biguint<4> tmp3; + sc_bigint<8> tmp4; + sc_biguint<8> tmp5; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + //execute simple operations + tmp1 = tmp1 * 2; + tmp2 = tmp2 * 2; + tmp3 = tmp3 * 2; + tmp4 = tmp4 * 2; + tmp5 = tmp5 * 2; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute self assigning operations + tmp1 *= 2; + tmp2 *= 2; + tmp3 *= 2; + tmp4 *= 2; + tmp5 *= 2; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute complex operations with different bit width + tmp1 = (tmp2*tmp3).to_int(); + tmp2 = tmp2*tmp4; + tmp3 = tmp3*tmp5; + tmp4 = tmp4*tmp5; + tmp5 = tmp4*tmp5; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/mult.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/mult.f new file mode 100644 index 000000000..795188df6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/mult.f @@ -0,0 +1,4 @@ +mult/stimulus.cpp +mult/display.cpp +mult/mult.cpp +mult/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/mult.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/mult.h new file mode 100644 index 000000000..d7a5d76b6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/mult.h @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mult.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( mult ) +{ + SC_HAS_PROCESS( mult ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal<bool>& reset ; + const sc_signal<int>& in_value1; // Input port + const sc_signal_bool_vector4& in_value2; // Input port + const sc_signal_bool_vector4& in_value3; // Input port + const sc_signal_bool_vector8& in_value4; // Input port + const sc_signal_bool_vector8& in_value5; // Input port + const sc_signal<bool>& in_valid; // Input port + sc_signal<int>& out_value1; // Output port + sc_signal_bool_vector4& out_value2; // Output port + sc_signal_bool_vector4& out_value3; // Output port + sc_signal_bool_vector8& out_value4; // Output port + sc_signal_bool_vector8& out_value5; // Output port + sc_signal<bool>& out_valid; // Output port + + // + // Constructor + // + + mult( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal<int>& IN_VALUE1, + const sc_signal_bool_vector4& IN_VALUE2, + const sc_signal_bool_vector4& IN_VALUE3, + const sc_signal_bool_vector8& IN_VALUE4, + const sc_signal_bool_vector8& IN_VALUE5, + const sc_signal<bool>& IN_VALID, // Input port + sc_signal<int>& OUT_VALUE1, + sc_signal_bool_vector4& OUT_VALUE2, + sc_signal_bool_vector4& OUT_VALUE3, + sc_signal_bool_vector8& OUT_VALUE4, + sc_signal_bool_vector8& OUT_VALUE5, + sc_signal<bool>& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/stimulus.cpp new file mode 100644 index 000000000..456016581 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/stimulus.cpp @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + int send_value1 = 0; + sc_signed send_value2(4); + sc_unsigned send_value3(4); + sc_signed send_value4(8); + sc_unsigned send_value5(8); + + + reset.write(true); + out_valid.write(false); + send_value2 = 0; + send_value3 = 0; + send_value4 = 0; + send_value5 = 0; + out_stimulus1.write(0); + out_stimulus2.write(0); + out_stimulus3.write(0); + out_stimulus4.write(0); + out_stimulus5.write(0); + wait(3); + reset.write(false); + while(true){ + wait(15); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_stimulus3.write( send_value3 ); + out_stimulus4.write( send_value4 ); + out_stimulus5.write( send_value5 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " " + << send_value3 << " " + << send_value4 << " " + << send_value5 << " " << " at " + << sc_time_stamp() << endl; + send_value1++; + send_value2 = send_value2+1; + send_value3 = send_value3+1; + send_value4 = send_value4+1; + send_value5 = send_value5+1; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/stimulus.h new file mode 100644 index 000000000..457d783ac --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/stimulus.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset; + sc_signal<int>& out_stimulus1; + sc_signal_bool_vector4& out_stimulus2; + sc_signal_bool_vector4& out_stimulus3; + sc_signal_bool_vector8& out_stimulus4; + sc_signal_bool_vector8& out_stimulus5; + sc_signal<bool>& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal<bool>& RESET, + sc_signal<int>& OUT_STIMULUS1, + sc_signal_bool_vector4& OUT_STIMULUS2, + sc_signal_bool_vector4& OUT_STIMULUS3, + sc_signal_bool_vector8& OUT_STIMULUS4, + sc_signal_bool_vector8& OUT_STIMULUS5, + sc_signal<bool>& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_stimulus3(OUT_STIMULUS3), + out_stimulus4(OUT_STIMULUS4), + out_stimulus5(OUT_STIMULUS5), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/bitwidth.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/bitwidth.cpp new file mode 100644 index 000000000..3dc7a1980 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/bitwidth.cpp @@ -0,0 +1,97 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + bitwidth.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-12-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "bitwidth.h" + +void bitwidth::entry(){ + + sc_biguint<2> tmp1; + sc_biguint<2> tmp1a; + sc_bigint<4> tmp2; + sc_bigint<4> tmp2a; + sc_biguint<6> tmp3; + sc_biguint<6> tmp3a; + sc_bigint<8> tmp4; + sc_bigint<8> tmp4a; + + // reset_loop + out_valid.write(false); + out_ack.write(false); + wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + + //execute simple operations + // expected bitwidth 2 2 2 + tmp1a = tmp1 - tmp1; + // expected bitwidth 2 4 4 + tmp2a = tmp2 - tmp1; + // expected bitwidth 6 2 6 + tmp3a = tmp3 - tmp1; + // expected bitwidth 4 8 8 + tmp4a = tmp4 - tmp2; + + out_ack.write(true); + wait(); + out_ack.write(false); + + // write outputs + out_value1.write(tmp1a); + out_value2.write(tmp2a); + out_value3.write(tmp3a); + out_value4.write(tmp4a); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/bitwidth.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/bitwidth.f new file mode 100644 index 000000000..53a59162e --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/bitwidth.f @@ -0,0 +1,4 @@ +bitwidth/stimulus.cpp +bitwidth/display.cpp +bitwidth/bitwidth.cpp +bitwidth/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/bitwidth.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/bitwidth.h new file mode 100644 index 000000000..e31268284 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/bitwidth.h @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + bitwidth.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( bitwidth ) +{ + SC_HAS_PROCESS( bitwidth ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal<bool>& reset ; + const sc_signal_bool_vector2& in_value1; // Input port + const sc_signal_bool_vector4& in_value2; // Input port + const sc_signal_bool_vector6& in_value3; // Input port + const sc_signal_bool_vector8& in_value4; // Input port + const sc_signal<bool>& in_valid; // Input port + sc_signal_bool_vector2& out_value1; // Output port + sc_signal_bool_vector4& out_value2; // Output port + sc_signal_bool_vector6& out_value3; // Output port + sc_signal_bool_vector8& out_value4; // Output port + sc_signal<bool>& out_ack; // Output port + sc_signal<bool>& out_valid; // Output port + + + // + // Constructor + // + + bitwidth ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal_bool_vector2& IN_VALUE1, + const sc_signal_bool_vector4& IN_VALUE2, + const sc_signal_bool_vector6& IN_VALUE3, + const sc_signal_bool_vector8& IN_VALUE4, + const sc_signal<bool>& IN_VALID, // Input port + sc_signal_bool_vector2& OUT_VALUE1, + sc_signal_bool_vector4& OUT_VALUE2, + sc_signal_bool_vector6& OUT_VALUE3, + sc_signal_bool_vector8& OUT_VALUE4, + sc_signal<bool>& OUT_ACK, + sc_signal<bool>& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_ack (OUT_ACK), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + +void entry (); + +}; + +// EOF + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/common.h new file mode 100644 index 000000000..d3b94a8f8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/common.h @@ -0,0 +1,48 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal<sc_bv<2> > sc_signal_bool_vector2; +typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4; +typedef sc_signal<sc_bv<6> > sc_signal_bool_vector6; +typedef sc_signal<sc_bv<8> > sc_signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/display.cpp new file mode 100644 index 000000000..e6d9371f1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/display.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-12-10 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry() { + + int counter = 0; + while(counter<100){ + do { wait(); } while ( in_valid == false); + cout << "Display: " << in_value1.read() << " " << in_value2.read() << " " << in_value3.read() << " " << in_value4.read() << endl; + do { wait(); } while ( in_valid == true); + counter++; + } + sc_stop(); +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/display.h new file mode 100644 index 000000000..00498390d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/display.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector2& in_value1; // Input port + const sc_signal_bool_vector4& in_value2; // Input port + const sc_signal_bool_vector6& in_value3; // Input port + const sc_signal_bool_vector8& in_value4; // Input port + const sc_signal<bool>& in_valid; // Input port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal_bool_vector2& IN_VALUE1, + const sc_signal_bool_vector4& IN_VALUE2, + const sc_signal_bool_vector6& IN_VALUE3, + const sc_signal_bool_vector8& IN_VALUE4, + const sc_signal<bool>& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/golden/bitwidth.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/golden/bitwidth.log new file mode 100644 index 000000000..26dab71e7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/golden/bitwidth.log @@ -0,0 +1,204 @@ +SystemC Simulation +Stimuli: 0 1 2 3 +Stimuli: 1 2 3 4 +Display: 00 0001 000010 00000010 +Stimuli: -2 3 4 5 +Display: 00 0001 000010 00000010 +Stimuli: -1 4 5 6 +Display: 00 0001 000010 00000010 +Stimuli: 0 5 6 7 +Display: 00 0001 000010 00000010 +Stimuli: 1 6 7 8 +Display: 00 0101 000110 00000010 +Stimuli: -2 7 8 9 +Display: 00 0101 000110 00000010 +Stimuli: -1 -8 9 10 +Display: 00 0101 000110 00000010 +Stimuli: 0 -7 10 11 +Display: 00 0101 000110 00010010 +Stimuli: 1 -6 11 12 +Display: 00 1001 001010 00010010 +Stimuli: -2 -5 12 13 +Display: 00 1001 001010 00010010 +Stimuli: -1 -4 13 14 +Display: 00 1001 001010 00010010 +Stimuli: 0 -3 14 15 +Display: 00 1001 001010 00010010 +Stimuli: 1 -2 15 16 +Display: 00 1101 001110 00010010 +Stimuli: -2 -1 16 17 +Display: 00 1101 001110 00010010 +Stimuli: -1 0 17 18 +Display: 00 1101 001110 00010010 +Stimuli: 0 1 18 19 +Display: 00 1101 001110 00010010 +Stimuli: 1 2 19 20 +Display: 00 0001 010010 00010010 +Stimuli: -2 3 20 21 +Display: 00 0001 010010 00010010 +Stimuli: -1 4 21 22 +Display: 00 0001 010010 00010010 +Stimuli: 0 5 22 23 +Display: 00 0001 010010 00010010 +Stimuli: 1 6 23 24 +Display: 00 0101 010110 00010010 +Stimuli: -2 7 24 25 +Display: 00 0101 010110 00010010 +Stimuli: -1 -8 25 26 +Display: 00 0101 010110 00010010 +Stimuli: 0 -7 26 27 +Display: 00 0101 010110 00100010 +Stimuli: 1 -6 27 28 +Display: 00 1001 011010 00100010 +Stimuli: -2 -5 28 29 +Display: 00 1001 011010 00100010 +Stimuli: -1 -4 29 30 +Display: 00 1001 011010 00100010 +Stimuli: 0 -3 30 31 +Display: 00 1001 011010 00100010 +Stimuli: 1 -2 31 32 +Display: 00 1101 011110 00100010 +Stimuli: -2 -1 -32 33 +Display: 00 1101 011110 00100010 +Stimuli: -1 0 -31 34 +Display: 00 1101 011110 00100010 +Stimuli: 0 1 -30 35 +Display: 00 1101 011110 00100010 +Stimuli: 1 2 -29 36 +Display: 00 0001 100010 00100010 +Stimuli: -2 3 -28 37 +Display: 00 0001 100010 00100010 +Stimuli: -1 4 -27 38 +Display: 00 0001 100010 00100010 +Stimuli: 0 5 -26 39 +Display: 00 0001 100010 00100010 +Stimuli: 1 6 -25 40 +Display: 00 0101 100110 00100010 +Stimuli: -2 7 -24 41 +Display: 00 0101 100110 00100010 +Stimuli: -1 -8 -23 42 +Display: 00 0101 100110 00100010 +Stimuli: 0 -7 -22 43 +Display: 00 0101 100110 00110010 +Stimuli: 1 -6 -21 44 +Display: 00 1001 101010 00110010 +Stimuli: -2 -5 -20 45 +Display: 00 1001 101010 00110010 +Stimuli: -1 -4 -19 46 +Display: 00 1001 101010 00110010 +Stimuli: 0 -3 -18 47 +Display: 00 1001 101010 00110010 +Stimuli: 1 -2 -17 48 +Display: 00 1101 101110 00110010 +Stimuli: -2 -1 -16 49 +Display: 00 1101 101110 00110010 +Stimuli: -1 0 -15 50 +Display: 00 1101 101110 00110010 +Stimuli: 0 1 -14 51 +Display: 00 1101 101110 00110010 +Stimuli: 1 2 -13 52 +Display: 00 0001 110010 00110010 +Stimuli: -2 3 -12 53 +Display: 00 0001 110010 00110010 +Stimuli: -1 4 -11 54 +Display: 00 0001 110010 00110010 +Stimuli: 0 5 -10 55 +Display: 00 0001 110010 00110010 +Stimuli: 1 6 -9 56 +Display: 00 0101 110110 00110010 +Stimuli: -2 7 -8 57 +Display: 00 0101 110110 00110010 +Stimuli: -1 -8 -7 58 +Display: 00 0101 110110 00110010 +Stimuli: 0 -7 -6 59 +Display: 00 0101 110110 01000010 +Stimuli: 1 -6 -5 60 +Display: 00 1001 111010 01000010 +Stimuli: -2 -5 -4 61 +Display: 00 1001 111010 01000010 +Stimuli: -1 -4 -3 62 +Display: 00 1001 111010 01000010 +Stimuli: 0 -3 -2 63 +Display: 00 1001 111010 01000010 +Stimuli: 1 -2 -1 64 +Display: 00 1101 111110 01000010 +Stimuli: -2 -1 0 65 +Display: 00 1101 111110 01000010 +Stimuli: -1 0 1 66 +Display: 00 1101 111110 01000010 +Stimuli: 0 1 2 67 +Display: 00 1101 111110 01000010 +Stimuli: 1 2 3 68 +Display: 00 0001 000010 01000010 +Stimuli: -2 3 4 69 +Display: 00 0001 000010 01000010 +Stimuli: -1 4 5 70 +Display: 00 0001 000010 01000010 +Stimuli: 0 5 6 71 +Display: 00 0001 000010 01000010 +Stimuli: 1 6 7 72 +Display: 00 0101 000110 01000010 +Stimuli: -2 7 8 73 +Display: 00 0101 000110 01000010 +Stimuli: -1 -8 9 74 +Display: 00 0101 000110 01000010 +Stimuli: 0 -7 10 75 +Display: 00 0101 000110 01010010 +Stimuli: 1 -6 11 76 +Display: 00 1001 001010 01010010 +Stimuli: -2 -5 12 77 +Display: 00 1001 001010 01010010 +Stimuli: -1 -4 13 78 +Display: 00 1001 001010 01010010 +Stimuli: 0 -3 14 79 +Display: 00 1001 001010 01010010 +Stimuli: 1 -2 15 80 +Display: 00 1101 001110 01010010 +Stimuli: -2 -1 16 81 +Display: 00 1101 001110 01010010 +Stimuli: -1 0 17 82 +Display: 00 1101 001110 01010010 +Stimuli: 0 1 18 83 +Display: 00 1101 001110 01010010 +Stimuli: 1 2 19 84 +Display: 00 0001 010010 01010010 +Stimuli: -2 3 20 85 +Display: 00 0001 010010 01010010 +Stimuli: -1 4 21 86 +Display: 00 0001 010010 01010010 +Stimuli: 0 5 22 87 +Display: 00 0001 010010 01010010 +Stimuli: 1 6 23 88 +Display: 00 0101 010110 01010010 +Stimuli: -2 7 24 89 +Display: 00 0101 010110 01010010 +Stimuli: -1 -8 25 90 +Display: 00 0101 010110 01010010 +Stimuli: 0 -7 26 91 +Display: 00 0101 010110 01100010 +Stimuli: 1 -6 27 92 +Display: 00 1001 011010 01100010 +Stimuli: -2 -5 28 93 +Display: 00 1001 011010 01100010 +Stimuli: -1 -4 29 94 +Display: 00 1001 011010 01100010 +Stimuli: 0 -3 30 95 +Display: 00 1001 011010 01100010 +Stimuli: 1 -2 31 96 +Display: 00 1101 011110 01100010 +Stimuli: -2 -1 -32 97 +Display: 00 1101 011110 01100010 +Stimuli: -1 0 -31 98 +Display: 00 1101 011110 01100010 +Stimuli: 0 1 -30 99 +Display: 00 1101 011110 01100010 +Stimuli: 1 2 -29 100 +Display: 00 0001 100010 01100010 +Stimuli: -2 3 -28 101 +Display: 00 0001 100010 01100010 +Stimuli: -1 4 -27 102 +Display: 00 0001 100010 01100010 +Stimuli: 0 5 -26 103 +Display: 00 0001 100010 01100010 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/main.cpp new file mode 100644 index 000000000..61341a228 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/main.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "bitwidth.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal_bool_vector2 stimulus_line1; + sc_signal_bool_vector4 stimulus_line2; + sc_signal_bool_vector6 stimulus_line3; + sc_signal_bool_vector8 stimulus_line4; + sc_signal<bool> input_valid; + sc_signal<bool> ack; + sc_signal<bool> output_valid; + sc_signal_bool_vector2 result_line1; + sc_signal_bool_vector4 result_line2; + sc_signal_bool_vector6 result_line3; + sc_signal_bool_vector8 result_line4; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + input_valid, + ack); + + bitwidth bitwidth1( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + ack, + output_valid); + + display display1( "display_block", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/stimulus.cpp new file mode 100644 index 000000000..4ce6064b4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/stimulus.cpp @@ -0,0 +1,73 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + reset.write(true); + wait(); + reset.write(false); + + sc_signed tmp1(2); + sc_signed tmp2(4); + sc_signed tmp3(6); + sc_signed tmp4(8); + + tmp1 = "0b00"; + tmp2 = "0b0001"; + tmp3 = "0b000010"; + tmp4 = "0b00000011"; + + while(true){ + out_valid.write(true); + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + cout << "Stimuli: "<< tmp1 << " " << tmp2 << " " << tmp3 << " " << tmp4 << endl; + tmp1 = tmp1 + 1; + tmp2 = tmp2 + 1; + tmp3 = tmp3 + 1; + tmp4 = tmp4 + 1; + do { wait(); } while (in_ack==false); + out_valid.write(false); + wait(); + } +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/stimulus.h new file mode 100644 index 000000000..0fa07858c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/stimulus.h @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset ; + sc_signal_bool_vector2& out_value1; // Output port + sc_signal_bool_vector4& out_value2; // Output port + sc_signal_bool_vector6& out_value3; // Output port + sc_signal_bool_vector8& out_value4; // Output port + sc_signal<bool>& out_valid; // Output port + const sc_signal<bool>& in_ack; + + // + // Constructor + // + + stimulus( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + sc_signal<bool>& RESET, + sc_signal_bool_vector2& OUT_VALUE1, + sc_signal_bool_vector4& OUT_VALUE2, + sc_signal_bool_vector6& OUT_VALUE3, + sc_signal_bool_vector8& OUT_VALUE4, + sc_signal<bool>& OUT_VALID, + const sc_signal<bool>& IN_ACK + ) + : + reset (RESET), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_valid (OUT_VALID), + in_ack (IN_ACK) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + void entry(); +}; +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/common.h new file mode 100644 index 000000000..1af56c523 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal<sc_bv<8> > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/datatypes.cpp new file mode 100644 index 000000000..d3e2cd1e1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/datatypes.cpp @@ -0,0 +1,119 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "datatypes.h" + +void datatypes::entry() + +{ + + sc_bigint<8> tmp1; + sc_bigint<8> tmp1r; + sc_biguint<8> tmp2; + sc_biguint<8> tmp2r; + long tmp3; + long tmp3r; + int tmp4; + int tmp4r; + short tmp5; + short tmp5r; + char tmp6; + char tmp6r; + +// define 1 dimensional array + int tmp7[2]; + char tmp8[2]; + +// reset_loop + if (reset.read() == true) { + out_valid.write(false); + out_ack.write(false); + wait(); + } else wait(); + +// +// main loop +// + +// initialization of sc_array + + tmp7[0] = 3; + tmp7[1] = 12; + tmp8[0] = 'R'; + tmp8[1] = 'G'; + + + while(1) { + while(in_valid.read()==false) wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + tmp6 = in_value6.read(); + + out_ack.write(true); + + //execute mixed data type subtraction operations + tmp1r = tmp1 - tmp2; + tmp2r = tmp6 - tmp1; + tmp3r = tmp4 - tmp6; + tmp4r = --tmp5; + tmp4r -= 1; + tmp5r = tmp6 - tmp4; + tmp6r = tmp8[0] - tmp7[1]; + + //write outputs + out_value1.write(tmp1r); + out_value2.write(tmp2r); + out_value3.write(tmp3r); + out_value4.write(tmp4r); + out_value5.write(tmp5r); + out_value6.write(tmp6r); + + out_valid.write(true); + wait(); + out_ack.write(false); + out_valid.write(false); + + } + +} // End + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/datatypes.f new file mode 100644 index 000000000..64f4c05f1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/datatypes.f @@ -0,0 +1,4 @@ +datatypes/stimulus.cpp +datatypes/display.cpp +datatypes/datatypes.cpp +datatypes/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/datatypes.h new file mode 100644 index 000000000..b7e6f7a00 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/datatypes.h @@ -0,0 +1,126 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( datatypes ) +{ + SC_HAS_PROCESS( datatypes ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal<bool>& reset ; + const sc_signal_bool_vector& in_value1; // Input port + const sc_signal_bool_vector& in_value2; // Input port + const sc_signal<long>& in_value3; // Input port + const sc_signal<int>& in_value4; // Input port + const sc_signal<short>& in_value5; // Input port + const sc_signal<char>& in_value6; // Input port + const sc_signal<bool>& in_valid; // Input port + sc_signal<bool>& out_ack; // Output port + sc_signal_bool_vector& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal<long>& out_value3; // Output port + sc_signal<int>& out_value4; // Output port + sc_signal<short>& out_value5; // Output port + sc_signal<char>& out_value6; // Output port + sc_signal<bool>& out_valid; // Output port + + // + // Constructor + // + + datatypes( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal<long>& IN_VALUE3, + const sc_signal<int>& IN_VALUE4, + const sc_signal<short>& IN_VALUE5, + const sc_signal<char>& IN_VALUE6, + const sc_signal<bool>& IN_VALID, + + sc_signal<bool>& OUT_ACK, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal<long>& OUT_VALUE3, + sc_signal<int>& OUT_VALUE4, + sc_signal<short>& OUT_VALUE5, + sc_signal<char>& OUT_VALUE6, + sc_signal<bool>& OUT_VALID + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_valid (IN_VALID), + out_ack (OUT_ACK), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + +//Process Functionality: Described in the member function below + void entry(); +}; + +// EOF + + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/display.cpp new file mode 100644 index 000000000..a8037ef4f --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/display.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry() { + + int counter = 0; + while(counter++<100){ + do { wait(); } while ( in_valid == false); + cout << "Display: " << in_value1.read() << " " << in_value2.read() << " " << in_value3.read() << " " << in_value4.read() << " " << in_value5.read() << " " << in_value6.read() << endl; + do { wait(); } while ( in_valid == true); + } + sc_stop(); +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/display.h new file mode 100644 index 000000000..2e1149286 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/display.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_value1; // Output port + const sc_signal_bool_vector& in_value2; // Output port + const sc_signal<long>& in_value3; // Output port + const sc_signal<int>& in_value4; // Output port + const sc_signal<short>& in_value5; // Output port + const sc_signal<char>& in_value6; // Output port + const sc_signal<bool>& in_valid; // Output port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal<long>& IN_VALUE3, + const sc_signal<int>& IN_VALUE4, + const sc_signal<short>& IN_VALUE5, + const sc_signal<char>& IN_VALUE6, + const sc_signal<bool>& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/golden/datatypes.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/golden/datatypes.log new file mode 100644 index 000000000..afdff5743 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/golden/datatypes.log @@ -0,0 +1,204 @@ +SystemC Simulation +Stimuli: 0 1 12345678 -123456 20000 +Display: 11111111 01010010 -123538 19998 -7534 F +Stimuli: 1 3 12345683 -123453 20006 +Display: 11111110 01010101 -123539 20004 -7533 F +Stimuli: 2 5 12345688 -123450 20012 +Display: 11111101 01011000 -123540 20010 -7532 F +Stimuli: 3 7 12345693 -123447 20018 +Display: 11111100 01011011 -123541 20016 -7531 F +Stimuli: 4 9 12345698 -123444 20024 +Display: 11111011 01011110 -123542 20022 -7530 F +Stimuli: 5 11 12345703 -123441 20030 +Display: 11111010 01100001 -123543 20028 -7529 F +Stimuli: 6 13 12345708 -123438 20036 +Display: 11111001 01100100 -123544 20034 -7528 F +Stimuli: 7 15 12345713 -123435 20042 +Display: 11111000 01100111 -123545 20040 -7527 F +Stimuli: 8 17 12345718 -123432 20048 +Display: 11110111 01101010 -123546 20046 -7526 F +Stimuli: 9 19 12345723 -123429 20054 +Display: 11110110 01101101 -123547 20052 -7525 F +Stimuli: 10 21 12345728 -123426 20060 +Display: 11110101 01110000 -123548 20058 -7524 F +Stimuli: 11 23 12345733 -123423 20066 +Display: 11110100 01110011 -123549 20064 -7523 F +Stimuli: 12 25 12345738 -123420 20072 +Display: 11110011 01110110 -123294 20070 -7778 F +Stimuli: 13 27 12345743 -123417 20078 +Display: 11110010 01111001 -123295 20076 -7777 F +Stimuli: 14 29 12345748 -123414 20084 +Display: 11110001 01111100 -123296 20082 -7776 F +Stimuli: 15 31 12345753 -123411 20090 +Display: 11110000 01111111 -123297 20088 -7775 F +Stimuli: 16 33 12345758 -123408 20096 +Display: 11101111 10000010 -123298 20094 -7774 F +Stimuli: 17 35 12345763 -123405 20102 +Display: 11101110 10000101 -123299 20100 -7773 F +Stimuli: 18 37 12345768 -123402 20108 +Display: 11101101 10001000 -123300 20106 -7772 F +Stimuli: 19 39 12345773 -123399 20114 +Display: 11101100 10001011 -123301 20112 -7771 F +Stimuli: 20 41 12345778 -123396 20120 +Display: 11101011 10001110 -123302 20118 -7770 F +Stimuli: 21 43 12345783 -123393 20126 +Display: 11101010 10010001 -123303 20124 -7769 F +Stimuli: 22 45 12345788 -123390 20132 +Display: 11101001 10010100 -123304 20130 -7768 F +Stimuli: 23 47 12345793 -123387 20138 +Display: 11101000 10010111 -123305 20136 -7767 F +Stimuli: 24 49 12345798 -123384 20144 +Display: 11100111 10011010 -123306 20142 -7766 F +Stimuli: 25 51 12345803 -123381 20150 +Display: 11100110 10011101 -123307 20148 -7765 F +Stimuli: 26 53 12345808 -123378 20156 +Display: 11100101 10100000 -123308 20154 -7764 F +Stimuli: 27 55 12345813 -123375 20162 +Display: 11100100 10100011 -123309 20160 -7763 F +Stimuli: 28 57 12345818 -123372 20168 +Display: 11100011 10100110 -123310 20166 -7762 F +Stimuli: 29 59 12345823 -123369 20174 +Display: 11100010 10101001 -123311 20172 -7761 F +Stimuli: 30 61 12345828 -123366 20180 +Display: 11100001 10101100 -123312 20178 -7760 F +Stimuli: 31 63 12345833 -123363 20186 +Display: 11100000 10101111 -123313 20184 -7759 F +Stimuli: 32 65 12345838 -123360 20192 +Display: 11011111 10110010 -123314 20190 -7758 F +Stimuli: 33 67 12345843 -123357 20198 +Display: 11011110 10110101 -123315 20196 -7757 F +Stimuli: 34 69 12345848 -123354 20204 +Display: 11011101 10111000 -123316 20202 -7756 F +Stimuli: 35 71 12345853 -123351 20210 +Display: 11011100 10111011 -123317 20208 -7755 F +Stimuli: 36 73 12345858 -123348 20216 +Display: 11011011 10111110 -123318 20214 -7754 F +Stimuli: 37 75 12345863 -123345 20222 +Display: 11011010 11000001 -123319 20220 -7753 F +Stimuli: 38 77 12345868 -123342 20228 +Display: 11011001 11000100 -123320 20226 -7752 F +Stimuli: 39 79 12345873 -123339 20234 +Display: 11011000 11000111 -123321 20232 -7751 F +Stimuli: 40 81 12345878 -123336 20240 +Display: 11010111 11001010 -123322 20238 -7750 F +Stimuli: 41 83 12345883 -123333 20246 +Display: 11010110 11001101 -123323 20244 -7749 F +Stimuli: 42 85 12345888 -123330 20252 +Display: 11010101 11010000 -123324 20250 -7748 F +Stimuli: 43 87 12345893 -123327 20258 +Display: 11010100 11010011 -123325 20256 -7747 F +Stimuli: 44 89 12345898 -123324 20264 +Display: 11010011 11010110 -123326 20262 -7746 F +Stimuli: 45 91 12345903 -123321 20270 +Display: 11010010 11011001 -123327 20268 -7745 F +Stimuli: 46 93 12345908 -123318 20276 +Display: 11010001 11011100 -123328 20274 -7744 F +Stimuli: 47 95 12345913 -123315 20282 +Display: 11010000 11011111 -123329 20280 -7743 F +Stimuli: 48 97 12345918 -123312 20288 +Display: 11001111 11100010 -123330 20286 -7742 F +Stimuli: 49 99 12345923 -123309 20294 +Display: 11001110 11100101 -123331 20292 -7741 F +Stimuli: 50 101 12345928 -123306 20300 +Display: 11001101 11101000 -123332 20298 -7740 F +Stimuli: 51 103 12345933 -123303 20306 +Display: 11001100 11101011 -123333 20304 -7739 F +Stimuli: 52 105 12345938 -123300 20312 +Display: 11001011 11101110 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b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/main.cpp new file mode 100644 index 000000000..baafeba5d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/main.cpp @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "datatypes.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal_bool_vector stimulus_line1; + sc_signal_bool_vector stimulus_line2; + sc_signal<long> stimulus_line3; + sc_signal<int> stimulus_line4; + sc_signal<short> stimulus_line5; + sc_signal<char> stimulus_line6; + sc_signal<bool> input_valid; + sc_signal<bool> ack; + sc_signal<bool> output_valid; + sc_signal_bool_vector result_line1; + sc_signal_bool_vector result_line2; + sc_signal<long> result_line3; + sc_signal<int> result_line4; + sc_signal<short> result_line5; + sc_signal<char> result_line6; + + output_valid = 0; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + input_valid, + ack); + + datatypes datatypes1( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + input_valid, + ack, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + display display1( "display_block", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/stimulus.cpp new file mode 100644 index 000000000..ebcfe7bf0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/stimulus.cpp @@ -0,0 +1,82 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + reset.write(true); + wait(); + reset.write(false); + + sc_signed tmp1(8); + sc_signed tmp2(8); + long tmp3; + int tmp4; + short tmp5; + char tmp6; + + tmp1 = "00000000"; + tmp2 = "00000001"; + tmp3 = 12345678; + tmp4 = -123456; + tmp5 = 20000; + tmp6 = 'R'; + + + while(true){ + out_valid.write(true); + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_value6.write(tmp6); + cout << "Stimuli: " << tmp1 << " " << tmp2 << " " << tmp3 << " " << tmp4 << " " << tmp5 << endl; + tmp1 = tmp1 + 1; + tmp2 = tmp2 + 2; + tmp3 = tmp3 + 5; + tmp4 = tmp4 + 3; + tmp5 = tmp5 + 6; + tmp6 = tmp6 + 4; + do { wait(); } while (in_ack==false); + out_valid.write(false); + wait(); + } +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/stimulus.h new file mode 100644 index 000000000..cf0a3e621 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/stimulus.h @@ -0,0 +1,90 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset; + sc_signal_bool_vector& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal<long>& out_value3; // Output port + sc_signal<int>& out_value4; // Output port + sc_signal<short>& out_value5; // Output port + sc_signal<char>& out_value6; // Output port + sc_signal<bool>& out_valid; // Output port + const sc_signal<bool>& in_ack; + + // + // Constructor + // + + stimulus( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + sc_signal<bool>& RESET, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal<long>& OUT_VALUE3, + sc_signal<int>& OUT_VALUE4, + sc_signal<short>& OUT_VALUE5, + sc_signal<char>& OUT_VALUE6, + sc_signal<bool>& OUT_VALID, + const sc_signal<bool>& IN_ACK + ) + : + reset (RESET), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_valid (OUT_VALID), + in_ack (IN_ACK) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + void entry(); +}; +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal<sc_bv<4> > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/decrement.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/decrement.cpp new file mode 100644 index 000000000..86f654680 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/decrement.cpp @@ -0,0 +1,92 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + decrement.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "decrement.h" + +void decrement::entry(){ + + #define ONE 1 + const int eins = 1; + int tmp1; + sc_bigint<4> tmp2; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + out_ack.write(false); + wait(); + } else wait(); + + // + // main loop + // + + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + + //execute simple operations + tmp1 = tmp1 - 1; + tmp1 = tmp1 - ONE; + tmp1 = tmp1 - eins; + tmp1--; + tmp2 = tmp2 - 1; + tmp2 = tmp2 - ONE; + tmp2 = tmp2 - eins; + tmp2--; + + out_ack.write(true); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + + out_valid.write(true); + wait(); + out_ack.write(false); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/decrement.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/decrement.f new file mode 100644 index 000000000..894de102e --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/decrement.f @@ -0,0 +1,4 @@ +decrement/stimulus.cpp +decrement/display.cpp +decrement/decrement.cpp +decrement/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/decrement.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/decrement.h new file mode 100644 index 000000000..cf19214a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/decrement.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + decrement.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( decrement ) +{ + SC_HAS_PROCESS( decrement ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal<bool>& reset ; + const sc_signal<int>& in_value1; // Input port + const sc_signal_bool_vector& in_value2; // Input port + const sc_signal<bool>& in_valid; // Input port + sc_signal<bool>& out_ack; // Output port + sc_signal<int>& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal<bool>& out_valid; // Output port + + // + // Constructor + // + + decrement ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal<int>& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal<bool>& IN_VALID, // Input port + sc_signal<bool>& OUT_ACK, + sc_signal<int>& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal<bool>& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_valid (IN_VALID), + out_ack (OUT_ACK), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/display.cpp new file mode 100644 index 000000000..c1192ec7b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/display.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry() { + + int counter = 0; + + while(counter++<100){ + do { wait(); } while ( in_valid == false); + cout << "Display: " << in_value1.read() << " " << in_value2.read() << endl; + do { wait(); } while ( in_valid == true); + } + sc_stop(); +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/display.h new file mode 100644 index 000000000..80f2aa3cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/display.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal<int>& in_value1; // Input port + const sc_signal_bool_vector& in_value2; // Input port + const sc_signal<bool>& in_valid; // Input port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal<int>& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal<bool>& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/golden/decrement.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/golden/decrement.log new file mode 100644 index 000000000..10fc11b2e --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/golden/decrement.log @@ -0,0 +1,204 @@ +SystemC Simulation +Stimuli: 0 1 +Display: -4 1101 +Stimuli: 1 2 +Display: -3 1110 +Stimuli: 2 3 +Display: -2 1111 +Stimuli: 3 4 +Display: -1 0000 +Stimuli: 4 5 +Display: 0 0001 +Stimuli: 5 6 +Display: 1 0010 +Stimuli: 6 7 +Display: 2 0011 +Stimuli: 7 -8 +Display: 3 0100 +Stimuli: 8 -7 +Display: 4 0101 +Stimuli: 9 -6 +Display: 5 0110 +Stimuli: 10 -5 +Display: 6 0111 +Stimuli: 11 -4 +Display: 7 1000 +Stimuli: 12 -3 +Display: 8 1001 +Stimuli: 13 -2 +Display: 9 1010 +Stimuli: 14 -1 +Display: 10 1011 +Stimuli: 15 0 +Display: 11 1100 +Stimuli: 16 1 +Display: 12 1101 +Stimuli: 17 2 +Display: 13 1110 +Stimuli: 18 3 +Display: 14 1111 +Stimuli: 19 4 +Display: 15 0000 +Stimuli: 20 5 +Display: 16 0001 +Stimuli: 21 6 +Display: 17 0010 +Stimuli: 22 7 +Display: 18 0011 +Stimuli: 23 -8 +Display: 19 0100 +Stimuli: 24 -7 +Display: 20 0101 +Stimuli: 25 -6 +Display: 21 0110 +Stimuli: 26 -5 +Display: 22 0111 +Stimuli: 27 -4 +Display: 23 1000 +Stimuli: 28 -3 +Display: 24 1001 +Stimuli: 29 -2 +Display: 25 1010 +Stimuli: 30 -1 +Display: 26 1011 +Stimuli: 31 0 +Display: 27 1100 +Stimuli: 32 1 +Display: 28 1101 +Stimuli: 33 2 +Display: 29 1110 +Stimuli: 34 3 +Display: 30 1111 +Stimuli: 35 4 +Display: 31 0000 +Stimuli: 36 5 +Display: 32 0001 +Stimuli: 37 6 +Display: 33 0010 +Stimuli: 38 7 +Display: 34 0011 +Stimuli: 39 -8 +Display: 35 0100 +Stimuli: 40 -7 +Display: 36 0101 +Stimuli: 41 -6 +Display: 37 0110 +Stimuli: 42 -5 +Display: 38 0111 +Stimuli: 43 -4 +Display: 39 1000 +Stimuli: 44 -3 +Display: 40 1001 +Stimuli: 45 -2 +Display: 41 1010 +Stimuli: 46 -1 +Display: 42 1011 +Stimuli: 47 0 +Display: 43 1100 +Stimuli: 48 1 +Display: 44 1101 +Stimuli: 49 2 +Display: 45 1110 +Stimuli: 50 3 +Display: 46 1111 +Stimuli: 51 4 +Display: 47 0000 +Stimuli: 52 5 +Display: 48 0001 +Stimuli: 53 6 +Display: 49 0010 +Stimuli: 54 7 +Display: 50 0011 +Stimuli: 55 -8 +Display: 51 0100 +Stimuli: 56 -7 +Display: 52 0101 +Stimuli: 57 -6 +Display: 53 0110 +Stimuli: 58 -5 +Display: 54 0111 +Stimuli: 59 -4 +Display: 55 1000 +Stimuli: 60 -3 +Display: 56 1001 +Stimuli: 61 -2 +Display: 57 1010 +Stimuli: 62 -1 +Display: 58 1011 +Stimuli: 63 0 +Display: 59 1100 +Stimuli: 64 1 +Display: 60 1101 +Stimuli: 65 2 +Display: 61 1110 +Stimuli: 66 3 +Display: 62 1111 +Stimuli: 67 4 +Display: 63 0000 +Stimuli: 68 5 +Display: 64 0001 +Stimuli: 69 6 +Display: 65 0010 +Stimuli: 70 7 +Display: 66 0011 +Stimuli: 71 -8 +Display: 67 0100 +Stimuli: 72 -7 +Display: 68 0101 +Stimuli: 73 -6 +Display: 69 0110 +Stimuli: 74 -5 +Display: 70 0111 +Stimuli: 75 -4 +Display: 71 1000 +Stimuli: 76 -3 +Display: 72 1001 +Stimuli: 77 -2 +Display: 73 1010 +Stimuli: 78 -1 +Display: 74 1011 +Stimuli: 79 0 +Display: 75 1100 +Stimuli: 80 1 +Display: 76 1101 +Stimuli: 81 2 +Display: 77 1110 +Stimuli: 82 3 +Display: 78 1111 +Stimuli: 83 4 +Display: 79 0000 +Stimuli: 84 5 +Display: 80 0001 +Stimuli: 85 6 +Display: 81 0010 +Stimuli: 86 7 +Display: 82 0011 +Stimuli: 87 -8 +Display: 83 0100 +Stimuli: 88 -7 +Display: 84 0101 +Stimuli: 89 -6 +Display: 85 0110 +Stimuli: 90 -5 +Display: 86 0111 +Stimuli: 91 -4 +Display: 87 1000 +Stimuli: 92 -3 +Display: 88 1001 +Stimuli: 93 -2 +Display: 89 1010 +Stimuli: 94 -1 +Display: 90 1011 +Stimuli: 95 0 +Display: 91 1100 +Stimuli: 96 1 +Display: 92 1101 +Stimuli: 97 2 +Display: 93 1110 +Stimuli: 98 3 +Display: 94 1111 +Stimuli: 99 4 +Display: 95 0000 +Stimuli: 100 5 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/main.cpp new file mode 100644 index 000000000..89e3a7295 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/main.cpp @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "decrement.h" + +int sc_main(int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal<int> stimulus_line1; + sc_signal_bool_vector stimulus_line2; + sc_signal<bool> input_valid; + sc_signal<bool> ack; + sc_signal<bool> output_valid; + sc_signal<int> result_line1; + sc_signal_bool_vector result_line2; + + // initialization to fix regressions - ali + output_valid = false; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + input_valid, + ack); + + decrement decrement1( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + input_valid, + ack, + result_line1, + result_line2, + output_valid); + + display display1( "display_block", + clock, + result_line1, + result_line2, + output_valid); + + sc_start(); + + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/stimulus.cpp new file mode 100644 index 000000000..924a46e69 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/stimulus.cpp @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + reset.write(true); + wait(); + reset.write(false); + + int tmp1; + sc_signed tmp2(4); + + tmp1 = 0; + tmp2 = "0001"; + + + while(true){ + out_valid.write(true); + out_value1.write(tmp1); + out_value2.write(tmp2); + cout << "Stimuli: " << tmp1 << " " << tmp2 << endl; + tmp1 = tmp1 + 1; + tmp2 = tmp2 + 1; + do { wait(); } while (in_ack==false); + out_valid.write(false); + wait(); + } +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/stimulus.h new file mode 100644 index 000000000..92e32db22 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/stimulus.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset ; + sc_signal<int>& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal<bool>& out_valid; // Output port + const sc_signal<bool>& in_ack; + + // + // Constructor + // + + stimulus( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + sc_signal<bool>& RESET, + sc_signal<int>& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal<bool>& OUT_VALID, + const sc_signal<bool>& IN_ACK + ) + : + reset (RESET), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_valid (OUT_VALID), + in_ack (IN_ACK) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + void entry(); +}; +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/common.h new file mode 100644 index 000000000..60baad076 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/common.h @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4; +typedef sc_signal<sc_bv<5> > sc_signal_bool_vector5; +typedef sc_signal<sc_bv<6> > sc_signal_bool_vector6; +typedef sc_signal<sc_bv<7> > sc_signal_bool_vector7; +typedef sc_signal<sc_bv<8> > sc_signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/display.cpp new file mode 100644 index 000000000..47832f313 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/display.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry() { + + int counter = 0; + while(counter++<100){ + do { wait(); } while ( in_valid == false); + cout << "Display: " << in_value1.read() << " " << in_value2.read() << " " << in_value3.read() << " " << in_value4.read() << " " << in_value5.read() << endl; + do { wait(); } while ( in_valid == true); + } + wait(); + sc_stop(); +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/display.h new file mode 100644 index 000000000..377dd8cbd --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/display.h @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector4& in_value1; // Output port + const sc_signal_bool_vector5& in_value2; // Output port + const sc_signal_bool_vector6& in_value3; // Output port + const sc_signal_bool_vector7& in_value4; // Output port + const sc_signal_bool_vector8& in_value5; // Output port + const sc_signal<bool>& in_valid; // Output port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal_bool_vector4& IN_VALUE1, + const sc_signal_bool_vector5& IN_VALUE2, + const sc_signal_bool_vector6& IN_VALUE3, + const sc_signal_bool_vector7& IN_VALUE4, + const sc_signal_bool_vector8& IN_VALUE5, + const sc_signal<bool>& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/golden/sharing.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/golden/sharing.log new file mode 100644 index 000000000..1789b5327 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/golden/sharing.log @@ -0,0 +1,204 @@ +SystemC Simulation +Stimuli: 0 1 2 3 4 +Display: 1100 11101 111110 0000001 00000010 +Stimuli: 1 2 3 4 5 +Display: 1101 11110 111111 0000010 00000011 +Stimuli: 2 3 4 5 6 +Display: 1110 11111 000000 0000011 00000100 +Stimuli: 3 4 5 6 7 +Display: 1111 00000 000001 0000100 00000101 +Stimuli: 4 5 6 7 8 +Display: 0000 00001 000010 0000101 00000110 +Stimuli: 5 6 7 8 9 +Display: 0001 00010 000011 0000110 00000111 +Stimuli: 6 7 8 9 10 +Display: 0010 00011 000100 0000111 00001000 +Stimuli: 7 8 9 10 11 +Display: 0011 00100 000101 0001000 00001001 +Stimuli: -8 9 10 11 12 +Display: 0100 00101 000110 0001001 00001010 +Stimuli: -7 10 11 12 13 +Display: 0101 00110 000111 0001010 00001011 +Stimuli: -6 11 12 13 14 +Display: 0110 00111 001000 0001011 00001100 +Stimuli: -5 12 13 14 15 +Display: 0111 01000 001001 0001100 00001101 +Stimuli: -4 13 14 15 16 +Display: 1000 01001 001010 0001101 00001110 +Stimuli: -3 14 15 16 17 +Display: 1001 01010 001011 0001110 00001111 +Stimuli: -2 15 16 17 18 +Display: 1010 01011 001100 0001111 00010000 +Stimuli: -1 -16 17 18 19 +Display: 1011 01100 001101 0010000 00010001 +Stimuli: 0 -15 18 19 20 +Display: 1100 01101 001110 0010001 00010010 +Stimuli: 1 -14 19 20 21 +Display: 1101 01110 001111 0010010 00010011 +Stimuli: 2 -13 20 21 22 +Display: 1110 01111 010000 0010011 00010100 +Stimuli: 3 -12 21 22 23 +Display: 1111 10000 010001 0010100 00010101 +Stimuli: 4 -11 22 23 24 +Display: 0000 10001 010010 0010101 00010110 +Stimuli: 5 -10 23 24 25 +Display: 0001 10010 010011 0010110 00010111 +Stimuli: 6 -9 24 25 26 +Display: 0010 10011 010100 0010111 00011000 +Stimuli: 7 -8 25 26 27 +Display: 0011 10100 010101 0011000 00011001 +Stimuli: -8 -7 26 27 28 +Display: 0100 10101 010110 0011001 00011010 +Stimuli: -7 -6 27 28 29 +Display: 0101 10110 010111 0011010 00011011 +Stimuli: -6 -5 28 29 30 +Display: 0110 10111 011000 0011011 00011100 +Stimuli: -5 -4 29 30 31 +Display: 0111 11000 011001 0011100 00011101 +Stimuli: -4 -3 30 31 32 +Display: 1000 11001 011010 0011101 00011110 +Stimuli: -3 -2 31 32 33 +Display: 1001 11010 011011 0011110 00011111 +Stimuli: -2 -1 -32 33 34 +Display: 1010 11011 011100 0011111 00100000 +Stimuli: -1 0 -31 34 35 +Display: 1011 11100 011101 0100000 00100001 +Stimuli: 0 1 -30 35 36 +Display: 1100 11101 011110 0100001 00100010 +Stimuli: 1 2 -29 36 37 +Display: 1101 11110 011111 0100010 00100011 +Stimuli: 2 3 -28 37 38 +Display: 1110 11111 100000 0100011 00100100 +Stimuli: 3 4 -27 38 39 +Display: 1111 00000 100001 0100100 00100101 +Stimuli: 4 5 -26 39 40 +Display: 0000 00001 100010 0100101 00100110 +Stimuli: 5 6 -25 40 41 +Display: 0001 00010 100011 0100110 00100111 +Stimuli: 6 7 -24 41 42 +Display: 0010 00011 100100 0100111 00101000 +Stimuli: 7 8 -23 42 43 +Display: 0011 00100 100101 0101000 00101001 +Stimuli: -8 9 -22 43 44 +Display: 0100 00101 100110 0101001 00101010 +Stimuli: -7 10 -21 44 45 +Display: 0101 00110 100111 0101010 00101011 +Stimuli: -6 11 -20 45 46 +Display: 0110 00111 101000 0101011 00101100 +Stimuli: -5 12 -19 46 47 +Display: 0111 01000 101001 0101100 00101101 +Stimuli: -4 13 -18 47 48 +Display: 1000 01001 101010 0101101 00101110 +Stimuli: -3 14 -17 48 49 +Display: 1001 01010 101011 0101110 00101111 +Stimuli: -2 15 -16 49 50 +Display: 1010 01011 101100 0101111 00110000 +Stimuli: -1 -16 -15 50 51 +Display: 1011 01100 101101 0110000 00110001 +Stimuli: 0 -15 -14 51 52 +Display: 1100 01101 101110 0110001 00110010 +Stimuli: 1 -14 -13 52 53 +Display: 1101 01110 101111 0110010 00110011 +Stimuli: 2 -13 -12 53 54 +Display: 1110 01111 110000 0110011 00110100 +Stimuli: 3 -12 -11 54 55 +Display: 1111 10000 110001 0110100 00110101 +Stimuli: 4 -11 -10 55 56 +Display: 0000 10001 110010 0110101 00110110 +Stimuli: 5 -10 -9 56 57 +Display: 0001 10010 110011 0110110 00110111 +Stimuli: 6 -9 -8 57 58 +Display: 0010 10011 110100 0110111 00111000 +Stimuli: 7 -8 -7 58 59 +Display: 0011 10100 110101 0111000 00111001 +Stimuli: -8 -7 -6 59 60 +Display: 0100 10101 110110 0111001 00111010 +Stimuli: -7 -6 -5 60 61 +Display: 0101 10110 110111 0111010 00111011 +Stimuli: -6 -5 -4 61 62 +Display: 0110 10111 111000 0111011 00111100 +Stimuli: -5 -4 -3 62 63 +Display: 0111 11000 111001 0111100 00111101 +Stimuli: -4 -3 -2 63 64 +Display: 1000 11001 111010 0111101 00111110 +Stimuli: -3 -2 -1 -64 65 +Display: 1001 11010 111011 0111110 00111111 +Stimuli: -2 -1 0 -63 66 +Display: 1010 11011 111100 0111111 01000000 +Stimuli: -1 0 1 -62 67 +Display: 1011 11100 111101 1000000 01000001 +Stimuli: 0 1 2 -61 68 +Display: 1100 11101 111110 1000001 01000010 +Stimuli: 1 2 3 -60 69 +Display: 1101 11110 111111 1000010 01000011 +Stimuli: 2 3 4 -59 70 +Display: 1110 11111 000000 1000011 01000100 +Stimuli: 3 4 5 -58 71 +Display: 1111 00000 000001 1000100 01000101 +Stimuli: 4 5 6 -57 72 +Display: 0000 00001 000010 1000101 01000110 +Stimuli: 5 6 7 -56 73 +Display: 0001 00010 000011 1000110 01000111 +Stimuli: 6 7 8 -55 74 +Display: 0010 00011 000100 1000111 01001000 +Stimuli: 7 8 9 -54 75 +Display: 0011 00100 000101 1001000 01001001 +Stimuli: -8 9 10 -53 76 +Display: 0100 00101 000110 1001001 01001010 +Stimuli: -7 10 11 -52 77 +Display: 0101 00110 000111 1001010 01001011 +Stimuli: -6 11 12 -51 78 +Display: 0110 00111 001000 1001011 01001100 +Stimuli: -5 12 13 -50 79 +Display: 0111 01000 001001 1001100 01001101 +Stimuli: -4 13 14 -49 80 +Display: 1000 01001 001010 1001101 01001110 +Stimuli: -3 14 15 -48 81 +Display: 1001 01010 001011 1001110 01001111 +Stimuli: -2 15 16 -47 82 +Display: 1010 01011 001100 1001111 01010000 +Stimuli: -1 -16 17 -46 83 +Display: 1011 01100 001101 1010000 01010001 +Stimuli: 0 -15 18 -45 84 +Display: 1100 01101 001110 1010001 01010010 +Stimuli: 1 -14 19 -44 85 +Display: 1101 01110 001111 1010010 01010011 +Stimuli: 2 -13 20 -43 86 +Display: 1110 01111 010000 1010011 01010100 +Stimuli: 3 -12 21 -42 87 +Display: 1111 10000 010001 1010100 01010101 +Stimuli: 4 -11 22 -41 88 +Display: 0000 10001 010010 1010101 01010110 +Stimuli: 5 -10 23 -40 89 +Display: 0001 10010 010011 1010110 01010111 +Stimuli: 6 -9 24 -39 90 +Display: 0010 10011 010100 1010111 01011000 +Stimuli: 7 -8 25 -38 91 +Display: 0011 10100 010101 1011000 01011001 +Stimuli: -8 -7 26 -37 92 +Display: 0100 10101 010110 1011001 01011010 +Stimuli: -7 -6 27 -36 93 +Display: 0101 10110 010111 1011010 01011011 +Stimuli: -6 -5 28 -35 94 +Display: 0110 10111 011000 1011011 01011100 +Stimuli: -5 -4 29 -34 95 +Display: 0111 11000 011001 1011100 01011101 +Stimuli: -4 -3 30 -33 96 +Display: 1000 11001 011010 1011101 01011110 +Stimuli: -3 -2 31 -32 97 +Display: 1001 11010 011011 1011110 01011111 +Stimuli: -2 -1 -32 -31 98 +Display: 1010 11011 011100 1011111 01100000 +Stimuli: -1 0 -31 -30 99 +Display: 1011 11100 011101 1100000 01100001 +Stimuli: 0 1 -30 -29 100 +Display: 1100 11101 011110 1100001 01100010 +Stimuli: 1 2 -29 -28 101 +Display: 1101 11110 011111 1100010 01100011 +Stimuli: 2 3 -28 -27 102 +Display: 1110 11111 100000 1100011 01100100 +Stimuli: 3 4 -27 -26 103 +Display: 1111 00000 100001 1100100 01100101 +Stimuli: 4 5 -26 -25 104 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/main.cpp new file mode 100644 index 000000000..82b0ce24a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/main.cpp @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "sharing.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal_bool_vector4 stimulus_line1; + sc_signal_bool_vector5 stimulus_line2; + sc_signal_bool_vector6 stimulus_line3; + sc_signal_bool_vector7 stimulus_line4; + sc_signal_bool_vector8 stimulus_line5; + sc_signal<bool> input_valid; + sc_signal<bool> ack; + sc_signal<bool> output_valid; + sc_signal_bool_vector4 result_line1; + sc_signal_bool_vector5 result_line2; + sc_signal_bool_vector6 result_line3; + sc_signal_bool_vector7 result_line4; + sc_signal_bool_vector8 result_line5; + + // SYL 990908 - Initialize some signals -- logs diffed + // when I hacked the simulation kernel. + reset = 0; + input_valid = 0; + ack = 0; + output_valid = 0; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + ack); + + sharing sharing1( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + ack, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + display display1( "display_block", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/sharing.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/sharing.cpp new file mode 100644 index 000000000..8215ce41d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/sharing.cpp @@ -0,0 +1,97 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sharing.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "sharing.h" + +void sharing::entry(){ + + sc_bigint<4> tmp1; + sc_biguint<5> tmp2; + sc_bigint<6> tmp3; + sc_biguint<7> tmp4; + sc_biguint<8> tmp5; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + out_ack.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + out_ack.write(true); + + //execute simple operations + tmp1 = tmp1 - 4; + tmp2 = tmp2 - 4; + tmp3 = tmp3 - 4; + tmp4 = tmp4 - 2; + tmp5 = tmp5 - 2; + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + + out_valid.write(true); + wait(); + out_ack.write(false); + out_valid.write(false); + wait(); + } +} + +// EOF + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/sharing.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/sharing.f new file mode 100644 index 000000000..0c0f3ff29 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/sharing.f @@ -0,0 +1,4 @@ +sharing/stimulus.cpp +sharing/display.cpp +sharing/sharing.cpp +sharing/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/sharing.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/sharing.h new file mode 100644 index 000000000..ca7191f3d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/sharing.h @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sharing.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( sharing ) +{ + SC_HAS_PROCESS( sharing ); + + sc_in_clk clk; + + const sc_signal<bool>& reset ; + const sc_signal_bool_vector4& in_value1; // Input port + const sc_signal_bool_vector5& in_value2; // Input port + const sc_signal_bool_vector6& in_value3; // Input port + const sc_signal_bool_vector7& in_value4; // Input port + const sc_signal_bool_vector8& in_value5; // Input port + const sc_signal<bool>& in_valid; // Input port + sc_signal<bool>& out_ack; // Output port + sc_signal_bool_vector4& out_value1; // Output port + sc_signal_bool_vector5& out_value2; // Output port + sc_signal_bool_vector6& out_value3; // Output port + sc_signal_bool_vector7& out_value4; // Output port + sc_signal_bool_vector8& out_value5; // Output port + sc_signal<bool>& out_valid; // Output port + + // + // Constructor + // + + sharing ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal_bool_vector4& IN_VALUE1, + const sc_signal_bool_vector5& IN_VALUE2, + const sc_signal_bool_vector6& IN_VALUE3, + const sc_signal_bool_vector7& IN_VALUE4, + const sc_signal_bool_vector8& IN_VALUE5, + const sc_signal<bool>& IN_VALID, // Input port + sc_signal<bool>& OUT_ACK, + sc_signal_bool_vector4& OUT_VALUE1, + sc_signal_bool_vector5& OUT_VALUE2, + sc_signal_bool_vector6& OUT_VALUE3, + sc_signal_bool_vector7& OUT_VALUE4, + sc_signal_bool_vector8& OUT_VALUE5, + sc_signal<bool>& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_ack (OUT_ACK), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/stimulus.cpp new file mode 100644 index 000000000..4c05ea844 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/stimulus.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + reset.write(true); + wait(); + reset.write(false); + + sc_signed tmp1(4); + sc_signed tmp2(5); + sc_signed tmp3(6); + sc_signed tmp4(7); + sc_signed tmp5(8); + + tmp1 = "0b0000"; + tmp2 = "0b00001"; + tmp3 = "0b000010"; + tmp4 = "0b0000011"; + tmp5 = "0b00000100"; + + while(true){ + out_valid.write(true); + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + cout << "Stimuli: " << tmp1 << " " << tmp2 << " " << tmp3 << " " << tmp4 << " " << tmp5 << endl; + tmp1 = tmp1 + 1; + tmp2 = tmp2 + 1; + tmp3 = tmp3 + 1; + tmp4 = tmp4 + 1; + tmp5 = tmp5 + 1; + do { wait(); } while (in_ack==false); + out_valid.write(false); + wait(); + } +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/stimulus.h new file mode 100644 index 000000000..9a8f62092 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/stimulus.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset; + sc_signal_bool_vector4& out_value1; // Output port + sc_signal_bool_vector5& out_value2; // Output port + sc_signal_bool_vector6& out_value3; // Output port + sc_signal_bool_vector7& out_value4; // Output port + sc_signal_bool_vector8& out_value5; // Output port + sc_signal<bool>& out_valid; // Output port + const sc_signal<bool>& in_ack; + + // + // Constructor + // + + stimulus( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + sc_signal<bool>& RESET, + sc_signal_bool_vector4& OUT_VALUE1, + sc_signal_bool_vector5& OUT_VALUE2, + sc_signal_bool_vector6& OUT_VALUE3, + sc_signal_bool_vector7& OUT_VALUE4, + sc_signal_bool_vector8& OUT_VALUE5, + sc_signal<bool>& OUT_VALID, + const sc_signal<bool>& IN_ACK + ) + : + reset (RESET), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID), + in_ack (IN_ACK) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + void entry(); +}; +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/common.h new file mode 100644 index 000000000..8a560ac63 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4; +typedef sc_signal<sc_bv<8> > sc_signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/display.cpp new file mode 100644 index 000000000..966569d48 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/display.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up.
+ while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/display.h new file mode 100644 index 000000000..a11ccd275 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal<int>& in_data1; // Input port + const sc_signal_bool_vector4& in_data2; // Input port + const sc_signal_bool_vector4& in_data3; // Input port + const sc_signal_bool_vector8& in_data4; // Input port + const sc_signal_bool_vector8& in_data5; // Input port + const sc_signal<bool>& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal<int>& IN_DATA1, + const sc_signal_bool_vector4& IN_DATA2, + const sc_signal_bool_vector4& IN_DATA3, + const sc_signal_bool_vector8& IN_DATA4, + const sc_signal_bool_vector8& IN_DATA5, + const sc_signal<bool>& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/golden/subtract.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/golden/subtract.log new file mode 100644 index 000000000..9486fc2bd --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/golden/subtract.log @@ -0,0 +1,31 @@ +SystemC Simulation +Stimuli : 255 -1 15 -1 255 at 23 ns +Display : 254 1110 1110 11111110 11111110 at 27 ns +Display : 254 1110 1110 11111110 11111110 at 29 ns +Display : 252 1100 1100 11111100 11111100 at 31 ns +Display : -2 1110 1110 11111110 11111110 at 34 ns +Display : -256 0000 0000 00000000 00000000 at 37 ns +Display : 0 0000 0000 00000000 00000000 at 40 ns +Stimuli : 254 -2 14 -2 254 at 44 ns +Display : 253 1101 1101 11111101 11111101 at 48 ns +Display : 253 1101 1101 11111101 11111101 at 50 ns +Display : 251 1011 1011 11111011 11111011 at 52 ns +Display : -3 1101 1101 11111101 11111101 at 55 ns +Display : -257 1111 1111 11111111 11111111 at 58 ns +Display : 16 0000 0000 00000000 00000001 at 61 ns +Stimuli : 253 -3 13 -3 253 at 65 ns +Display : 252 1100 1100 11111100 11111100 at 69 ns +Display : 252 1100 1100 11111100 11111100 at 71 ns +Display : 250 1010 1010 11111010 11111010 at 73 ns +Display : -4 1100 1100 11111100 11111100 at 76 ns +Display : -258 1110 1110 11111110 11111110 at 79 ns +Display : 16 0000 0000 00000000 00000010 at 82 ns +Stimuli : 252 -4 12 -4 252 at 86 ns +Display : 251 1011 1011 11111011 11111011 at 90 ns +Display : 251 1011 1011 11111011 11111011 at 92 ns +Display : 249 1001 1001 11111001 11111001 at 94 ns +Display : -5 1011 1011 11111011 11111011 at 97 ns +Display : -259 1101 1101 11111101 11111101 at 100 ns +Display : 16 0000 0000 00000000 00000011 at 103 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/main.cpp new file mode 100644 index 000000000..86a1b91b1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/main.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "subtract.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal<int> stimulus_line1; + sc_signal_bool_vector4 stimulus_line2; + sc_signal_bool_vector4 stimulus_line3; + sc_signal_bool_vector8 stimulus_line4; + sc_signal_bool_vector8 stimulus_line5; + sc_signal<bool> input_valid; + sc_signal<bool> output_valid; + sc_signal<int> result_line1; + sc_signal_bool_vector4 result_line2; + sc_signal_bool_vector4 result_line3; + sc_signal_bool_vector8 result_line4; + sc_signal_bool_vector8 result_line5; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid); + + subtraction subtraction1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/stimulus.cpp new file mode 100644 index 000000000..8856451d4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/stimulus.cpp @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + int send_value1 = 255; + sc_signed send_value2(4); + sc_unsigned send_value3(4); + sc_signed send_value4(8); + sc_unsigned send_value5(8); + + + reset.write(true); + out_valid.write(false); + send_value2 = 15; + send_value3 = 15; + send_value4 = 255; + send_value5 = 255; + out_stimulus1.write(0); + out_stimulus2.write(0); + out_stimulus3.write(0); + out_stimulus4.write(0); + out_stimulus5.write(0); + wait(3); + reset.write(false); + while(true){ + wait(20); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_stimulus3.write( send_value3 ); + out_stimulus4.write( send_value4 ); + out_stimulus5.write( send_value5 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " " + << send_value3 << " " + << send_value4 << " " + << send_value5 << " " << " at " + << sc_time_stamp() << endl; + send_value1--; + send_value2 -= 1; + send_value3 -= 1; + send_value4 -= 1; + send_value5 -= 1; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/stimulus.h new file mode 100644 index 000000000..1d675ef5c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/stimulus.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset; + sc_signal<int>& out_stimulus1; + sc_signal_bool_vector4& out_stimulus2; + sc_signal_bool_vector4& out_stimulus3; + sc_signal_bool_vector8& out_stimulus4; + sc_signal_bool_vector8& out_stimulus5; + sc_signal<bool>& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal<bool>& RESET, + sc_signal<int>& OUT_STIMULUS1, + sc_signal_bool_vector4& OUT_STIMULUS2, + sc_signal_bool_vector4& OUT_STIMULUS3, + sc_signal_bool_vector8& OUT_STIMULUS4, + sc_signal_bool_vector8& OUT_STIMULUS5, + sc_signal<bool>& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_stimulus3(OUT_STIMULUS3), + out_stimulus4(OUT_STIMULUS4), + out_stimulus5(OUT_STIMULUS5), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.cpp new file mode 100644 index 000000000..a3fc5ee4b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.cpp @@ -0,0 +1,166 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + subtract.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "subtract.h" + +void subtraction::entry(){ + + int tmp1; + sc_bigint<4> tmp2; + sc_biguint<4> tmp3; + sc_bigint<8> tmp4; + sc_biguint<8> tmp5; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + //execute operations + tmp1 = tmp1 - 1; + tmp2 = tmp2 - 1; + tmp3 = tmp3 - 1; + tmp4 = tmp4 - 1; + tmp5 = tmp5 - 1; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + // write outputs + out_value1.write(tmp1--); + out_value2.write(tmp2--); + out_value3.write(tmp3--); + out_value4.write(tmp4--); + out_value5.write(tmp5--); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + // write outputs + out_value1.write(--tmp1); + out_value2.write(--tmp2); + out_value3.write(--tmp3); + out_value4.write(--tmp4); + out_value5.write(--tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute operations + tmp1 = tmp1 - 254; + tmp2 = tmp2 - 14; + tmp3 = tmp3 - 14; + tmp4 = tmp4 - 254; + tmp5 = tmp5 - 254; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute operations + tmp1 -= 254; + tmp2 -= 14; + tmp3 -= 14; + tmp4 -= 254; + tmp5 -= 254; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute operations with signed and unsigned mix and mixed bit width + tmp1 = (tmp3 - tmp2).to_int(); + tmp2 = tmp2 - tmp4; + tmp3 = tmp3 - tmp5; + tmp4 = tmp4 - tmp5; + tmp5 = tmp4 - tmp5; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.f new file mode 100644 index 000000000..fe9d1d54d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.f @@ -0,0 +1,4 @@ +subtract/stimulus.cpp +subtract/display.cpp +subtract/subtract.cpp +subtract/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.h new file mode 100644 index 000000000..bac065909 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.h @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + subtract.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( subtraction ) +{ + SC_HAS_PROCESS( subtraction ); + + sc_in_clk clk; + + const sc_signal<bool>& reset ; + const sc_signal<int>& in_value1; // Input port + const sc_signal_bool_vector4& in_value2; + const sc_signal_bool_vector4& in_value3; + const sc_signal_bool_vector8& in_value4; + const sc_signal_bool_vector8& in_value5; + const sc_signal<bool>& in_valid; // Input port + sc_signal<int>& out_value1; // Output port + sc_signal_bool_vector4& out_value2; + sc_signal_bool_vector4& out_value3; + sc_signal_bool_vector8& out_value4; + sc_signal_bool_vector8& out_value5; + sc_signal<bool>& out_valid; // Output port + + // + // Constructor + // + + subtraction( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal<int>& IN_VALUE1, + const sc_signal_bool_vector4& IN_VALUE2, + const sc_signal_bool_vector4& IN_VALUE3, + const sc_signal_bool_vector8& IN_VALUE4, + const sc_signal_bool_vector8& IN_VALUE5, + const sc_signal<bool>& IN_VALID, // Input port + sc_signal<int>& OUT_VALUE1, + sc_signal_bool_vector4& OUT_VALUE2, + sc_signal_bool_vector4& OUT_VALUE3, + sc_signal_bool_vector8& OUT_VALUE4, + sc_signal_bool_vector8& OUT_VALUE5, + sc_signal<bool>& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF |