diff options
Diffstat (limited to 'src/systemc/tests/systemc/misc/cae_test/general/control/if_test')
60 files changed, 4392 insertions, 0 deletions
diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.cpp new file mode 100644 index 000000000..13ee2a807 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.cpp @@ -0,0 +1,135 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + balancing.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "balancing.h" + +void balancing::entry(){ + + sc_biguint<4> tmp1; + sc_biguint<4> tmp2; + sc_biguint<4> tmp3; + sc_unsigned out_tmp2(12); + sc_unsigned out_tmp3(12); + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_valid1.write(false); + out_valid2.write(false); + out_valid3.write(false); + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read(); + + //easy, just a bunch of different waits + out_valid1.write(true); + if (tmp1 == 4) { + wait(); + wait(); + wait(); + wait(); + out_value1.write(3); + wait(); + } else if (tmp1 == 3) { + out_value1.write(2); + wait(); + wait(); + wait(); + } else if (tmp1 == 2) { + out_value1.write(1); + wait(); + wait(); + } else { + out_value1.write(tmp1); + wait(); + }; + out_valid1.write(false); + wait(); + + //the first branch should be pushed out in latency due to long delay + tmp2 = in_value2.read(); + out_valid2.write(true); + wait(); + if (tmp2<4) { + //long operation should extent latency + out_tmp2 = tmp2*tmp2*tmp2; + wait(); + } else if (tmp2<8) { + //short operation should not extent latency + out_tmp2 = 4; + wait(); + } else if (tmp2<12) { + //wait statements should extent latency + out_tmp2 = 1; + wait(); + wait(); + wait(); + }; + wait(); + + out_value2.write( sc_biguint<4>( out_tmp2 ) ); + out_valid2.write(false); + wait(); + + //if branch without else + tmp3 = in_value3.read(); + out_valid3.write(true); + wait(); + if (tmp3<8) { + out_tmp3 = 4; + wait(); + } + + out_value3.write( sc_biguint<4>( out_tmp3 ) ); + wait(); + out_valid3.write(false); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.f b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.f new file mode 100644 index 000000000..2d727063d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.f @@ -0,0 +1,4 @@ +balancing/main.cpp +balancing/stimulus.cpp +balancing/display.cpp +balancing/balancing.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.h new file mode 100644 index 000000000..d32742dc6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + balancing.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( balancing ) +{ + SC_HAS_PROCESS( balancing ); + + sc_in_clk clk; + + const sc_signal<bool>& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal<bool>& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal<bool>& out_valid1; + sc_signal<bool>& out_valid2; + sc_signal<bool>& out_valid3; + + // + // Constructor + // + + balancing( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal<bool>& IN_VALID, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal<bool>& OUT_VALID1, + sc_signal<bool>& OUT_VALID2, + sc_signal<bool>& OUT_VALID3 + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_valid1 (OUT_VALID1), + out_valid2 (OUT_VALID2), + out_valid3 (OUT_VALID3) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal<sc_bv<4> > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/display.cpp new file mode 100644 index 000000000..f61b61003 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/display.cpp @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(i++<20) { + // Reading Data, and Counter i,j is counted up.
+ while (in_valid1.read()==false) wait(); + while (in_valid1.read()==true) { + cout << "Display : in_data1 " << in_data1.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + while (in_valid2.read()==false) wait(); + while (in_valid2.read()==true) { + cout << "Display : in_data2 " << in_data2.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + while (in_valid3.read()==false) wait(); + while (in_valid3.read()==true) { + cout << "Display : in_data3 " << in_data3.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + }; + sc_stop(); +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/display.h new file mode 100644 index 000000000..5860d2d9f --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal<bool>& in_valid1; + const sc_signal<bool>& in_valid2; + const sc_signal<bool>& in_valid3; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal<bool>& IN_VALID1, + const sc_signal<bool>& IN_VALID2, + const sc_signal<bool>& IN_VALID3 + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_valid1(IN_VALID1), + in_valid2(IN_VALID2), + in_valid3(IN_VALID3) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/golden/balancing.log b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/golden/balancing.log new file mode 100644 index 000000000..b3ca99775 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/golden/balancing.log @@ -0,0 +1,134 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 at 2 ns +Display : in_data1 0000 at 4 ns +Display : in_data2 0000 at 6 ns +Display : in_data2 0000 at 7 ns +Display : in_data2 0000 at 8 ns +Display : in_data3 0000 at 10 ns +Display : in_data3 0000 at 11 ns +Display : in_data3 0100 at 12 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 at 18 ns +Display : in_data1 0001 at 20 ns +Display : in_data2 0000 at 22 ns +Display : in_data2 0000 at 23 ns +Display : in_data2 0000 at 24 ns +Display : in_data3 0100 at 26 ns +Display : in_data3 0100 at 27 ns +Display : in_data3 0100 at 28 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 at 34 ns +Display : in_data1 0001 at 36 ns +Display : in_data1 0001 at 37 ns +Display : in_data2 0001 at 39 ns +Display : in_data2 0001 at 40 ns +Display : in_data2 0001 at 41 ns +Display : in_data3 0100 at 43 ns +Display : in_data3 0100 at 44 ns +Display : in_data3 0100 at 45 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 at 50 ns +Display : in_data1 0010 at 52 ns +Display : in_data1 0010 at 53 ns +Display : in_data1 0010 at 54 ns +Display : in_data2 1000 at 56 ns +Display : in_data2 1000 at 57 ns +Display : in_data2 1000 at 58 ns +Display : in_data3 0100 at 60 ns +Display : in_data3 0100 at 61 ns +Display : in_data3 0100 at 62 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 at 66 ns +Display : in_data1 0010 at 68 ns +Display : in_data1 0010 at 69 ns +Display : in_data1 0010 at 70 ns +Display : in_data1 0010 at 71 ns +Display : in_data1 0011 at 72 ns +Display : in_data2 1011 at 74 ns +Display : in_data2 1011 at 75 ns +Display : in_data2 1011 at 76 ns +Display : in_data3 0100 at 78 ns +Display : in_data3 0100 at 79 ns +Display : in_data3 0100 at 80 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 at 82 ns +Display : in_data1 0101 at 84 ns +Display : in_data2 0100 at 86 ns +Display : in_data2 0100 at 87 ns +Display : in_data2 0100 at 88 ns +Display : in_data3 0100 at 90 ns +Display : in_data3 0100 at 91 ns +Display : in_data3 0100 at 92 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 at 98 ns +Display : in_data1 0110 at 100 ns +Display : in_data2 0100 at 102 ns +Display : in_data2 0100 at 103 ns +Display : in_data2 0100 at 104 ns +Display : in_data3 0100 at 106 ns +Display : in_data3 0100 at 107 ns +Display : in_data3 0100 at 108 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 at 114 ns +Display : in_data1 0111 at 116 ns +Display : in_data2 0100 at 118 ns +Display : in_data2 0100 at 119 ns +Display : in_data2 0100 at 120 ns +Display : in_data3 0100 at 122 ns +Display : in_data3 0100 at 123 ns +Display : in_data3 0100 at 124 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 at 130 ns +Display : in_data1 1000 at 132 ns +Display : in_data2 0100 at 134 ns +Display : in_data2 0100 at 135 ns +Display : in_data2 0100 at 136 ns +Display : in_data2 0100 at 137 ns +Display : in_data2 0100 at 138 ns +Display : in_data3 0100 at 140 ns +Display : in_data3 0100 at 141 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 at 146 ns +Display : in_data1 1001 at 148 ns +Display : in_data2 0001 at 150 ns +Display : in_data2 0001 at 151 ns +Display : in_data2 0001 at 152 ns +Display : in_data2 0001 at 153 ns +Display : in_data2 0001 at 154 ns +Display : in_data3 0100 at 156 ns +Display : in_data3 0100 at 157 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 at 162 ns +Display : in_data1 1010 at 164 ns +Display : in_data2 0001 at 166 ns +Display : in_data2 0001 at 167 ns +Display : in_data2 0001 at 168 ns +Display : in_data2 0001 at 169 ns +Display : in_data2 0001 at 170 ns +Display : in_data3 0100 at 172 ns +Display : in_data3 0100 at 173 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 at 178 ns +Display : in_data1 1011 at 180 ns +Display : in_data2 0001 at 182 ns +Display : in_data2 0001 at 183 ns +Display : in_data2 0001 at 184 ns +Display : in_data2 0001 at 185 ns +Display : in_data2 0001 at 186 ns +Display : in_data3 0100 at 188 ns +Display : in_data3 0100 at 189 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 at 194 ns +Display : in_data1 1100 at 196 ns +Display : in_data2 0001 at 198 ns +Display : in_data2 0001 at 199 ns +Display : in_data3 0100 at 201 ns +Display : in_data3 0100 at 202 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 at 210 ns +Display : in_data1 1101 at 212 ns +Display : in_data2 0001 at 214 ns +Display : in_data2 0001 at 215 ns +Display : in_data3 0100 at 217 ns +Display : in_data3 0100 at 218 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 at 226 ns +Display : in_data1 1110 at 228 ns +Display : in_data2 0001 at 230 ns +Display : in_data2 0001 at 231 ns +Display : in_data3 0100 at 233 ns +Display : in_data3 0100 at 234 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 at 242 ns +Display : in_data1 1111 at 244 ns +Display : in_data2 0001 at 246 ns +Display : in_data2 0001 at 247 ns +Display : in_data3 0100 at 249 ns +Display : in_data3 0100 at 250 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/main.cpp new file mode 100644 index 000000000..01e223141 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/main.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "balancing.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal<bool> input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal<bool> output_valid1; + sc_signal<bool> output_valid2; + sc_signal<bool> output_valid3; + + + balancing balancing1 ( "process_body", + clock, + reset, + stim1, + stim2, + stim3, + input_valid, + result1, + result2, + result3, + output_valid1, + output_valid2, + output_valid3 + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + input_valid); + + display display1 ("display", + clock, + result1, + result2, + result3, + output_valid1, + output_valid2, + output_valid3 + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/stimulus.cpp new file mode 100644 index 000000000..53a319114 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/stimulus.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " << i + << " at " << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(15); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/stimulus.h new file mode 100644 index 000000000..1bc242809 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/stimulus.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal<bool>& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal<bool>& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal<bool>& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal<sc_bv<4> > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.cpp new file mode 100644 index 000000000..5ecc74334 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.cpp @@ -0,0 +1,129 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + conditions.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "conditions.h" + +void conditions::entry(){ + + sc_biguint<4> tmp1; + sc_bigint<4> tmp2; + sc_biguint<4> tmp2a; + sc_lv<4> tmp3; + sc_bv<4> tmp4; + int tmp5; + bool cond_tmp; + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_value4.write(0); + out_value5.write(0); + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + // complex condition on variables + if ((tmp1==4) && (tmp2<6) || (tmp5+tmp4.to_int()==6)) { + out_value1.write(4); + } else { + out_value1.write(tmp1); + }; + wait(); + + // complex conditions on signal reads + if ((in_value1.read().to_uint()==4) && (in_value2.read().to_int()<6) || + (in_value4.read().to_int()+in_value5.read()==6)) { + out_value2.write(4); + } else { + out_value2.write(tmp1); + }; + wait(); + + //reading inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + // complex conditions outside the if; does it matter for timing? + cond_tmp = (tmp1==4) && (tmp2<6) || (tmp5+tmp4.to_int()==6); + if (cond_tmp) { + out_value3.write(4); + } else { + out_value3.write(tmp1); + }; + wait(); + + // arithmetic if can only be done when using the same datatypes + // therefor the temporary assignment + tmp2a = 0; + out_value4.write((tmp3.to_int()==4) && (tmp1<6) || + (tmp5+tmp2.to_int()==6)?tmp2a:tmp1); + wait(); + + // arithmetic if can only be done when using the same datatypes + // therefor the temporary assignment + tmp5 = tmp2.to_int(); + out_value5.write((in_value3.read().to_int()==4) && + (in_value1.read().to_int()<6) || + (in_value5.read()+in_value2.read().to_int()==6)? + 0:tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.f b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.f new file mode 100644 index 000000000..ed7a236e6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.f @@ -0,0 +1,4 @@ +conditions/display.cpp +conditions/stimulus.cpp +conditions/main.cpp +conditions/conditions.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.h new file mode 100644 index 000000000..f2ceadb83 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.h @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + conditions.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( conditions ) +{ + SC_HAS_PROCESS( conditions ); + + sc_in_clk clk; + + const sc_signal<bool>& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal_bool_vector& in_value4; + const sc_signal<int>& in_value5 ; + const sc_signal<bool>& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal_bool_vector& out_value4; + sc_signal<int>& out_value5; + sc_signal<bool>& out_valid; + + // + // Constructor + // + + conditions( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal_bool_vector& IN_VALUE4, + const sc_signal<int>& IN_VALUE5, + const sc_signal<bool>& IN_VALID, // Input port + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal_bool_vector& OUT_VALUE4, + sc_signal<int>& OUT_VALUE5, + sc_signal<bool>& OUT_VALID // Input port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/display.cpp new file mode 100644 index 000000000..fc643330d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/display.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up.
+ while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/display.h new file mode 100644 index 000000000..36001ab41 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal_bool_vector& in_data4; // Input port + const sc_signal<int>& in_data5; // Input port + const sc_signal<bool>& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal_bool_vector& IN_DATA4, + const sc_signal<int>& IN_DATA5, + const sc_signal<bool>& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/golden/conditions.log b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/golden/conditions.log new file mode 100644 index 000000000..3432fae28 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/golden/conditions.log @@ -0,0 +1,35 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 stim4= 0 stim5= 0 2 ns +Display : 0000 0000 0000 0000 0 at 8 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 stim4= 1 stim5= 1 13 ns +Display : 0001 0001 0001 0001 1 at 19 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 stim4= 2 stim5= 2 24 ns +Display : 0010 0010 0010 0010 2 at 30 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 stim4= 3 stim5= 3 35 ns +Display : 0100 0100 0100 0000 0 at 41 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 stim4= 4 stim5= 4 46 ns +Display : 0100 0100 0100 0000 0 at 52 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 stim4= 5 stim5= 5 57 ns +Display : 0101 0101 0101 0101 5 at 63 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 stim4= 6 stim5= 6 68 ns +Display : 0110 0110 0110 0110 6 at 74 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 stim4= 7 stim5= 7 79 ns +Display : 0111 0111 0111 0111 7 at 85 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 stim4= 8 stim5= 8 90 ns +Display : 1000 1000 1000 1000 -8 at 96 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 stim4= 9 stim5= 9 101 ns +Display : 1001 1001 1001 1001 -7 at 107 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 stim4= 10 stim5= 10 112 ns +Display : 1010 1010 1010 1010 -6 at 118 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 stim4= 11 stim5= 11 123 ns +Display : 0100 0100 0100 0000 0 at 129 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 stim4= 12 stim5= 12 134 ns +Display : 1100 1100 1100 1100 -4 at 140 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 stim4= 13 stim5= 13 145 ns +Display : 1101 1101 1101 1101 -3 at 151 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 stim4= 14 stim5= 14 156 ns +Display : 1110 1110 1110 1110 -2 at 162 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 stim4= 15 stim5= 15 167 ns +Display : 1111 1111 1111 1111 -1 at 173 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/main.cpp new file mode 100644 index 000000000..bbb3a183b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/main.cpp @@ -0,0 +1,106 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "conditions.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal_bool_vector stim4; + sc_signal<int> stim5; + sc_signal<bool> input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal_bool_vector result4; + sc_signal<int> result5; + sc_signal<bool> output_valid; + + + + conditions conditions1 ( + "process_body", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + stim5, + input_valid, + result1, + result2, + result3, + result4, + result5, + output_valid + ); + + stimulus stimulus1 ( + "stimulus", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + stim5, + input_valid + ); + + display display1 ( + "display", + clock, + result1, + result2, + result3, + result4, + result5, + output_valid + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/stimulus.cpp new file mode 100644 index 000000000..f45313792 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/stimulus.cpp @@ -0,0 +1,73 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + stim4.write(0); + stim5.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + stim4.write(i); + stim5.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " + << i << " stim4= " << i << " stim5= " << i << " " + << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(10); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/stimulus.h new file mode 100644 index 000000000..813c53e1b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/stimulus.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal_bool_vector& stim4; + sc_signal<int>& stim5; + sc_signal<bool>& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal<bool>& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal_bool_vector& STIM4, + sc_signal<int>& STIM5, + sc_signal<bool>& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + stim4(STIM4), + stim5(STIM5), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal<sc_bv<4> > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.cpp new file mode 100644 index 000000000..145f7181d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.cpp @@ -0,0 +1,119 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "datatypes.h" + +void datatypes::entry() { + + sc_biguint<4> tmp1; + sc_bigint<4> tmp2; + sc_lv<4> tmp3; + sc_bv<4> tmp4; + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_value4.write(0); + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + // reading inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + + // checking if condition on a range of bits + if (tmp1.range(1,3) == 4) { + out_value1.write(3); + } else if (tmp1.range(3,1) == 4) { + out_value1.write(2); + } else { + out_value1.write(tmp1); + }; + wait(); + + // checking if condition on bit part + if (tmp2[2]) { + out_value2.write(3); + } else if ((bool)tmp1[1]==true) { + out_value2.write(2); + } else { + out_value2.write(tmp2); + }; + wait(); + + // checking if condition on a range of bits in complex condition + if (tmp3.range(1,3)=="000" || ((tmp3.range(3,1).to_uint()!=4) && + tmp3.range(3,1).to_uint()!=5 && tmp3.range(3,1).to_uint()!=6 && + tmp3.range(3,1).to_uint()!=7)) { + out_value3.write(1); + } else { + out_value3.write(tmp3); + }; + + // checking if condition on a range of bits in complex condition + // on signal reads inside condition + if (in_value4.read().range(1,3)=="000" || + (in_value4.read().range(3,1).to_uint()!=4 && + in_value4.read().range(3,1).to_uint()!=5 && + in_value4.read().range(3,1).to_uint()!=6 && + in_value4.read().range(3,1).to_uint()!=7)) { + out_value4.write(1); + } else { + out_value4.write(tmp4); + }; + + out_valid.write(true); + wait(); + out_valid.write(false); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.f new file mode 100644 index 000000000..be086769d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.f @@ -0,0 +1,4 @@ +datatypes/display.cpp +datatypes/main.cpp +datatypes/stimulus.cpp +datatypes/datatypes.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.h new file mode 100644 index 000000000..43be41785 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( datatypes ) +{ + SC_HAS_PROCESS( datatypes ); + + sc_in_clk clk; + + const sc_signal<bool>& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal_bool_vector& in_value4; + const sc_signal<bool>& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal_bool_vector& out_value4; + sc_signal<bool>& out_valid; + + // + // Constructor + // + + datatypes( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal_bool_vector& IN_VALUE4, + const sc_signal<bool>& IN_VALID, // Input port + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal_bool_vector& OUT_VALUE4, + sc_signal<bool>& OUT_VALID // Input port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_valid (OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.cpp new file mode 100644 index 000000000..ceaa882b1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up.
+ while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << " at " << sc_time_stamp() << endl; + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.h new file mode 100644 index 000000000..3ff6b921c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal_bool_vector& in_data4; // Input port + const sc_signal<bool>& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal_bool_vector& IN_DATA4, + const sc_signal<bool>& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/golden/datatypes.log b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/golden/datatypes.log new file mode 100644 index 000000000..f183028c3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/golden/datatypes.log @@ -0,0 +1,35 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 stim4= 0 2 ns +Display : 0000 0000 0001 0001 at 6 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 stim4= 1 13 ns +Display : 0001 0001 0001 0001 at 17 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 stim4= 2 24 ns +Display : 0011 0010 0001 0001 at 28 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 stim4= 3 35 ns +Display : 0011 0010 0001 0001 at 39 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 stim4= 4 46 ns +Display : 0100 0011 0001 0001 at 50 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 stim4= 5 57 ns +Display : 0101 0011 0001 0001 at 61 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 stim4= 6 68 ns +Display : 0110 0011 0001 0001 at 72 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 stim4= 7 79 ns +Display : 0111 0011 0001 0001 at 83 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 stim4= 8 90 ns +Display : 0010 1000 1000 1000 at 94 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 stim4= 9 101 ns +Display : 0010 1001 1001 1001 at 105 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 stim4= 10 112 ns +Display : 1010 0010 1010 1010 at 116 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 stim4= 11 123 ns +Display : 1011 0010 1011 1011 at 127 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 stim4= 12 134 ns +Display : 1100 0011 1100 1100 at 138 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 stim4= 13 145 ns +Display : 1101 0011 1101 1101 at 149 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 stim4= 14 156 ns +Display : 1110 0011 1110 1110 at 160 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 stim4= 15 167 ns +Display : 1111 0011 1111 1111 at 171 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/main.cpp new file mode 100644 index 000000000..0eee3db1c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/main.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "datatypes.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal_bool_vector stim4; + sc_signal<bool> input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal_bool_vector result4; + sc_signal<bool> output_valid; + + + + datatypes datatypes1 ( "process_body", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + input_valid, + result1, + result2, + result3, + result4, + output_valid + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + input_valid); + + display display1 ("display", + clock, + result1, + result2, + result3, + result4, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.cpp new file mode 100644 index 000000000..2e897dacc --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.cpp @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + stim4.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + stim4.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " + << i << " stim4= " << i << " " + << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(10); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.h new file mode 100644 index 000000000..a82afff4c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal_bool_vector& stim4; + sc_signal<bool>& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal<bool>& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal_bool_vector& STIM4, + sc_signal<bool>& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + stim4(STIM4), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal<sc_bv<4> > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/display.cpp new file mode 100644 index 000000000..f61b61003 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/display.cpp @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(i++<20) { + // Reading Data, and Counter i,j is counted up.
+ while (in_valid1.read()==false) wait(); + while (in_valid1.read()==true) { + cout << "Display : in_data1 " << in_data1.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + while (in_valid2.read()==false) wait(); + while (in_valid2.read()==true) { + cout << "Display : in_data2 " << in_data2.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + while (in_valid3.read()==false) wait(); + while (in_valid3.read()==true) { + cout << "Display : in_data3 " << in_data3.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + }; + sc_stop(); +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/display.h new file mode 100644 index 000000000..5860d2d9f --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal<bool>& in_valid1; + const sc_signal<bool>& in_valid2; + const sc_signal<bool>& in_valid3; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal<bool>& IN_VALID1, + const sc_signal<bool>& IN_VALID2, + const sc_signal<bool>& IN_VALID3 + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_valid1(IN_VALID1), + in_valid2(IN_VALID2), + in_valid3(IN_VALID3) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.cpp new file mode 100644 index 000000000..6735f4d22 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.cpp @@ -0,0 +1,138 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fsm.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-10-25 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "fsm.h" + +void fsm::entry(){ + + sc_biguint<4> tmp1; + sc_biguint<4> tmp2; + sc_biguint<4> tmp3; + sc_unsigned out_tmp2(12); + sc_unsigned out_tmp3(12); + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_valid1.write(false); + out_valid2.write(false); + out_valid3.write(false); + out_tmp3 = 0; + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read(); + //easy, just a bunch of different waits + out_valid1.write(true); + wait(); + if (tmp1 == 4) { + wait(); + wait(); + wait(); + wait(); + out_value1.write(3); + wait(); + } else if (tmp1 == 3) { + out_value1.write(2); + wait(); + wait(); + wait(); + } else if (tmp1 == 2) { + out_value1.write(1); + wait(); + wait(); + } else { + out_value1.write(tmp1); + wait(); + }; + out_valid1.write(false); + wait(); + + //the first branch should be pushed out in latency due to long delay + tmp2 = in_value2.read(); + out_valid2.write(true); + wait(); + if (tmp2<4) { + //long operation should extent latency + out_tmp2 = tmp2*tmp2*tmp2; + wait(); + } else if (tmp2<8) { + //short operation should not extent latency + out_tmp2 = 4; + wait(); + } else if (tmp2<12) { + //wait statements should extent latency + out_tmp2 = 1; + wait(); + wait(); + wait(); + } else { + wait(); + }; + wait(); + + out_value2.write( sc_biguint<4>( out_tmp2 ) ); + out_valid2.write(false); + wait(); + + // if branch without else maybe check later + tmp3 = in_value3.read(); + out_valid3.write(true); +// wait(); +// if (tmp3<8) { +// out_tmp3 = 4; +// wait(); +// } + + out_value3.write( sc_biguint<4>( out_tmp3 ) ); + wait(); + out_valid3.write(false); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.f b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.f new file mode 100644 index 000000000..67fa931e6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.f @@ -0,0 +1,4 @@ +fsm/main.cpp +fsm/stimulus.cpp +fsm/display.cpp +fsm/fsm.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.h new file mode 100644 index 000000000..9f67e156c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fsm.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( fsm ) +{ + SC_HAS_PROCESS( fsm ); + + sc_in_clk clk; + + const sc_signal<bool>& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal<bool>& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal<bool>& out_valid1; + sc_signal<bool>& out_valid2; + sc_signal<bool>& out_valid3; + + // + // Constructor + // + + fsm( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal<bool>& IN_VALID, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal<bool>& OUT_VALID1, + sc_signal<bool>& OUT_VALID2, + sc_signal<bool>& OUT_VALID3 + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_valid1 (OUT_VALID1), + out_valid2 (OUT_VALID2), + out_valid3 (OUT_VALID3) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/golden/fsm.log b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/golden/fsm.log new file mode 100644 index 000000000..03ef8acfe --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/golden/fsm.log @@ -0,0 +1,130 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 at 2 ns +Display : in_data1 0000 at 4 ns +Display : in_data1 0000 at 5 ns +Display : in_data2 0000 at 7 ns +Display : in_data2 0000 at 8 ns +Display : in_data2 0000 at 9 ns +Display : in_data3 0000 at 11 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 at 18 ns +Display : in_data1 0000 at 20 ns +Display : in_data1 0001 at 21 ns +Display : in_data2 0000 at 23 ns +Display : in_data2 0000 at 24 ns +Display : in_data2 0000 at 25 ns +Display : in_data3 0000 at 27 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 at 34 ns +Display : in_data1 0001 at 36 ns +Display : in_data1 0001 at 37 ns +Display : in_data1 0001 at 38 ns +Display : in_data2 0001 at 40 ns +Display : in_data2 0001 at 41 ns +Display : in_data2 0001 at 42 ns +Display : in_data3 0000 at 44 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 at 50 ns +Display : in_data1 0001 at 52 ns +Display : in_data1 0010 at 53 ns +Display : in_data1 0010 at 54 ns +Display : in_data1 0010 at 55 ns +Display : in_data2 1000 at 57 ns +Display : in_data2 1000 at 58 ns +Display : in_data2 1000 at 59 ns +Display : in_data3 0000 at 61 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 at 66 ns +Display : in_data1 0010 at 68 ns +Display : in_data1 0010 at 69 ns +Display : in_data1 0010 at 70 ns +Display : in_data1 0010 at 71 ns +Display : in_data1 0010 at 72 ns +Display : in_data1 0011 at 73 ns +Display : in_data2 1011 at 75 ns +Display : in_data2 1011 at 76 ns +Display : in_data2 1011 at 77 ns +Display : in_data3 0000 at 79 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 at 82 ns +Display : in_data1 0011 at 84 ns +Display : in_data1 0101 at 85 ns +Display : in_data2 0100 at 87 ns +Display : in_data2 0100 at 88 ns +Display : in_data2 0100 at 89 ns +Display : in_data3 0000 at 91 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 at 98 ns +Display : in_data1 0101 at 100 ns +Display : in_data1 0110 at 101 ns +Display : in_data2 0100 at 103 ns +Display : in_data2 0100 at 104 ns +Display : in_data2 0100 at 105 ns +Display : in_data3 0000 at 107 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 at 114 ns +Display : in_data1 0110 at 116 ns +Display : in_data1 0111 at 117 ns +Display : in_data2 0100 at 119 ns +Display : in_data2 0100 at 120 ns +Display : in_data2 0100 at 121 ns +Display : in_data3 0000 at 123 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 at 130 ns +Display : in_data1 0111 at 132 ns +Display : in_data1 1000 at 133 ns +Display : in_data2 0100 at 135 ns +Display : in_data2 0100 at 136 ns +Display : in_data2 0100 at 137 ns +Display : in_data2 0100 at 138 ns +Display : in_data2 0100 at 139 ns +Display : in_data3 0000 at 141 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 at 146 ns +Display : in_data1 1000 at 148 ns +Display : in_data1 1001 at 149 ns +Display : in_data2 0001 at 151 ns +Display : in_data2 0001 at 152 ns +Display : in_data2 0001 at 153 ns +Display : in_data2 0001 at 154 ns +Display : in_data2 0001 at 155 ns +Display : in_data3 0000 at 157 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 at 162 ns +Display : in_data1 1001 at 164 ns +Display : in_data1 1010 at 165 ns +Display : in_data2 0001 at 167 ns +Display : in_data2 0001 at 168 ns +Display : in_data2 0001 at 169 ns +Display : in_data2 0001 at 170 ns +Display : in_data2 0001 at 171 ns +Display : in_data3 0000 at 173 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 at 178 ns +Display : in_data1 1010 at 180 ns +Display : in_data1 1011 at 181 ns +Display : in_data2 0001 at 183 ns +Display : in_data2 0001 at 184 ns +Display : in_data2 0001 at 185 ns +Display : in_data2 0001 at 186 ns +Display : in_data2 0001 at 187 ns +Display : in_data3 0000 at 189 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 at 194 ns +Display : in_data1 1011 at 196 ns +Display : in_data1 1100 at 197 ns +Display : in_data2 0001 at 199 ns +Display : in_data2 0001 at 200 ns +Display : in_data2 0001 at 201 ns +Display : in_data3 0000 at 203 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 at 210 ns +Display : in_data1 1100 at 212 ns +Display : in_data1 1101 at 213 ns +Display : in_data2 0001 at 215 ns +Display : in_data2 0001 at 216 ns +Display : in_data2 0001 at 217 ns +Display : in_data3 0000 at 219 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 at 226 ns +Display : in_data1 1101 at 228 ns +Display : in_data1 1110 at 229 ns +Display : in_data2 0001 at 231 ns +Display : in_data2 0001 at 232 ns +Display : in_data2 0001 at 233 ns +Display : in_data3 0000 at 235 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 at 242 ns +Display : in_data1 1110 at 244 ns +Display : in_data1 1111 at 245 ns +Display : in_data2 0001 at 247 ns +Display : in_data2 0001 at 248 ns +Display : in_data2 0001 at 249 ns +Display : in_data3 0000 at 251 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/main.cpp new file mode 100644 index 000000000..68aa873e9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/main.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "fsm.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal<bool> input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal<bool> output_valid1; + sc_signal<bool> output_valid2; + sc_signal<bool> output_valid3; + + + fsm fsm1 ( "process_body", + clock, + reset, + stim1, + stim2, + stim3, + input_valid, + result1, + result2, + result3, + output_valid1, + output_valid2, + output_valid3 + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + input_valid); + + display display1 ("display", + clock, + result1, + result2, + result3, + output_valid1, + output_valid2, + output_valid3 + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/stimulus.cpp new file mode 100644 index 000000000..53a319114 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/stimulus.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " << i + << " at " << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(15); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/stimulus.h new file mode 100644 index 000000000..1bc242809 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/stimulus.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal<bool>& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal<bool>& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal<bool>& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal<sc_bv<4> > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/display.cpp new file mode 100644 index 000000000..fc643330d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/display.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up.
+ while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/display.h new file mode 100644 index 000000000..36001ab41 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal_bool_vector& in_data4; // Input port + const sc_signal<int>& in_data5; // Input port + const sc_signal<bool>& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal_bool_vector& IN_DATA4, + const sc_signal<int>& IN_DATA5, + const sc_signal<bool>& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/golden/if_test.log b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/golden/if_test.log new file mode 100644 index 000000000..505f7d8d8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/golden/if_test.log @@ -0,0 +1,35 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 stim4= 0 stim5= 0 2 ns +Display : 0000 0000 0001 0000 0 at 10 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 stim4= 1 stim5= 1 13 ns +Display : 0001 0000 0001 0000 1 at 20 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 stim4= 2 stim5= 2 24 ns +Display : 0001 0000 0010 0010 2 at 31 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 stim4= 3 stim5= 3 35 ns +Display : 0010 0000 0011 0011 3 at 42 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 stim4= 4 stim5= 4 46 ns +Display : 0011 0000 0100 0100 4 at 53 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 stim4= 5 stim5= 5 57 ns +Display : 0101 0000 0101 0101 5 at 64 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 stim4= 6 stim5= 6 68 ns +Display : 0110 0110 0110 0110 0 at 75 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 stim4= 7 stim5= 7 79 ns +Display : 0111 0111 0111 0111 0 at 86 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 stim4= 8 stim5= 8 90 ns +Display : 1000 0000 1000 1000 0 at 97 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 stim4= 9 stim5= 9 101 ns +Display : 1001 0000 1001 1001 0 at 108 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 stim4= 10 stim5= 10 112 ns +Display : 1010 0000 1010 1010 0 at 119 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 stim4= 11 stim5= 11 123 ns +Display : 1011 0000 1011 1011 0 at 130 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 stim4= 12 stim5= 12 134 ns +Display : 1100 0000 1100 1100 0 at 141 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 stim4= 13 stim5= 13 145 ns +Display : 1101 0000 1101 1101 0 at 152 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 stim4= 14 stim5= 14 156 ns +Display : 1110 0000 1110 1110 0 at 163 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 stim4= 15 stim5= 15 167 ns +Display : 1111 0000 1111 1111 0 at 174 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.cpp new file mode 100644 index 000000000..c728895ed --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.cpp @@ -0,0 +1,118 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + if_test.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "if_test.h" + +void if_test::entry(){ + + sc_biguint<4> tmp1; + sc_bigint<4> tmp2; + sc_lv<4> tmp3; + sc_bv<4> tmp4; + int tmp5; + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_value4.write(0); + out_value5.write(0); + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + //execution + if (tmp1 == 4) { + out_value1.write(3); + } else if (tmp1 == 3) { + out_value1.write(2); + } else if (tmp1 == 2) { + out_value1.write(1); + } else { + out_value1.write(tmp1); + }; + wait(); + + if (tmp2 < 6 ) { + out_value2.write(0); + wait(); + } else { + out_value2.write(tmp2); + wait(); + }; + + if (tmp3 == "0000" ) { + out_value3.write(1); + wait(); + wait(); + } else { + out_value3.write(tmp3); + wait(); + }; + + if (tmp4 != "0001" ) { + out_value4.write(tmp4); + }; + wait(); + + out_value5.write((tmp5>=6)?0:tmp5); + wait(); + + out_valid.write(true); + wait(); + out_valid.write(false); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.f b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.f new file mode 100644 index 000000000..3d00cc5c2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.f @@ -0,0 +1,4 @@ +if_test/if_test.cpp +if_test/display.cpp +if_test/main.cpp +if_test/stimulus.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.h new file mode 100644 index 000000000..d1ab3341a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.h @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + if_test.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( if_test ) +{ + SC_HAS_PROCESS( if_test ); + + sc_in_clk clk; + + const sc_signal<bool>& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal_bool_vector& in_value4; + const sc_signal<int>& in_value5 ; + const sc_signal<bool>& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal_bool_vector& out_value4; + sc_signal<int>& out_value5; + sc_signal<bool>& out_valid; + + // + // Constructor + // + + if_test( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal_bool_vector& IN_VALUE4, + const sc_signal<int>& IN_VALUE5, + const sc_signal<bool>& IN_VALID, // Input port + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal_bool_vector& OUT_VALUE4, + sc_signal<int>& OUT_VALUE5, + sc_signal<bool>& OUT_VALID // Input port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/main.cpp new file mode 100644 index 000000000..bfad98b86 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/main.cpp @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "if_test.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal_bool_vector stim4; + sc_signal<int> stim5; + sc_signal<bool> input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal_bool_vector result4; + sc_signal<int> result5; + sc_signal<bool> output_valid; + + + + if_test if_test1 ( "process_body", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + stim5, + input_valid, + result1, + result2, + result3, + result4, + result5, + output_valid + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + stim5, + input_valid); + + display display1 ("display", + clock, + result1, + result2, + result3, + result4, + result5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/stimulus.cpp new file mode 100644 index 000000000..f45313792 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/stimulus.cpp @@ -0,0 +1,73 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + stim4.write(0); + stim5.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + stim4.write(i); + stim5.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " + << i << " stim4= " << i << " stim5= " << i << " " + << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(10); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/stimulus.h new file mode 100644 index 000000000..813c53e1b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/stimulus.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal_bool_vector& stim4; + sc_signal<int>& stim5; + sc_signal<bool>& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal<bool>& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal_bool_vector& STIM4, + sc_signal<int>& STIM5, + sc_signal<bool>& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + stim4(STIM4), + stim5(STIM5), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal<sc_bv<4> > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/display.cpp new file mode 100644 index 000000000..b0ac27b0c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/display.cpp @@ -0,0 +1,58 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up.
+ while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << " at " << sc_time_stamp() << endl; + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/display.h new file mode 100644 index 000000000..ea15269eb --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/display.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal<bool>& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal<bool>& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/golden/inlining.log b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/golden/inlining.log new file mode 100644 index 000000000..b5ed181e7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/golden/inlining.log @@ -0,0 +1,67 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 stim4= 0 2 ns +tmp1 my print 1 +tmp2 my print 0 +Display : 0001 0000 at 5 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 stim4= 1 13 ns +tmp1 my print 2 +tmp2 my print 1 +Display : 0010 0001 at 16 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 stim4= 2 24 ns +tmp1 my print 3 +tmp2 my print 2 +Display : 0011 0010 at 27 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 stim4= 3 35 ns +tmp1 my print 4 +tmp2 my print 3 +Display : 0100 0011 at 38 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 stim4= 4 46 ns +tmp1 my print 5 +tmp2 my print 4 +Display : 0101 0100 at 49 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 stim4= 5 57 ns +tmp1 my print 6 +tmp2 my print 5 +Display : 0110 0101 at 60 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 stim4= 6 68 ns +tmp1 my print 7 +tmp2 my print 6 +Display : 0111 0110 at 71 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 stim4= 7 79 ns +tmp1 my print 8 +tmp2 my print 7 +Display : 1000 0111 at 82 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 stim4= 8 90 ns +tmp1 my print 9 +tmp2 my print 8 +Display : 1001 1000 at 93 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 stim4= 9 101 ns +tmp1 my print 10 +tmp2 my print 9 +Display : 1010 1001 at 104 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 stim4= 10 112 ns +tmp1 my print 11 +tmp2 my print 10 +Display : 1011 1010 at 115 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 stim4= 11 123 ns +tmp1 my print 12 +tmp2 my print 11 +Display : 1100 1011 at 126 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 stim4= 12 134 ns +tmp1 my print 13 +tmp2 my print 12 +Display : 1101 1100 at 137 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 stim4= 13 145 ns +tmp1 my print 14 +tmp2 my print 13 +Display : 1110 1101 at 148 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 stim4= 14 156 ns +tmp1 my print 15 +tmp2 my print 14 +Display : 1111 1110 at 159 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 stim4= 15 167 ns +tmp1 my print 0 +tmp2 my print 15 +Display : 1111 1111 at 170 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.cpp new file mode 100644 index 000000000..232c6a8e2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.cpp @@ -0,0 +1,96 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + inlining.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "inlining.h" + +// list of defines +// #define MAXI(a,b) ((a)>(b)?(a):(b)) +#define MAXI(a,b) ( (a) > (b) ? sc_biguint<4>( a ) : sc_biguint<4>( b ) ) +#define clockedge wait() +#define my_print(a) cout << #a << " my print " << a << endl +#define my_if(a, b, c) if (a < 6 ) { \ + b = 0; \ + } else { \ + b = c; \ + }; + +void inlining::entry(){ + + sc_biguint<4> tmp1; + sc_biguint<4> tmp2; + sc_lv<4> tmp3; + sc_bv<4> tmp4; + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_valid.write(false); + clockedge; + } else clockedge; + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + + //execution + ++tmp1; + out_value1.write(MAXI(tmp1, tmp2)); + my_print(tmp1); + my_print(tmp2); + clockedge; + + my_if(tmp2, tmp3, tmp4); + out_value2.write(tmp4); + out_valid.write(true); + clockedge; + out_valid.write(false); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.f b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.f new file mode 100644 index 000000000..4c51c0531 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.f @@ -0,0 +1,4 @@ +inlining/main.cpp +inlining/stimulus.cpp +inlining/display.cpp +inlining/inlining.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.h new file mode 100644 index 000000000..457fd7048 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.h @@ -0,0 +1,93 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + inlining.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( inlining ) +{ + SC_HAS_PROCESS( inlining ); + + sc_in_clk clk; + + const sc_signal<bool>& reset ; + const sc_signal_bool_vector& in_value1 ; + const sc_signal_bool_vector& in_value2 ; + const sc_signal_bool_vector& in_value3 ; + const sc_signal_bool_vector& in_value4 ; + const sc_signal<bool>& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal<bool>& out_valid; + + // + // Constructor + // + + inlining( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal<bool>& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal_bool_vector& IN_VALUE4, + const sc_signal<bool>& IN_VALID, // Input port + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal<bool>& OUT_VALID // Input port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_valid (OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + // + void entry (); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/main.cpp new file mode 100644 index 000000000..89a428293 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/main.cpp @@ -0,0 +1,92 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "inlining.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal<bool> reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal_bool_vector stim4; + sc_signal<bool> input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal<bool> output_valid; + + + + inlining inlining1 ( + "process_body", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + input_valid, + result1, + result2, + output_valid + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + input_valid + ); + + display display1 ("display", + clock, + result1, + result2, + output_valid + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/stimulus.cpp new file mode 100644 index 000000000..2e897dacc --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/stimulus.cpp @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + stim4.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + stim4.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " + << i << " stim4= " << i << " " + << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(10); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/stimulus.h new file mode 100644 index 000000000..a82afff4c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/stimulus.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal<bool>& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal_bool_vector& stim4; + sc_signal<bool>& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal<bool>& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal_bool_vector& STIM4, + sc_signal<bool>& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + stim4(STIM4), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF |