diff options
Diffstat (limited to 'src/systemc/tests/systemc/misc/communication/channel')
19 files changed, 2066 insertions, 0 deletions
diff --git a/src/systemc/tests/systemc/misc/communication/channel/aggregate/golden/rgb.log b/src/systemc/tests/systemc/misc/communication/channel/aggregate/golden/rgb.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/aggregate/golden/rgb.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/communication/channel/aggregate/rgb.cpp b/src/systemc/tests/systemc/misc/communication/channel/aggregate/rgb.cpp new file mode 100644 index 000000000..d7ae1aaa8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/aggregate/rgb.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + rgb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "rgb.h" + +ostream& +operator<<(ostream& os, struct rgb_t &r) +{ + os << r.red << " " << r.green << " " << r.blue << endl; + return os; +} + +void sc_trace(sc_trace_file* tf,const rgb_t& s, const std::string& NAME) { + sc_trace(tf, s.red, NAME + ".red"); + sc_trace(tf, s.green, NAME + ".green"); + sc_trace(tf, s.blue, NAME + ".blue"); +} + + +void some_process::entry() +{ + rgb_t clin; + rgb_t clout; + + while(true) { + clin = color_in.read(); + clout = clin; + clout.red >>= 1; + clout.green >>=2; + clout.blue <<= 1; + color_out.write(clout); + wait(); + + } +} + +int sc_main(int ac, char* av[]) +{ + sc_fifo<rgb_t> in; + sc_fifo<rgb_t> out; + + sc_clock clk("CLK"); + + some_process foo("FOO", clk, in, out); + + sc_start(1000, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/communication/channel/aggregate/rgb.h b/src/systemc/tests/systemc/misc/communication/channel/aggregate/rgb.h new file mode 100644 index 000000000..38d63ed7f --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/aggregate/rgb.h @@ -0,0 +1,76 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + rgb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +struct rgb_t { + unsigned red; + unsigned green; + unsigned blue; + + inline bool operator == (const rgb_t& rhs) const + { + return (red == rhs.red && green == rhs.green && blue == rhs.blue); + } + + friend ostream& operator<<(ostream& os, struct rgb_t &r); +}; + +SC_MODULE( some_process ) +{ + SC_HAS_PROCESS( some_process ); + + sc_in_clk clk; + + sc_fifo<rgb_t>& color_in; + sc_fifo<rgb_t>& color_out; + + // Constructor + + some_process( sc_module_name NAME, + sc_clock& CLK, + sc_fifo<rgb_t>& COLOR_IN, + sc_fifo<rgb_t>& COLOR_OUT ) + : color_in(COLOR_IN),color_out(COLOR_OUT) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/communication/channel/dataflow/dataflow.cpp b/src/systemc/tests/systemc/misc/communication/channel/dataflow/dataflow.cpp new file mode 100644 index 000000000..29a1d3471 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/dataflow/dataflow.cpp @@ -0,0 +1,226 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dataflow.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( sawtooth ) +{ + SC_HAS_PROCESS( sawtooth ); + + sc_in_clk clk; + + sc_fifo<int>& out1; + sc_fifo<int>& out2; + + sawtooth( sc_module_name NAME, + sc_clock& CLK, + sc_fifo<int>& OUT1, + sc_fifo<int>& OUT2 ) + : out1(OUT1), out2(OUT2) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry(); +}; + +void sawtooth::entry() +{ + int index = 0; + while (true) { + wait(); + out1.write(index % 17); + out2.write(index % 17); + index++; + } +} + +SC_MODULE( delay ) +{ + SC_HAS_PROCESS( delay ); + + sc_in_clk clk; + + sc_fifo<int>& in; + sc_fifo<int>& out; + + delay( sc_module_name NAME, + sc_clock& CLK, + sc_fifo<int>& IN_, + sc_fifo<int>& OUT_ ) + : in(IN_), out(OUT_) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry(); +}; + +void delay::entry() +{ + int buffer = 0; + + while (true) { + out.write(buffer); + buffer = in.read(); + } +} + +SC_MODULE( downsample ) +{ + SC_HAS_PROCESS( downsample ); + + sc_in_clk clk; + + sc_fifo<int>& in; + sc_fifo<int>& out; + + downsample( sc_module_name NAME, + sc_clock& CLK, + sc_fifo<int>& IN_, + sc_fifo<int>& OUT_ ) + : in(IN_), out(OUT_) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry(); +}; + +void downsample::entry() +{ + int temp; + while (true) { + temp = in.read(); + temp = in.read(); + out.write(temp); + } +} + +SC_MODULE( upsample ) +{ + SC_HAS_PROCESS( upsample ); + + sc_in_clk clk; + + sc_fifo<int>& in; + sc_fifo<int>& out; + + upsample( sc_module_name NAME, + sc_clock& CLK, + sc_fifo<int>& IN_, + sc_fifo<int>& OUT_ ) + : in(IN_), out(OUT_) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry(); +}; + +void upsample::entry() +{ + while(true) { + out.write(in.read()); + out.write(0); + } +} + +SC_MODULE( adder ) +{ + SC_HAS_PROCESS( adder ); + + sc_in_clk clk; + + sc_fifo<int>& a; + sc_fifo<int>& b; + + adder( sc_module_name NAME, + sc_clock& CLK, + sc_fifo<int>& A, + sc_fifo<int>& B ) + : a(A), b(B) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry(); +}; + +void adder::entry() +{ + while(true) { + int tmp = a.read() + b.read(); + cout << "Sum = " << tmp << endl; + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_fifo<int> st1("ST1", 2), st2("ST2", 2); + sc_fifo<int> a1("A1", 2), a2("A2", 2), a3("A3", 2); + sc_fifo<int> b1("B1", 2), b2("B2", 2), b3("B3", 2); + + sc_clock clock("CLOCK"); + + sawtooth ST("TB1", clock, st1, st2); + + delay D1("D1", clock, st1, a1); + downsample DN1("DN1", clock, a1, a2); + upsample UP1("UP1", clock, a2, a3); + + downsample DN2("DN2", clock, st2, b1); + upsample UP2("UP2", clock, b1, b2); + delay D2("D2", clock, b2, b3); + + adder A ("A", clock, a3, b3); + + sc_start(100, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/communication/channel/dataflow/golden/dataflow.log b/src/systemc/tests/systemc/misc/communication/channel/dataflow/golden/dataflow.log new file mode 100644 index 000000000..b7e0044cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/dataflow/golden/dataflow.log @@ -0,0 +1,101 @@ +SystemC Simulation +Sum = 0 +Sum = 1 +Sum = 2 +Sum = 3 +Sum = 4 +Sum = 5 +Sum = 6 +Sum = 7 +Sum = 8 +Sum = 9 +Sum = 10 +Sum = 11 +Sum = 12 +Sum = 13 +Sum = 14 +Sum = 15 +Sum = 16 +Sum = 0 +Sum = 1 +Sum = 2 +Sum = 3 +Sum = 4 +Sum = 5 +Sum = 6 +Sum = 7 +Sum = 8 +Sum = 9 +Sum = 10 +Sum = 11 +Sum = 12 +Sum = 13 +Sum = 14 +Sum = 15 +Sum = 16 +Sum = 0 +Sum = 1 +Sum = 2 +Sum = 3 +Sum = 4 +Sum = 5 +Sum = 6 +Sum = 7 +Sum = 8 +Sum = 9 +Sum = 10 +Sum = 11 +Sum = 12 +Sum = 13 +Sum = 14 +Sum = 15 +Sum = 16 +Sum = 0 +Sum = 1 +Sum = 2 +Sum = 3 +Sum = 4 +Sum = 5 +Sum = 6 +Sum = 7 +Sum = 8 +Sum = 9 +Sum = 10 +Sum = 11 +Sum = 12 +Sum = 13 +Sum = 14 +Sum = 15 +Sum = 16 +Sum = 0 +Sum = 1 +Sum = 2 +Sum = 3 +Sum = 4 +Sum = 5 +Sum = 6 +Sum = 7 +Sum = 8 +Sum = 9 +Sum = 10 +Sum = 11 +Sum = 12 +Sum = 13 +Sum = 14 +Sum = 15 +Sum = 16 +Sum = 0 +Sum = 1 +Sum = 2 +Sum = 3 +Sum = 4 +Sum = 5 +Sum = 6 +Sum = 7 +Sum = 8 +Sum = 9 +Sum = 10 +Sum = 11 +Sum = 12 +Sum = 13 +Sum = 14 diff --git a/src/systemc/tests/systemc/misc/communication/channel/hshake1/golden/hshake1.log b/src/systemc/tests/systemc/misc/communication/channel/hshake1/golden/hshake1.log new file mode 100644 index 000000000..a1f8a6efe --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/hshake1/golden/hshake1.log @@ -0,0 +1,203 @@ +SystemC Simulation +Proc2::Done is 1 +Done is 1 +Input is 0 +Proc2::Input is 0 +Input is 1 +Proc2::Input is 1 +Input is 2 +Proc2::Input is 2 +Input is 3 +Proc2::Input is 3 +Input is 4 +Proc2::Input is 4 +Input is 5 +Proc2::Input is 5 +Input is 6 +Proc2::Input is 6 +Input is 7 +Proc2::Input is 7 +Input is 8 +Proc2::Input is 8 +Input is 9 +Proc2::Input is 9 +Input is 10 +Proc2::Input is 10 +Input is 11 +Proc2::Input is 11 +Input is 12 +Proc2::Input is 12 +Input is 13 +Proc2::Input is 13 +Input is 14 +Proc2::Input is 14 +Input is 15 +Proc2::Input is 15 +Input is 16 +Proc2::Input is 16 +Input is 17 +Proc2::Input is 17 +Input is 18 +Proc2::Input is 18 +Input is 19 +Proc2::Input is 19 +Input is 20 +Proc2::Input is 20 +Input is 21 +Proc2::Input is 21 +Input is 22 +Proc2::Input is 22 +Input is 23 +Proc2::Input is 23 +Input is 24 +Proc2::Input is 24 +Input is 25 +Proc2::Input is 25 +Input is 26 +Proc2::Input is 26 +Input is 27 +Proc2::Input is 27 +Input is 28 +Proc2::Input is 28 +Input is 29 +Proc2::Input is 29 +Input is 30 +Proc2::Input is 30 +Input is 31 +Proc2::Input is 31 +Input is 32 +Proc2::Input is 32 +Input is 33 +Proc2::Input is 33 +Input is 34 +Proc2::Input is 34 +Input is 35 +Proc2::Input is 35 +Input is 36 +Proc2::Input is 36 +Input is 37 +Proc2::Input is 37 +Input is 38 +Proc2::Input is 38 +Input is 39 +Proc2::Input is 39 +Input is 40 +Proc2::Input is 40 +Input is 41 +Proc2::Input is 41 +Input is 42 +Proc2::Input is 42 +Input is 43 +Proc2::Input is 43 +Input is 44 +Proc2::Input is 44 +Input is 45 +Proc2::Input is 45 +Input is 46 +Proc2::Input is 46 +Input is 47 +Proc2::Input is 47 +Input is 48 +Proc2::Input is 48 +Input is 49 +Proc2::Input is 49 +Input is 50 +Proc2::Input is 50 +Input is 51 +Proc2::Input is 51 +Input is 52 +Proc2::Input is 52 +Input is 53 +Proc2::Input is 53 +Input is 54 +Proc2::Input is 54 +Input is 55 +Proc2::Input is 55 +Input is 56 +Proc2::Input is 56 +Input is 57 +Proc2::Input is 57 +Input is 58 +Proc2::Input is 58 +Input is 59 +Proc2::Input is 59 +Input is 60 +Proc2::Input is 60 +Input is 61 +Proc2::Input is 61 +Input is 62 +Proc2::Input is 62 +Input is 63 +Proc2::Input is 63 +Input is 64 +Proc2::Input is 64 +Input is 65 +Proc2::Input is 65 +Input is 66 +Proc2::Input is 66 +Input is 67 +Proc2::Input is 67 +Input is 68 +Proc2::Input is 68 +Input is 69 +Proc2::Input is 69 +Input is 70 +Proc2::Input is 70 +Input is 71 +Proc2::Input is 71 +Input is 72 +Proc2::Input is 72 +Input is 73 +Proc2::Input is 73 +Input is 74 +Proc2::Input is 74 +Input is 75 +Proc2::Input is 75 +Input is 76 +Proc2::Input is 76 +Input is 77 +Proc2::Input is 77 +Input is 78 +Proc2::Input is 78 +Input is 79 +Proc2::Input is 79 +Input is 80 +Proc2::Input is 80 +Input is 81 +Proc2::Input is 81 +Input is 82 +Proc2::Input is 82 +Input is 83 +Proc2::Input is 83 +Input is 84 +Proc2::Input is 84 +Input is 85 +Proc2::Input is 85 +Input is 86 +Proc2::Input is 86 +Input is 87 +Proc2::Input is 87 +Input is 88 +Proc2::Input is 88 +Input is 89 +Proc2::Input is 89 +Input is 90 +Proc2::Input is 90 +Input is 91 +Proc2::Input is 91 +Input is 92 +Proc2::Input is 92 +Input is 93 +Proc2::Input is 93 +Input is 94 +Proc2::Input is 94 +Input is 95 +Proc2::Input is 95 +Input is 96 +Proc2::Input is 96 +Input is 97 +Proc2::Input is 97 +Input is 98 +Proc2::Input is 98 +Input is 99 +Proc2::Input is 99 diff --git a/src/systemc/tests/systemc/misc/communication/channel/hshake1/hshake1.cpp b/src/systemc/tests/systemc/misc/communication/channel/hshake1/hshake1.cpp new file mode 100644 index 000000000..a990b86d3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/hshake1/hshake1.cpp @@ -0,0 +1,131 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + hshake1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + + sc_fifo<int>& in; + sc_fifo<bool>& done; + sc_fifo<int>& out; + sc_fifo<bool>& ready; + + // Constructor + proc1 ( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo<int>& IN_, + sc_fifo<bool>& DONE, + sc_fifo<int>& OUT_, + sc_fifo<bool>& READY ) + : in(IN_), done(DONE), out(OUT_), ready(READY) + { + clk(CLOCK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + ready.write(1); + bool done_ = done.read(); + cout << "Done is " << done_ << endl; + for (int i=0; i < 100; i++) { + out.write(i); + int in_ = in.read(); + cout << "Input is " << in_ << endl; + } + ready.write(0); + } +}; + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + + sc_fifo<int>& in; + sc_fifo<bool>& done; + sc_fifo<int>& out; + sc_fifo<bool>& ready; + + // Constructor + proc2 ( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo<int>& IN_, + sc_fifo<bool>& DONE, + sc_fifo<int>& OUT_, + sc_fifo<bool>& READY ) + : in(IN_), done(DONE), out(OUT_), ready(READY) + { + clk(CLOCK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + bool done_ = done.read(); + cout << "Proc2::Done is " << done_ << endl; + ready.write(1); + for (int i=0; i < 100; i++) { + out.write(i); + int in_ = in.read(); + cout << "Proc2::Input is " << in_ << endl; + } + ready.write(0); + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_fifo<bool> a; + sc_fifo<bool> b; + sc_fifo<int> c("C", 10); + // sc_fifo<int> d("D", 2); + sc_fifo<int> d("D", 1); + + sc_clock clock("CLK", 20, SC_NS); + + proc1 p1("P1", clock, c, a, d, b); + proc2 p2("P2", clock, d, b, c, a); + + sc_start(1000, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/communication/channel/hshake2/golden/hshake2.log b/src/systemc/tests/systemc/misc/communication/channel/hshake2/golden/hshake2.log new file mode 100644 index 000000000..a1f8a6efe --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/hshake2/golden/hshake2.log @@ -0,0 +1,203 @@ +SystemC Simulation +Proc2::Done is 1 +Done is 1 +Input is 0 +Proc2::Input is 0 +Input is 1 +Proc2::Input is 1 +Input is 2 +Proc2::Input is 2 +Input is 3 +Proc2::Input is 3 +Input is 4 +Proc2::Input is 4 +Input is 5 +Proc2::Input is 5 +Input is 6 +Proc2::Input is 6 +Input is 7 +Proc2::Input is 7 +Input is 8 +Proc2::Input is 8 +Input is 9 +Proc2::Input is 9 +Input is 10 +Proc2::Input is 10 +Input is 11 +Proc2::Input is 11 +Input is 12 +Proc2::Input is 12 +Input is 13 +Proc2::Input is 13 +Input is 14 +Proc2::Input is 14 +Input is 15 +Proc2::Input is 15 +Input is 16 +Proc2::Input is 16 +Input is 17 +Proc2::Input is 17 +Input is 18 +Proc2::Input is 18 +Input is 19 +Proc2::Input is 19 +Input is 20 +Proc2::Input is 20 +Input is 21 +Proc2::Input is 21 +Input is 22 +Proc2::Input is 22 +Input is 23 +Proc2::Input is 23 +Input is 24 +Proc2::Input is 24 +Input is 25 +Proc2::Input is 25 +Input is 26 +Proc2::Input is 26 +Input is 27 +Proc2::Input is 27 +Input is 28 +Proc2::Input is 28 +Input is 29 +Proc2::Input is 29 +Input is 30 +Proc2::Input is 30 +Input is 31 +Proc2::Input is 31 +Input is 32 +Proc2::Input is 32 +Input is 33 +Proc2::Input is 33 +Input is 34 +Proc2::Input is 34 +Input is 35 +Proc2::Input is 35 +Input is 36 +Proc2::Input is 36 +Input is 37 +Proc2::Input is 37 +Input is 38 +Proc2::Input is 38 +Input is 39 +Proc2::Input is 39 +Input is 40 +Proc2::Input is 40 +Input is 41 +Proc2::Input is 41 +Input is 42 +Proc2::Input is 42 +Input is 43 +Proc2::Input is 43 +Input is 44 +Proc2::Input is 44 +Input is 45 +Proc2::Input is 45 +Input is 46 +Proc2::Input is 46 +Input is 47 +Proc2::Input is 47 +Input is 48 +Proc2::Input is 48 +Input is 49 +Proc2::Input is 49 +Input is 50 +Proc2::Input is 50 +Input is 51 +Proc2::Input is 51 +Input is 52 +Proc2::Input is 52 +Input is 53 +Proc2::Input is 53 +Input is 54 +Proc2::Input is 54 +Input is 55 +Proc2::Input is 55 +Input is 56 +Proc2::Input is 56 +Input is 57 +Proc2::Input is 57 +Input is 58 +Proc2::Input is 58 +Input is 59 +Proc2::Input is 59 +Input is 60 +Proc2::Input is 60 +Input is 61 +Proc2::Input is 61 +Input is 62 +Proc2::Input is 62 +Input is 63 +Proc2::Input is 63 +Input is 64 +Proc2::Input is 64 +Input is 65 +Proc2::Input is 65 +Input is 66 +Proc2::Input is 66 +Input is 67 +Proc2::Input is 67 +Input is 68 +Proc2::Input is 68 +Input is 69 +Proc2::Input is 69 +Input is 70 +Proc2::Input is 70 +Input is 71 +Proc2::Input is 71 +Input is 72 +Proc2::Input is 72 +Input is 73 +Proc2::Input is 73 +Input is 74 +Proc2::Input is 74 +Input is 75 +Proc2::Input is 75 +Input is 76 +Proc2::Input is 76 +Input is 77 +Proc2::Input is 77 +Input is 78 +Proc2::Input is 78 +Input is 79 +Proc2::Input is 79 +Input is 80 +Proc2::Input is 80 +Input is 81 +Proc2::Input is 81 +Input is 82 +Proc2::Input is 82 +Input is 83 +Proc2::Input is 83 +Input is 84 +Proc2::Input is 84 +Input is 85 +Proc2::Input is 85 +Input is 86 +Proc2::Input is 86 +Input is 87 +Proc2::Input is 87 +Input is 88 +Proc2::Input is 88 +Input is 89 +Proc2::Input is 89 +Input is 90 +Proc2::Input is 90 +Input is 91 +Proc2::Input is 91 +Input is 92 +Proc2::Input is 92 +Input is 93 +Proc2::Input is 93 +Input is 94 +Proc2::Input is 94 +Input is 95 +Proc2::Input is 95 +Input is 96 +Proc2::Input is 96 +Input is 97 +Proc2::Input is 97 +Input is 98 +Proc2::Input is 98 +Input is 99 +Proc2::Input is 99 diff --git a/src/systemc/tests/systemc/misc/communication/channel/hshake2/hshake2.cpp b/src/systemc/tests/systemc/misc/communication/channel/hshake2/hshake2.cpp new file mode 100644 index 000000000..232512f32 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/hshake2/hshake2.cpp @@ -0,0 +1,130 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + hshake2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + + sc_fifo<int>& in; + sc_fifo<bool>& done; + sc_fifo<int>& out; + sc_fifo<bool>& ready; + + // Constructor + proc1( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo<int>& IN_, + sc_fifo<bool>& DONE, + sc_fifo<int>& OUT_, + sc_fifo<bool>& READY ) + : in(IN_), done(DONE), out(OUT_), ready(READY) + { + clk(CLOCK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + ready.write(1); + bool done_ = done.read(); + cout << "Done is " << done_ << endl; + for (int i=0; i < 100; i++) { + out.write(i); + int in_ = in.read(); + cout << "Input is " << in_ << endl; + } + ready.write(0); + } +}; + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + + sc_fifo<int>& in; + sc_fifo<bool>& done; + sc_fifo<int>& out; + sc_fifo<bool>& ready; + + // Constructor + proc2( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo<int>& IN_, + sc_fifo<bool>& DONE, + sc_fifo<int>& OUT_, + sc_fifo<bool>& READY) + : in(IN_), done(DONE), out(OUT_), ready(READY) + { + clk(CLOCK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + ready.write(1); + bool done_ = done.read(); + cout << "Proc2::Done is " << done_ << endl; + for (int i=0; i < 100; i++) { + out.write(i); + int in_ = in.read(); + cout << "Proc2::Input is " << in_ << endl; + } + ready.write(0); + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_fifo<bool> a(3); + sc_fifo<bool> b(10); + sc_fifo<int> c("C", 10); + sc_fifo<int> d("D", 2); + + sc_clock clock("CLK", 20, SC_NS); + + proc1 p1("P1", clock, c, a, d, b); + proc2 p2("P2", clock, d, b, c, a); + + sc_start(1000, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/communication/channel/hwsw/golden/hwsw.log b/src/systemc/tests/systemc/misc/communication/channel/hwsw/golden/hwsw.log new file mode 100644 index 000000000..6ff1eec49 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/hwsw/golden/hwsw.log @@ -0,0 +1,13 @@ +SystemC Simulation +A = 206, B = 69, C = 91, D = 137, SUM = 366 +A = 92, B = 157, C = 173, D = -65, SUM = 422 +A = 69, B = 108, C = 53, D = -39, SUM = 230 +A = 179, B = 109, C = 39, D = 70, SUM = 327 +A = 108, B = 176, C = 132, D = -68, SUM = 416 +A = 150, B = 15, C = 133, D = 135, SUM = 298 +A = 147, B = 21, C = 193, D = 126, SUM = 361 +A = 86, B = 217, C = 207, D = -131, SUM = 510 +A = 83, B = 120, C = 240, D = -37, SUM = 443 +A = 242, B = 85, C = 213, D = 157, SUM = 540 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/communication/channel/hwsw/hwsw.cpp b/src/systemc/tests/systemc/misc/communication/channel/hwsw/hwsw.cpp new file mode 100644 index 000000000..9c19a17f0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/hwsw/hwsw.cpp @@ -0,0 +1,181 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + hwsw.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +static int randa[] = { 3278, 3420, 1349, 13491, 9234028, 234902, + 13971, 1498710, 1348179, 1389810, 190101, 92384 }; +static int randb[] = { 1349, 20893, 2090092, 8813, 87472, 73231, + 59413, 42713, 3192, 45653, 565643, 78931, 573231 }; +static int randc[] = { 3419, 82093, 9013, 1831, 74372, 233861, + 421313, 47823, 3902192, 93245653, 77565643, 77234, 10192 }; + +SC_MODULE( adder_sub ) +{ + SC_HAS_PROCESS( adder_sub ); + + sc_in_clk clk; + + sc_fifo<int>& Sa; //input + sc_fifo<int>& Sb; //input + sc_fifo<int>& Sc; //input + sc_fifo<int>& Sd; //output + sc_fifo<int>& Ssum; //output + + // constructor + adder_sub( sc_module_name NAME, + sc_clock& CLK, + sc_fifo<int>& SA, + sc_fifo<int>& SB, + sc_fifo<int>& SC, + sc_fifo<int>& SD, + sc_fifo<int>& SSUM ) + : Sa(SA), Sb(SB), Sc(SC), Sd(SD), Ssum(SSUM) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + // Process functionality in member function below + void entry(); +}; + + +int add(int a, int b) +{ + return (a + b); +} + +void adder_sub::entry() +{ + int sum; + int a, b, c, d; + + while (true) { + // Read inputs + a = Sa.read(); + b = Sb.read(); + c = Sc.read(); + + // Perform the computation. + sum = add(a, b); + sum = add(sum, c); + d = a - b; + + // Write outputs + Ssum.write(sum); + Sd.write(d); + // Loop back to do { wait(); } while . + } + +} // end of entry function + +SC_MODULE( testbench ) +{ + SC_HAS_PROCESS( testbench ); + + sc_in_clk clk; + + sc_fifo<int>& Ssum; //input + sc_fifo<int>& Sdiff; //input + sc_fifo<int>& Sa; //output + sc_fifo<int>& Sb; //output + sc_fifo<int>& Sc; //output + + // constructor + testbench( sc_module_name NAME, + sc_clock& CLK, + sc_fifo<int>& SSUM, + sc_fifo<int>& SDIFF, + sc_fifo<int>& SA, + sc_fifo<int>& SB, + sc_fifo<int>& SC ) + : Ssum(SSUM), Sdiff(SDIFF), Sa(SA), Sb(SB), Sc(SC) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + // Process functionality in member function below + void entry(); +}; + + +void testbench::entry() +{ + int a, b, c, d; + int sum; + int i; + char buf[BUFSIZ]; + + for (i=0; i < 10; i++) { + a = randa[i % (sizeof(randa)/sizeof(randa[0]))] & 0x0ff; + b = randb[i % (sizeof(randb)/sizeof(randb[0]))] & 0x0ff; + c = randc[i % (sizeof(randc)/sizeof(randc[0]))] & 0x0ff; + + Sa.write(a); + Sb.write(b); + Sc.write(c); + sum = Ssum.read(); + d = Sdiff.read(); + // printf("A = %d, B = %d, C = %d, D = %d, SUM = %d\n", a, b, c, d, sum); + sprintf(buf, "A = %d, B = %d, C = %d, D = %d, SUM = %d\n", a, b, c, d, sum); + cout << buf; + } + sc_stop(); + +} // end of entry function + +// Main routine + +int sc_main(int ac, char *av[]) +{ + sc_fifo<int> a; + sc_fifo<int> b; + sc_fifo<int> c; + sc_fifo<int> d; + sc_fifo<int> sum; + sc_clock clock("Clock", 10, SC_NS, 0.5, 0, SC_NS, 0); + + testbench T("TB", clock, sum, d, a, b, c); + adder_sub AS("AS", clock, a, b, c, d, sum); + + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/communication/channel/test1/golden/test1.log b/src/systemc/tests/systemc/misc/communication/channel/test1/golden/test1.log new file mode 100644 index 000000000..223bed689 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/test1/golden/test1.log @@ -0,0 +1,25 @@ +SystemC Simulation +Proc1:: Waiting 10 cycles before reading +Proc2:: Write +Proc2:: Write completed +Proc2:: Wait 10 cycles before write +Proc1:: Wait completed +Proc1:: Read. Value = 1 +Proc1:: Read +Proc2:: Wait completed +Proc2:: Write +Proc2:: Write Completed +Proc2:: Write +Proc2:: Write Completed +Proc2:: Loop start +Proc1:: Read completed. Value = 2 +Proc1:: Read. Value = 3 +Proc1:: Loop start +Proc1:: Read. Value = 4 +Proc1:: Read. Value = 5 +Proc1:: Read. Value = 6 +Proc1:: Read. Value = 7 +Proc1:: Read. Value = 8 +Proc1:: Read. Value = 9 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/communication/channel/test1/test1.cpp b/src/systemc/tests/systemc/misc/communication/channel/test1/test1.cpp new file mode 100644 index 000000000..7e3253f43 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/test1/test1.cpp @@ -0,0 +1,135 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + + sc_fifo<int>& in; + + // Constructor + proc1( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo<int>& IN_ ) + : in(IN_) + { + clk( CLOCK ); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + int val; + cout << "Proc1:: Waiting 10 cycles before reading\n"; + wait( 10 ); + cout << "Proc1:: Wait completed\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + cout << "Proc1:: Read\n"; + val = in.read(); + cout << "Proc1:: Read completed. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + cout << "Proc1:: Loop start\n"; + int i = 1; + while (true) { + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + wait( i ); + i += 3; + } + } +}; + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + + sc_fifo<int>& out; + + // Constructor + proc2( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo<int>& OUT_ ) + : out(OUT_) + { + clk( CLOCK ); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + cout << "Proc2:: Write\n"; + out.write(1); + cout << "Proc2:: Write completed\n"; + cout << "Proc2:: Wait 10 cycles before write\n"; + wait( 10 ); + cout << "Proc2:: Wait completed\n"; + cout << "Proc2:: Write\n"; + out.write(2); + cout << "Proc2:: Write Completed\n"; + cout << "Proc2:: Write\n"; + out.write(3); + cout << "Proc2:: Write Completed\n"; + cout << "Proc2:: Loop start\n"; + for (int i=4; i<10; i++) { + out.write(i); + wait( i + 2 ); + } + sc_stop(); + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_fifo<int> c("C"); + + sc_clock clock("CLK", 20, SC_NS); + + proc1 p1("P1", clock, c); + proc2 p2("P2", clock, c); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/communication/channel/test2/golden/test2.log b/src/systemc/tests/systemc/misc/communication/channel/test2/golden/test2.log new file mode 100644 index 000000000..48875d567 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/test2/golden/test2.log @@ -0,0 +1,22 @@ +SystemC Simulation +Proc1:: Waiting 10 cycles before reading +Proc2:: Write +Proc2:: Write completed +Proc2:: Wait 10 cycles before write +Proc1:: Wait completed +Proc1:: Read. Value = 1 +Proc1:: Read +Proc2:: Wait completed +Proc2:: Write +Proc2:: Write Completed +Proc2:: Write +Proc2:: Write Completed +Proc2:: Loop start +Proc1:: Read completed. Value = 2 +Proc1:: Read. Value = 3 +Proc1:: Loop start +Proc1:: Read. Value = 4 +Proc1:: Read. Value = 6 +Proc1:: Read. Value = 9 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/communication/channel/test2/test2.cpp b/src/systemc/tests/systemc/misc/communication/channel/test2/test2.cpp new file mode 100644 index 000000000..d8b893b86 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/test2/test2.cpp @@ -0,0 +1,137 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + + sc_fifo<int>& in; + + // Constructor + proc1( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo<int>& IN_ ) + : in(IN_) + { + clk( CLOCK ); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + int val; + cout << "Proc1:: Waiting 10 cycles before reading\n"; + wait( 10 ); + cout << "Proc1:: Wait completed\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + cout << "Proc1:: Read\n"; + val = in.read(); + cout << "Proc1:: Read completed. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + cout << "Proc1:: Loop start\n"; + int i = 1; + int j; + while (true) { + j = in; + cout << "Proc1:: Read. Value = " << j << "\n"; + if (in > 5 && in < 7) cout << "Proc1:: Special value 6 read\n"; + wait( i ); + i += 3; + } + } +}; + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + + sc_fifo<int>& out; + + // Constructor + proc2( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo<int>& OUT_ ) + : out(OUT_) + { + clk( CLOCK ); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + cout << "Proc2:: Write\n"; + out = 1; + cout << "Proc2:: Write completed\n"; + cout << "Proc2:: Wait 10 cycles before write\n"; + wait( 10 ); + cout << "Proc2:: Wait completed\n"; + cout << "Proc2:: Write\n"; + out = 2; + cout << "Proc2:: Write Completed\n"; + cout << "Proc2:: Write\n"; + out = 3; + cout << "Proc2:: Write Completed\n"; + cout << "Proc2:: Loop start\n"; + for (int i=4; i<10; i++) { + out = i; + wait( i + 2 ); + } + sc_stop(); + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_fifo<int> c("C"); + + sc_clock clock("CLK", 20, SC_NS); + + proc1 p1("P1", clock, c); + proc2 p2("P2", clock, c); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/communication/channel/test3/golden/test3.log b/src/systemc/tests/systemc/misc/communication/channel/test3/golden/test3.log new file mode 100644 index 000000000..6153bb185 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/test3/golden/test3.log @@ -0,0 +1,48 @@ +SystemC Simulation +Proc1:: Waiting 10 cycles before reading +Proc2:: Write 8 values +Proc2:: Written one value +Proc2:: Written one value +Proc2:: Written one value +Proc2:: Written one value +Proc2:: Written one value +Proc1:: Wait completed +Proc1:: Read. Value = 1 +Proc1:: Read. Value = 2 +Proc1:: Read. Value = 3 +Proc1:: Waiting 10 cycles before reading +Proc2:: Written one value +Proc2:: Written one value +Proc2:: Written one value +Proc2:: Write completed +Proc2:: Wait 30 cycles before write +Proc1:: Wait completed +Proc1:: Read. Value = 4 +Proc1:: Read. Value = 5 +Proc1:: Read. Value = 6 +Proc1:: Read. Value = 7 +Proc1:: Read. Value = 8 +Proc2:: Wait completed +Proc2:: Write +Proc2:: Write Completed +Proc2:: Loop start +Proc1:: Read. Value = 9 +Proc1:: Loop start +Proc1:: Read. Value = 4 +Proc1:: Read. Value = 5 +Proc1:: Read. Value = 6 +Proc1:: Read. Value = 7 +Proc1:: Read. Value = 8 +Proc1:: Read. Value = 9 +Proc1:: Read. Value = 10 +Proc1:: Read. Value = 11 +Proc1:: Read. Value = 12 +Proc1:: Read. Value = 13 +Proc1:: Read. Value = 14 +Proc1:: Read. Value = 15 +Proc1:: Read. Value = 16 +Proc1:: Read. Value = 17 +Proc1:: Read. Value = 18 +Proc1:: Read. Value = 19 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/communication/channel/test3/test3.cpp b/src/systemc/tests/systemc/misc/communication/channel/test3/test3.cpp new file mode 100644 index 000000000..ad5262db8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/test3/test3.cpp @@ -0,0 +1,150 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + + sc_fifo<int>& in; + + // Constructor + proc1( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo<int>& IN_ ) + : in(IN_) + { + clk( CLOCK ); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + int val; + cout << "Proc1:: Waiting 10 cycles before reading\n"; + wait( 10 ); + cout << "Proc1:: Wait completed\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + cout << "Proc1:: Waiting 10 cycles before reading\n"; + wait( 10 ); + cout << "Proc1:: Wait completed\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + cout << "Proc1:: Loop start\n"; + int i = 1; + while (true) { + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + wait( i ); + i += 3; + } + } +}; + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + + sc_fifo<int>& out; + + // Constructor + proc2( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo<int>& OUT_ ) + : out(OUT_) + { + clk( CLOCK ); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + cout << "Proc2:: Write 8 values\n"; + for (int i = 1; i<=8; i++) { + out.write(i); + cout << "Proc2:: Written one value\n"; + } + cout << "Proc2:: Write completed\n"; + cout << "Proc2:: Wait 30 cycles before write\n"; + wait( 30 ); + cout << "Proc2:: Wait completed\n"; + cout << "Proc2:: Write\n"; + out.write(9); + cout << "Proc2:: Write Completed\n"; + cout << "Proc2:: Loop start\n"; + for (int i=4; i<20; i++) { + out.write(i); + wait( i + 2 ); + } + wait( 150 * clk ); + sc_stop(); + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_fifo<int> c("C", 5); + + sc_clock clock("CLK", 20, SC_NS); + + proc1 p1("P1", clock, c); + proc2 p2("P2", clock, c); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/communication/channel/test4/golden/test4.log b/src/systemc/tests/systemc/misc/communication/channel/test4/golden/test4.log new file mode 100644 index 000000000..6153bb185 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/test4/golden/test4.log @@ -0,0 +1,48 @@ +SystemC Simulation +Proc1:: Waiting 10 cycles before reading +Proc2:: Write 8 values +Proc2:: Written one value +Proc2:: Written one value +Proc2:: Written one value +Proc2:: Written one value +Proc2:: Written one value +Proc1:: Wait completed +Proc1:: Read. Value = 1 +Proc1:: Read. Value = 2 +Proc1:: Read. Value = 3 +Proc1:: Waiting 10 cycles before reading +Proc2:: Written one value +Proc2:: Written one value +Proc2:: Written one value +Proc2:: Write completed +Proc2:: Wait 30 cycles before write +Proc1:: Wait completed +Proc1:: Read. Value = 4 +Proc1:: Read. Value = 5 +Proc1:: Read. Value = 6 +Proc1:: Read. Value = 7 +Proc1:: Read. Value = 8 +Proc2:: Wait completed +Proc2:: Write +Proc2:: Write Completed +Proc2:: Loop start +Proc1:: Read. Value = 9 +Proc1:: Loop start +Proc1:: Read. Value = 4 +Proc1:: Read. Value = 5 +Proc1:: Read. Value = 6 +Proc1:: Read. Value = 7 +Proc1:: Read. Value = 8 +Proc1:: Read. Value = 9 +Proc1:: Read. Value = 10 +Proc1:: Read. Value = 11 +Proc1:: Read. Value = 12 +Proc1:: Read. Value = 13 +Proc1:: Read. Value = 14 +Proc1:: Read. Value = 15 +Proc1:: Read. Value = 16 +Proc1:: Read. Value = 17 +Proc1:: Read. Value = 18 +Proc1:: Read. Value = 19 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/communication/channel/test4/test4.cpp b/src/systemc/tests/systemc/misc/communication/channel/test4/test4.cpp new file mode 100644 index 000000000..79aa179e4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/test4/test4.cpp @@ -0,0 +1,153 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test4.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + + sc_fifo<int>& in; + + // Constructor + proc1( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo<int>& IN_ ) + : in(IN_) + { + clk( CLOCK ); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + int val; + cout << "Proc1:: Waiting 10 cycles before reading\n"; + wait( 10 ); + cout << "Proc1:: Wait completed\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + cout << "Proc1:: Waiting 10 cycles before reading\n"; + wait( 10 ); + cout << "Proc1:: Wait completed\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + cout << "Proc1:: Loop start\n"; + int i = 1; + while (true) { + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + wait( i ); + i += 3; + } + } +}; + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + + sc_fifo<int>& out; + + // Constructor + proc2( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo<int>& OUT_ ) + : out(OUT_) + { + clk( CLOCK ); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + cout << "Proc2:: Write 8 values\n"; + for (int i = 1; i<=8; i++) { + out.write(i); + cout << "Proc2:: Written one value\n"; + } + cout << "Proc2:: Write completed\n"; + cout << "Proc2:: Wait 30 cycles before write\n"; + wait( 30 ); + cout << "Proc2:: Wait completed\n"; + cout << "Proc2:: Write\n"; + out.write(9); + cout << "Proc2:: Write Completed\n"; + cout << "Proc2:: Loop start\n"; + for (int i=4; i<20; i++) { + out.write(i); + wait( i + 2 ); + } + wait( 150 ); + sc_stop(); + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_fifo<int> c("C", 5); + + sc_clock clock("CLK", 20, SC_NS); + + proc1 p1("P1", clock, c); + proc2 p2("P2", clock, c); + + // sc_trace_file *tf = sc_create_vcd_trace_file("systemc"); + // sc_trace(tf, c, "MyChannel", 3); + + sc_start(); + + return 0; +} |