diff options
Diffstat (limited to 'src/systemc/tests/systemc/misc/sim/prime_do_while/main.cpp')
-rw-r--r-- | src/systemc/tests/systemc/misc/sim/prime_do_while/main.cpp | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/main.cpp b/src/systemc/tests/systemc/misc/sim/prime_do_while/main.cpp new file mode 100644 index 000000000..501d2988e --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/main.cpp @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Main Filename: main.cc */ + /***************************************/ + +#include "reset.h" +#include "display.h" +#include "prime_numgen.h" + +int +sc_main(int ac, char *av[]) +{ + +// Signal Instantiation + sc_signal<bool> reset ("reset"); + signal_bool_vector prime ("prime"); + +// Clock Instantiation + sc_clock clk ("CLK", 6, SC_NS, 0.5, 10, SC_NS, false); // 167 Mhz + +// Process Instantiation + prime_numgen D1 ("D1", clk, reset, prime); + + resetp T1 ("T1", clk, reset); + + displayp T2 ("T2", clk, prime); + +// Simulation Run Control + sc_start(); + return 0; +} |