diff options
Diffstat (limited to 'src/systemc/tests/systemc/misc/sim/prime_do_while')
10 files changed, 530 insertions, 0 deletions
diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/common.h b/src/systemc/tests/systemc/misc/sim/prime_do_while/common.h new file mode 100644 index 000000000..803cbc085 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<16> bool_vector; +typedef sc_signal<bool_vector> signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/display.cpp b/src/systemc/tests/systemc/misc/sim/prime_do_while/display.cpp new file mode 100644 index 000000000..14193f053 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/display.cpp @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: display.cc */ + /*****************************************/ + +#include "display.h" + +void displayp::entry() +{ + bool_vector last_prime; + + while (true) { + + last_prime = prime.read(); + wait(); + + do { + wait(); + } while (prime.read() == last_prime); + + cout << prime.read().to_uint() << endl; + + if (prime.read().to_uint() > 40) { + sc_stop(); + } + } +} diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/display.h b/src/systemc/tests/systemc/misc/sim/prime_do_while/display.h new file mode 100644 index 000000000..49ded855c --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/display.h @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Interface Filename: display.h */ + /***************************************/ + +#include "common.h" + +SC_MODULE( displayp ) +{ + SC_HAS_PROCESS( displayp ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector& prime; + + // Constructor + displayp ( sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector& PRIME ) + : prime(PRIME) + { + clk(TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/golden/prime_do_while.log b/src/systemc/tests/systemc/misc/sim/prime_do_while/golden/prime_do_while.log new file mode 100644 index 000000000..009089bfc --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/golden/prime_do_while.log @@ -0,0 +1,12 @@ +SystemC Simulation +1 +2 +Terminating process T1.entry +5 +11 +17 +23 +31 +41 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/main.cpp b/src/systemc/tests/systemc/misc/sim/prime_do_while/main.cpp new file mode 100644 index 000000000..501d2988e --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/main.cpp @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Main Filename: main.cc */ + /***************************************/ + +#include "reset.h" +#include "display.h" +#include "prime_numgen.h" + +int +sc_main(int ac, char *av[]) +{ + +// Signal Instantiation + sc_signal<bool> reset ("reset"); + signal_bool_vector prime ("prime"); + +// Clock Instantiation + sc_clock clk ("CLK", 6, SC_NS, 0.5, 10, SC_NS, false); // 167 Mhz + +// Process Instantiation + prime_numgen D1 ("D1", clk, reset, prime); + + resetp T1 ("T1", clk, reset); + + displayp T2 ("T2", clk, prime); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/prime_do_while.f b/src/systemc/tests/systemc/misc/sim/prime_do_while/prime_do_while.f new file mode 100644 index 000000000..21f1f34c4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/prime_do_while.f @@ -0,0 +1,4 @@ +prime_do_while/reset.cpp +prime_do_while/display.cpp +prime_do_while/prime_numgen.cpp +prime_do_while/main.cpp diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/prime_numgen.cpp b/src/systemc/tests/systemc/misc/sim/prime_do_while/prime_numgen.cpp new file mode 100644 index 000000000..3b20cb2a5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/prime_numgen.cpp @@ -0,0 +1,82 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + prime_numgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/******************************************************************************/ +/*** Prime Number Generator ***/ +/*** Implementation Filename: prime_numgen.cc ***/ +/******************************************************************************/ + +#include "prime_numgen.h" + +void prime_numgen::entry() +{ + + static unsigned int p2 = 1, + p3 = 0, + p5 = 0, + p7 = 0, + p11 = 0, + p13 = 0, + p17 = 0, + p19 = 0, + p23 = 0, + p29 = 0; + + while (true) { + + if (p2 && !p3 && !p5 && !p7 && !p11 && !p13 && !p17 && !p19 && !p23 && !p29) + { + prime.write(p2); + wait(); + } + + if (p7 && p13) { p7--, p13--, p17++; } + else if (p5 && p17) { p5--, p17--, p2++, p3++, p13++; } + else if (p3 && p17) { p3--, p17--, p19++; } + else if (p2 && p19) { p2--, p19--, p23++; } + else if (p3 && p11) { p3--, p11--, p29++; } + else if (p29) { p29--, p7++, p11++; } + else if (p23) { p23--, p5++, p19++; } + else if (p19) { p19--, p7++, p11++; } + else if (p17) { p17 = 0; } + else if (p13) { p13--, p11++; } + else if (p11) { p11--, p13++; } + else if (p2 && p7) { p2--, p7--, p3++, p5++; } + else if (p2) { p2--, p3++, p5++; } + else { p5++, p11++; } + } +} diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/prime_numgen.h b/src/systemc/tests/systemc/misc/sim/prime_do_while/prime_numgen.h new file mode 100644 index 000000000..c6a4c74d7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/prime_numgen.h @@ -0,0 +1,72 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + prime_numgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Interface Filename: prime_numgen.h */ + /***************************************/ + +#include "common.h" + +SC_MODULE( prime_numgen ) +{ + SC_HAS_PROCESS( prime_numgen ); + + sc_in_clk clk; + + // Inputs + const sc_signal<bool>& reset; + // Outputs + signal_bool_vector& prime; + + // Constructor + prime_numgen (sc_module_name NAME, + sc_clock& TICK, + const sc_signal<bool>& RESET, + signal_bool_vector& PRIME ) + + : + reset (RESET), + prime (PRIME) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,false); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/reset.cpp b/src/systemc/tests/systemc/misc/sim/prime_do_while/reset.cpp new file mode 100644 index 000000000..43e3ce8d8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/reset.cpp @@ -0,0 +1,53 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + reset.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Implementation Filename: reset.cc */ + /***************************************/ + +#include "reset.h" + +void resetp::entry() +{ + reset.write(0); + wait(3); + + reset.write(1); + wait(); + + halt(); +} diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/reset.h b/src/systemc/tests/systemc/misc/sim/prime_do_while/reset.h new file mode 100644 index 000000000..2b755b030 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/reset.h @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + reset.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Interface Filename: reset.h */ + /***************************************/ + +#include "common.h" + +SC_MODULE( resetp ) +{ + SC_HAS_PROCESS( resetp ); + + sc_in_clk clk; + + // Outputs + sc_signal<bool>& reset; + + // Constructor + resetp (sc_module_name NAME, + sc_clock& TICK, + sc_signal<bool>& RESET ) + + : + reset (RESET) + + { + clk(TICK); + SC_CTHREAD( entry, clk.neg() ); + } + + void entry(); +}; |