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-rw-r--r--src/systemc/tests/systemc/misc/user_guide/async_chn/test1/golden/test1.log19
-rw-r--r--src/systemc/tests/systemc/misc/user_guide/async_chn/test1/test1.cpp111
-rw-r--r--src/systemc/tests/systemc/misc/user_guide/async_chn/test2/golden/test2.log25
-rw-r--r--src/systemc/tests/systemc/misc/user_guide/async_chn/test2/test2.cpp124
-rw-r--r--src/systemc/tests/systemc/misc/user_guide/async_chn/test3/golden/test3.log25
-rw-r--r--src/systemc/tests/systemc/misc/user_guide/async_chn/test3/test3.cpp114
6 files changed, 418 insertions, 0 deletions
diff --git a/src/systemc/tests/systemc/misc/user_guide/async_chn/test1/golden/test1.log b/src/systemc/tests/systemc/misc/user_guide/async_chn/test1/golden/test1.log
new file mode 100644
index 000000000..0dd89eb5e
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/user_guide/async_chn/test1/golden/test1.log
@@ -0,0 +1,19 @@
+SystemC Simulation
+Value sent = 10 Value read = 129
+Value sent = 129 Value read = 10
+Value sent = 11 Value read = 130
+Value sent = 130 Value read = 11
+Value sent = 12 Value read = 131
+Value sent = 131 Value read = 12
+Value sent = 13 Value read = 132
+Value sent = 132 Value read = 13
+Value sent = 14 Value read = 133
+Value sent = 133 Value read = 14
+Value sent = 15 Value read = 134
+Value sent = 134 Value read = 15
+Value sent = 16 Value read = 135
+Value sent = 135 Value read = 16
+Value sent = 17 Value read = 136
+Value sent = 136 Value read = 17
+Value sent = 18 Value read = 137
+Value sent = 137 Value read = 18
diff --git a/src/systemc/tests/systemc/misc/user_guide/async_chn/test1/test1.cpp b/src/systemc/tests/systemc/misc/user_guide/async_chn/test1/test1.cpp
new file mode 100644
index 000000000..5667d470c
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/user_guide/async_chn/test1/test1.cpp
@@ -0,0 +1,111 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ test1.cpp --
+
+ Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+#include "systemc.h"
+
+SC_MODULE( p1 )
+{
+ SC_HAS_PROCESS( p1 );
+
+ sc_fifo<int>& a;
+ sc_fifo<int>& b;
+ sc_signal<bool>& clock;
+
+ int init;
+
+ p1(sc_module_name name,
+ sc_fifo<int>& A,
+ sc_fifo<int>& B,
+ sc_signal<bool>& CLOCK,
+ int INIT)
+ : a(A), b(B), clock(CLOCK)
+ {
+ init = INIT;
+ SC_THREAD( entry );
+ sensitive << clock;
+ // sensitive << b;
+ }
+
+ void entry() {
+ wait();
+ int i = init;
+ wait();
+ while (true) {
+ a.write(i);
+ int j = b.read();
+ cout << "Value sent = " << i << " Value read = " << j << endl;
+ wait(); i++;
+ }
+ }
+};
+
+int sc_main(int ac, char *av[])
+{
+ sc_fifo<int> a(2), b(2);
+ sc_signal<bool> clock;
+
+ p1 Proc1("Proc1", a, b, clock, 10);
+ p1 Proc2("Proc2", b, a, clock, 129);
+
+ sc_start(0, SC_NS);
+ clock = 1;
+ sc_start(1, SC_NS);
+ clock = 0;
+ sc_start(1, SC_NS);
+
+ clock = 1;
+ sc_start(1, SC_NS);
+ clock = 0;
+ sc_start(1, SC_NS);
+
+ clock = 1;
+ sc_start(1, SC_NS);
+ clock = 0;
+ sc_start(1, SC_NS);
+
+ clock = 1;
+ sc_start(1, SC_NS);
+ clock = 0;
+ sc_start(1, SC_NS);
+
+ clock = 1;
+ sc_start(1, SC_NS);
+ clock = 0;
+ sc_start(1, SC_NS);
+
+ return 0;
+}
diff --git a/src/systemc/tests/systemc/misc/user_guide/async_chn/test2/golden/test2.log b/src/systemc/tests/systemc/misc/user_guide/async_chn/test2/golden/test2.log
new file mode 100644
index 000000000..17f483f04
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/user_guide/async_chn/test2/golden/test2.log
@@ -0,0 +1,25 @@
+SystemC Simulation
+Value sent = 129 Value read = 10
+Value sent = 10 Value read = 129
+Value sent = 130 Value read = 11
+Value sent = 11 Value read = 130
+Value sent = 131 Value read = 12
+Value sent = 12 Value read = 131
+Value sent = 132 Value read = 13
+Value sent = 13 Value read = 132
+Value sent = 133 Value read = 14
+Value sent = 14 Value read = 133
+Value sent = 134 Value read = 15
+Value sent = 15 Value read = 134
+Value sent = 135 Value read = 16
+Value sent = 16 Value read = 135
+Value sent = 136 Value read = 17
+Value sent = 17 Value read = 136
+Value sent = 137 Value read = 18
+Value sent = 18 Value read = 137
+Value sent = 138 Value read = 19
+Value sent = 19 Value read = 138
+Value sent = 139 Value read = 20
+Value sent = 20 Value read = 139
+Value sent = 140 Value read = 21
+Value sent = 21 Value read = 140
diff --git a/src/systemc/tests/systemc/misc/user_guide/async_chn/test2/test2.cpp b/src/systemc/tests/systemc/misc/user_guide/async_chn/test2/test2.cpp
new file mode 100644
index 000000000..ef1b237bc
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/user_guide/async_chn/test2/test2.cpp
@@ -0,0 +1,124 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ test2.cpp --
+
+ Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+#include "systemc.h"
+
+SC_MODULE( p1 )
+{
+ SC_HAS_PROCESS( p1 );
+
+ sc_fifo<int>& a;
+ sc_fifo<int>& b;
+ sc_in<bool> clk;
+
+ int init;
+
+ p1(sc_module_name name,
+ sc_fifo<int>& A,
+ sc_fifo<int>& B,
+ sc_signal_in_if<bool>& CLK,
+ int INIT)
+ : a(A), b(B)
+ {
+ clk(CLK);
+ init = INIT;
+ SC_THREAD( entry );
+ sensitive << clk;
+ // sensitive << b;
+ }
+
+ void entry() {
+ wait();
+ int i = init;
+ wait();
+ while (true) {
+ a.write(i);
+ int j = b.read();
+ cout << "Value sent = " << i << " Value read = " << j << endl;
+ wait(); i++;
+ }
+ }
+};
+
+SC_MODULE( p2 )
+{
+ SC_HAS_PROCESS( p2 );
+
+ sc_in_clk clk;
+
+ sc_fifo<int>& a;
+ sc_fifo<int>& b;
+
+ int init;
+
+ p2 (sc_module_name name,
+ sc_clock& CLK,
+ sc_fifo<int>& A,
+ sc_fifo<int>& B,
+ int INIT)
+ : a(A), b(B)
+ {
+ clk(CLK);
+ SC_CTHREAD( entry, clk.pos() );
+ init = INIT;
+ }
+
+ void entry() {
+ int i = init;
+ wait();
+ while (true) {
+ a.write(i);
+ int j = b.read();
+ cout << "Value sent = " << i << " Value read = " << j << endl;
+ wait(); i++;
+ }
+ }
+};
+
+int sc_main(int ac, char *av[])
+{
+ sc_fifo<int> a(2), b(2);
+ sc_clock clock("Clock", 20, SC_NS);
+
+ p1 Proc1("Proc1", a, b, clock, 10);
+ p2 Proc2("Proc2", clock, b, a, 129);
+
+ // sc_start(500, SC_NS);
+ sc_start(250, SC_NS);
+
+ return 0;
+}
diff --git a/src/systemc/tests/systemc/misc/user_guide/async_chn/test3/golden/test3.log b/src/systemc/tests/systemc/misc/user_guide/async_chn/test3/golden/test3.log
new file mode 100644
index 000000000..b42cb2d1a
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/user_guide/async_chn/test3/golden/test3.log
@@ -0,0 +1,25 @@
+SystemC Simulation
+Value sent = 129
+ Value read = 129
+Value sent = 130
+ Value read = 130
+Value sent = 131
+ Value read = 131
+Value sent = 132
+ Value read = 132
+Value sent = 133
+ Value read = 133
+Value sent = 134
+ Value read = 134
+Value sent = 135
+ Value read = 135
+Value sent = 136
+ Value read = 136
+Value sent = 137
+ Value read = 137
+Value sent = 138
+ Value read = 138
+Value sent = 139
+ Value read = 139
+Value sent = 140
+ Value read = 140
diff --git a/src/systemc/tests/systemc/misc/user_guide/async_chn/test3/test3.cpp b/src/systemc/tests/systemc/misc/user_guide/async_chn/test3/test3.cpp
new file mode 100644
index 000000000..f60a2d9cd
--- /dev/null
+++ b/src/systemc/tests/systemc/misc/user_guide/async_chn/test3/test3.cpp
@@ -0,0 +1,114 @@
+/*****************************************************************************
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ test3.cpp --
+
+ Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
+
+ *****************************************************************************/
+
+/*****************************************************************************
+
+ MODIFICATION LOG - modifiers, enter your name, affiliation, date and
+ changes you are making here.
+
+ Name, Affiliation, Date:
+ Description of Modification:
+
+ *****************************************************************************/
+
+#include "systemc.h"
+
+SC_MODULE( p1 )
+{
+ SC_HAS_PROCESS( p1 );
+
+ sc_fifo<int>& b;
+
+ int init;
+
+ p1(sc_module_name name,
+ sc_fifo<int>& B,
+ int INIT)
+ : b(B)
+ {
+ init = INIT;
+ SC_THREAD( entry );
+ // sensitive << b;
+ }
+
+ void entry() {
+ // wait();
+ int i = init;
+ // wait();
+ while (true) {
+ int j = b.read();
+ cout << " Value read = " << j << endl;
+ // wait();
+ }
+ }
+};
+
+SC_MODULE( p2 )
+{
+ SC_HAS_PROCESS( p2 );
+
+ sc_in<bool> clk;
+
+ sc_fifo<int>& a;
+
+ int init;
+
+ p2 (sc_module_name name,
+ sc_signal_in_if<bool>& CLK,
+ sc_fifo<int>& A,
+ int INIT)
+ : a(A)
+ {
+ clk(CLK);
+ SC_CTHREAD( entry, clk.pos() );
+ init = INIT;
+ }
+
+ void entry() {
+ int i = init;
+ wait();
+ while (true) {
+ a.write(i);
+ cout << "Value sent = " << i << endl;
+ wait(); i++;
+ }
+ }
+};
+
+int sc_main(int ac, char *av[])
+{
+ sc_fifo<int> a(2), b(2);
+ sc_clock clock("Clock", 20, SC_NS);
+
+ p1 Proc1("Proc1", a, 10);
+ p2 Proc2("Proc2", clock, a, 129);
+
+ // sc_start(500, SC_NS);
+ sc_start(250, SC_NS);
+
+ return 0;
+}