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-rw-r--r--src/arch/arm/isa.cc31
-rw-r--r--src/arch/arm/isa/insts/misc.isa4
-rw-r--r--src/arch/arm/miscregs.cc34
3 files changed, 34 insertions, 35 deletions
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index 4f1ef91ec..5f8378e09 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -729,30 +729,30 @@ ISA::readMiscReg(int misc_reg, ThreadContext *tc)
return getArchTimer(tc, tc->cpuId())->control();
// PL1 phys. timer, secure
// AArch64
- case MISCREG_CNTPS_CVAL_EL1:
- case MISCREG_CNTPS_TVAL_EL1:
- case MISCREG_CNTPS_CTL_EL1:
+ // case MISCREG_CNTPS_CVAL_EL1:
+ // case MISCREG_CNTPS_TVAL_EL1:
+ // case MISCREG_CNTPS_CTL_EL1:
// PL2 phys. timer, non-secure
// AArch32
- case MISCREG_CNTHCTL:
- case MISCREG_CNTHP_CVAL:
- case MISCREG_CNTHP_TVAL:
- case MISCREG_CNTHP_CTL:
+ // case MISCREG_CNTHCTL:
+ // case MISCREG_CNTHP_CVAL:
+ // case MISCREG_CNTHP_TVAL:
+ // case MISCREG_CNTHP_CTL:
// AArch64
- case MISCREG_CNTHCTL_EL2:
- case MISCREG_CNTHP_CVAL_EL2:
- case MISCREG_CNTHP_TVAL_EL2:
- case MISCREG_CNTHP_CTL_EL2:
+ // case MISCREG_CNTHCTL_EL2:
+ // case MISCREG_CNTHP_CVAL_EL2:
+ // case MISCREG_CNTHP_TVAL_EL2:
+ // case MISCREG_CNTHP_CTL_EL2:
// Virtual timer
// AArch32
- case MISCREG_CNTV_CVAL:
- case MISCREG_CNTV_TVAL:
- case MISCREG_CNTV_CTL:
+ // case MISCREG_CNTV_CVAL:
+ // case MISCREG_CNTV_TVAL:
+ // case MISCREG_CNTV_CTL:
// AArch64
// case MISCREG_CNTV_CVAL_EL2:
// case MISCREG_CNTV_TVAL_EL2:
// case MISCREG_CNTV_CTL_EL2:
- panic("Generic Timer register not implemented\n");
+ default:
break;
}
@@ -1902,7 +1902,6 @@ ISA::setMiscReg(int misc_reg, const MiscReg &val, ThreadContext *tc)
// case MISCREG_CNTV_CVAL_EL2:
// case MISCREG_CNTV_TVAL_EL2:
// case MISCREG_CNTV_CTL_EL2:
- panic("Generic Timer register not implemented\n");
break;
}
}
diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa
index 678a125fb..76fc1fbed 100644
--- a/src/arch/arm/isa/insts/misc.isa
+++ b/src/arch/arm/isa/insts/misc.isa
@@ -851,7 +851,7 @@ let {{
// if we're in non secure PL1 mode then we can trap regargless of whether
// the register is accessable, in other modes we trap if only if the register
// IS accessable.
- if (!canRead & !(hypTrap & !inUserMode(Cpsr) & !inSecureState(Scr, Cpsr))) {
+ if (!canRead && !(hypTrap && !inUserMode(Cpsr) && !inSecureState(Scr, Cpsr))) {
return new UndefinedInstruction(machInst, false, mnemonic);
}
if (hypTrap) {
@@ -906,7 +906,7 @@ let {{
// if we're in non secure PL1 mode then we can trap regargless of whether
// the register is accessable, in other modes we trap if only if the register
// IS accessable.
- if (!canRead & !(hypTrap & !inUserMode(Cpsr) & !inSecureState(Scr, Cpsr))) {
+ if (!canRead && !(hypTrap && !inUserMode(Cpsr) && !inSecureState(Scr, Cpsr))) {
return new UndefinedInstruction(machInst, false, mnemonic);
}
if (hypTrap) {
diff --git a/src/arch/arm/miscregs.cc b/src/arch/arm/miscregs.cc
index 6fa304938..313ac18f9 100644
--- a/src/arch/arm/miscregs.cc
+++ b/src/arch/arm/miscregs.cc
@@ -714,15 +714,15 @@ bitset<NUM_MISCREG_INFOS> miscRegInfo[NUM_MISCREGS] = {
// MISCREG_CNTP_CTL_S
bitset<NUM_MISCREG_INFOS>(string("0011001100111110000")),
// MISCREG_CNTV_TVAL
- bitset<NUM_MISCREG_INFOS>(string("1111111111111100001")),
+ bitset<NUM_MISCREG_INFOS>(string("0111100000000000000")),
// MISCREG_CNTV_CTL
- bitset<NUM_MISCREG_INFOS>(string("1111111111111100001")),
+ bitset<NUM_MISCREG_INFOS>(string("0111100000000000000")),
// MISCREG_CNTHCTL
- bitset<NUM_MISCREG_INFOS>(string("1100110000000000001")),
+ bitset<NUM_MISCREG_INFOS>(string("0100100000000000000")),
// MISCREG_CNTHP_TVAL
- bitset<NUM_MISCREG_INFOS>(string("1100110000000000001")),
+ bitset<NUM_MISCREG_INFOS>(string("0100100000000000000")),
// MISCREG_CNTHP_CTL
- bitset<NUM_MISCREG_INFOS>(string("1100110000000000001")),
+ bitset<NUM_MISCREG_INFOS>(string("0100100000000000000")),
// MISCREG_IL1DATA0
bitset<NUM_MISCREG_INFOS>(string("1111111111000000000")),
// MISCREG_IL1DATA1
@@ -762,11 +762,11 @@ bitset<NUM_MISCREG_INFOS> miscRegInfo[NUM_MISCREGS] = {
// MISCREG_CNTP_CVAL_S
bitset<NUM_MISCREG_INFOS>(string("0011001100111110000")),
// MISCREG_CNTV_CVAL
- bitset<NUM_MISCREG_INFOS>(string("1111111111111100001")),
+ bitset<NUM_MISCREG_INFOS>(string("0111100000000000000")),
// MISCREG_CNTVOFF
bitset<NUM_MISCREG_INFOS>(string("1100110000000000001")),
// MISCREG_CNTHP_CVAL
- bitset<NUM_MISCREG_INFOS>(string("1100110000000000001")),
+ bitset<NUM_MISCREG_INFOS>(string("0100100000000000000")),
// MISCREG_CPUMERRSR
bitset<NUM_MISCREG_INFOS>(string("1111111111000000000")),
// MISCREG_L2MERRSR
@@ -1258,11 +1258,11 @@ bitset<NUM_MISCREG_INFOS> miscRegInfo[NUM_MISCREGS] = {
// MISCREG_CNTP_CVAL_EL0
bitset<NUM_MISCREG_INFOS>(string("1111111111111100001")),
// MISCREG_CNTV_TVAL_EL0
- bitset<NUM_MISCREG_INFOS>(string("1111111111111100001")),
+ bitset<NUM_MISCREG_INFOS>(string("0111100000000000000")),
// MISCREG_CNTV_CTL_EL0
- bitset<NUM_MISCREG_INFOS>(string("1111111111111100001")),
+ bitset<NUM_MISCREG_INFOS>(string("0111100000000000000")),
// MISCREG_CNTV_CVAL_EL0
- bitset<NUM_MISCREG_INFOS>(string("1111111111111100001")),
+ bitset<NUM_MISCREG_INFOS>(string("0111100000000000000")),
// MISCREG_PMEVCNTR0_EL0
bitset<NUM_MISCREG_INFOS>(string("1111111111111100001")),
// MISCREG_PMEVCNTR1_EL0
@@ -1290,19 +1290,19 @@ bitset<NUM_MISCREG_INFOS> miscRegInfo[NUM_MISCREGS] = {
// MISCREG_CNTVOFF_EL2
bitset<NUM_MISCREG_INFOS>(string("1111110000000000001")),
// MISCREG_CNTHCTL_EL2
- bitset<NUM_MISCREG_INFOS>(string("1111110000000000001")),
+ bitset<NUM_MISCREG_INFOS>(string("0111100000000000000")),
// MISCREG_CNTHP_TVAL_EL2
- bitset<NUM_MISCREG_INFOS>(string("1111110000000000001")),
+ bitset<NUM_MISCREG_INFOS>(string("0111100000000000000")),
// MISCREG_CNTHP_CTL_EL2
- bitset<NUM_MISCREG_INFOS>(string("1111110000000000001")),
+ bitset<NUM_MISCREG_INFOS>(string("0111100000000000000")),
// MISCREG_CNTHP_CVAL_EL2
- bitset<NUM_MISCREG_INFOS>(string("1111110000000000001")),
+ bitset<NUM_MISCREG_INFOS>(string("0111100000000000000")),
// MISCREG_CNTPS_TVAL_EL1
- bitset<NUM_MISCREG_INFOS>(string("1111111111111100001")),
+ bitset<NUM_MISCREG_INFOS>(string("0111100000000000000")),
// MISCREG_CNTPS_CTL_EL1
- bitset<NUM_MISCREG_INFOS>(string("1111111111111100001")),
+ bitset<NUM_MISCREG_INFOS>(string("0111100000000000000")),
// MISCREG_CNTPS_CVAL_EL1
- bitset<NUM_MISCREG_INFOS>(string("1111111111111100001")),
+ bitset<NUM_MISCREG_INFOS>(string("0111100000000000000")),
// MISCREG_IL1DATA0_EL1
bitset<NUM_MISCREG_INFOS>(string("1111111111000000001")),
// MISCREG_IL1DATA1_EL1
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-17 15:23:59 +0000