diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/arm/isa/operands.isa | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa index dc54ec2d5..025f75755 100644 --- a/src/arch/arm/isa/operands.isa +++ b/src/arch/arm/isa/operands.isa @@ -129,9 +129,6 @@ let {{ def vectorRegElem(elem, ext = 'sf', zeroing = False): return (elem, ext, zeroing) - def floatReg(idx): - return ('FloatReg', 'sf', idx, 'IsFloating', srtNormal) - def intReg(idx): return ('IntReg', 'uw', idx, 'IsInteger', srtNormal, maybePCRead, maybePCWrite) |