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-rw-r--r--src/cpu/exetrace.cc92
-rw-r--r--src/cpu/exetrace.hh1
-rw-r--r--src/cpu/m5legion_interface.h50
-rw-r--r--src/python/m5/main.py3
4 files changed, 146 insertions, 0 deletions
diff --git a/src/cpu/exetrace.cc b/src/cpu/exetrace.cc
index 9d85311bb..80b144e85 100644
--- a/src/cpu/exetrace.cc
+++ b/src/cpu/exetrace.cc
@@ -33,6 +33,8 @@
#include <fstream>
#include <iomanip>
+#include <sys/ipc.h>
+#include <sys/shm.h>
#include "arch/regfile.hh"
#include "base/loader/symtab.hh"
@@ -44,10 +46,15 @@
//XXX This is temporary
#include "arch/isa_specific.hh"
+#include "cpu/m5legion_interface.h"
using namespace std;
using namespace TheISA;
+namespace Trace {
+SharedData *shared_data = NULL;
+}
+
////////////////////////////////////////////////////////////////////////
//
// Methods for the InstRecord object
@@ -60,6 +67,7 @@ Trace::InstRecord::dump(ostream &outs)
if (flags[PRINT_REG_DELTA])
{
#if THE_ISA == SPARC_ISA
+#if 0
//Don't print what happens for each micro-op, just print out
//once at the last op, and for regular instructions.
if(!staticInst->isMicroOp() || staticInst->isLastMicroOp())
@@ -121,6 +129,7 @@ Trace::InstRecord::dump(ostream &outs)
outs << endl;
}
#endif
+#endif
}
else if (flags[INTEL_FORMAT]) {
#if FULL_SYSTEM
@@ -222,6 +231,65 @@ Trace::InstRecord::dump(ostream &outs)
//
outs << endl;
}
+ // Compare
+ if (flags[LEGION_LOCKSTEP])
+ {
+ bool compared = false;
+ bool diffPC = false;
+ bool diffInst = false;
+ bool diffRegs = false;
+
+ while (!compared) {
+ if (shared_data->flags == OWN_M5) {
+ if (shared_data->pc != PC)
+ diffPC = true;
+ if (shared_data->instruction != staticInst->machInst)
+ diffInst = true;
+ for (int i = 0; i < TheISA::NumIntRegs; i++) {
+ if (thread->readIntReg(i) != shared_data->intregs[i])
+ diffRegs = true;
+ }
+
+ if (diffPC || diffInst || diffRegs ) {
+ outs << "Differences found between M5 and Legion:";
+ if (diffPC)
+ outs << " PC";
+ if (diffInst)
+ outs << " Instruction";
+ if (diffRegs)
+ outs << " IntRegs";
+ outs << endl;
+
+ outs << "M5 PC: " << setw(20) << "0x" << hex << PC;
+ outs << "Legion PC: " << setw(20) << "0x" << hex <<
+ shared_data->pc << endl;
+
+
+
+ outs << "M5 Instruction: " << staticInst->machInst << "("
+ << staticInst->disassemble(PC, debugSymbolTable)
+ << ")" << "Legion Instruction: " <<
+ shared_data->instruction << "("
+ /*<< legionInst->disassemble(shared_data->pc,
+ debugSymbolTable)*/
+ << ")" << endl;
+
+ for (int i = 0; i < TheISA::NumIntRegs; i++) {
+ outs << setw(16) << "0x" << hex << thread->readIntReg(i)
+ << setw(16) << "0x" << hex << shared_data->intregs[i];
+
+ if (thread->readIntReg(i) != shared_data->intregs[i])
+ outs << "<--- Different";
+ outs << endl;
+ }
+ }
+
+ compared = true;
+ shared_data->flags = OWN_LEGION;
+ }
+ }
+
+ }
}
@@ -271,6 +339,9 @@ Param<bool> exe_trace_pc_symbol(&exeTraceParams, "pc_symbol",
"Use symbols for the PC if available", true);
Param<bool> exe_trace_intel_format(&exeTraceParams, "intel_format",
"print trace in intel compatible format", false);
+Param<bool> exe_trace_legion_lockstep(&exeTraceParams, "legion_lockstep",
+ "Compare sim state to legion state every cycle",
+ false);
Param<string> exe_trace_system(&exeTraceParams, "trace_system",
"print trace of which system (client or server)",
"client");
@@ -296,7 +367,28 @@ Trace::InstRecord::setParams()
flags[PRINT_REG_DELTA] = exe_trace_print_reg_delta;
flags[PC_SYMBOL] = exe_trace_pc_symbol;
flags[INTEL_FORMAT] = exe_trace_intel_format;
+ flags[LEGION_LOCKSTEP] = exe_trace_legion_lockstep;
trace_system = exe_trace_system;
+
+ // If were going to be in lockstep with Legion
+ // Setup shared memory, and get otherwise ready
+ if (flags[LEGION_LOCKSTEP]) {
+ int shmfd = shmget(getuid(), sizeof(SharedData), 0777);
+ if (shmfd < 0)
+ fatal("Couldn't get shared memory fd. Is Legion running?");
+
+ shared_data = (SharedData*)shmat(shmfd, NULL, SHM_RND);
+ if (shared_data == (SharedData*)-1)
+ fatal("Couldn't allocate shared memory");
+
+ if (shared_data->flags != OWN_M5)
+ fatal("Shared memory has invalid owner");
+
+ if (shared_data->version != VERSION)
+ fatal("Shared Data is wrong version! M5: %d Legion: %d", VERSION,
+ shared_data->version);
+
+ }
}
void
diff --git a/src/cpu/exetrace.hh b/src/cpu/exetrace.hh
index 02ea162f0..6562e5265 100644
--- a/src/cpu/exetrace.hh
+++ b/src/cpu/exetrace.hh
@@ -150,6 +150,7 @@ class InstRecord : public Record
PRINT_REG_DELTA,
PC_SYMBOL,
INTEL_FORMAT,
+ LEGION_LOCKSTEP,
NUM_BITS
};
diff --git a/src/cpu/m5legion_interface.h b/src/cpu/m5legion_interface.h
new file mode 100644
index 000000000..0fa0e7279
--- /dev/null
+++ b/src/cpu/m5legion_interface.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2006 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ */
+
+#include <unistd.h>
+
+#define VERSION 0xA1000001
+#define OWN_M5 0x000000AA
+#define OWN_LEGION 0x00000055
+
+/** !!! VVV Increment VERSION on change VVV !!! **/
+
+typedef struct {
+ uint32_t flags;
+ uint32_t version;
+
+ uint64_t pc;
+ uint64_t instruction;
+ uint64_t intregs[32];
+
+} SharedData;
+
+/** !!! ^^^ Increment VERSION on change ^^^ !!! **/
+
diff --git a/src/python/m5/main.py b/src/python/m5/main.py
index ccd6c5807..ef37f62ac 100644
--- a/src/python/m5/main.py
+++ b/src/python/m5/main.py
@@ -181,6 +181,8 @@ bool_option("print-cpseq", default=False,
help="Print correct path sequence numbers in trace output")
#bool_option("print-reg-delta", default=False,
# help="Print which registers changed to what in trace output")
+bool_option("legion-lock", default=False,
+ help="Compare simulator state with Legion simulator every cycle")
options = attrdict()
arguments = []
@@ -296,6 +298,7 @@ def main():
objects.ExecutionTrace.print_fetchseq = options.print_fetch_seq
objects.ExecutionTrace.print_cpseq = options.print_cpseq
#objects.ExecutionTrace.print_reg_delta = options.print_reg_delta
+ objects.ExecutionTrace.legion_lockstep = options.legion_lock
sys.argv = arguments
sys.path = [ os.path.dirname(sys.argv[0]) ] + sys.path
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-02 18:51:13 +0000