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-rw-r--r--src/arch/alpha/isa/decoder.isa3
-rw-r--r--src/sim/pseudo_inst.cc9
-rw-r--r--src/sim/pseudo_inst.hh1
3 files changed, 13 insertions, 0 deletions
diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa
index f057f00cc..67bc5c7a2 100644
--- a/src/arch/alpha/isa/decoder.isa
+++ b/src/arch/alpha/isa/decoder.isa
@@ -815,6 +815,9 @@ decode OPCODE default Unknown::unknown() {
0x07: rpns({{
R0 = PseudoInst::rpns(xc->tcBase());
}}, IsNonSpeculative, IsUnverifiable);
+ 0x09: wakeCPU({{
+ PseudoInst::wakeCPU(xc->tcBase(), R16);
+ }}, IsNonSpeculative, IsUnverifiable);
0x10: deprecated_ivlb({{
warn_once("Obsolete M5 ivlb instruction encountered.\n");
}});
diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc
index 130a2f0fe..f1cf2835d 100644
--- a/src/sim/pseudo_inst.cc
+++ b/src/sim/pseudo_inst.cc
@@ -138,6 +138,15 @@ rpns(ThreadContext *tc)
}
void
+wakeCPU(ThreadContext *tc, uint64_t cpuid)
+{
+ System *sys = tc->getSystemPtr();
+ ThreadContext *other_tc = sys->threadContexts[cpuid];
+ if (other_tc->status() == ThreadContext::Suspended)
+ other_tc->activate();
+}
+
+void
m5exit(ThreadContext *tc, Tick delay)
{
Tick when = curTick + delay * Clock::Int::ns;
diff --git a/src/sim/pseudo_inst.hh b/src/sim/pseudo_inst.hh
index 7d013eda7..30996fc3b 100644
--- a/src/sim/pseudo_inst.hh
+++ b/src/sim/pseudo_inst.hh
@@ -55,6 +55,7 @@ void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr);
#endif
uint64_t rpns(ThreadContext *tc);
+void wakeCPU(ThreadContext *tc, uint64_t cpuid);
void m5exit(ThreadContext *tc, Tick delay);
void resetstats(ThreadContext *tc, Tick delay, Tick period);
void dumpstats(ThreadContext *tc, Tick delay, Tick period);