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-rw-r--r--src/python/m5/main.py3
-rw-r--r--src/python/swig/debug.i7
-rw-r--r--src/sim/debug.cc17
-rw-r--r--src/sim/debug.hh7
-rw-r--r--src/sim/process.cc13
-rw-r--r--src/sim/system.cc6
6 files changed, 41 insertions, 12 deletions
diff --git a/src/python/m5/main.py b/src/python/m5/main.py
index dbabd9600..2bbd72152 100644
--- a/src/python/m5/main.py
+++ b/src/python/m5/main.py
@@ -102,6 +102,8 @@ add_option("--stats-file", metavar="FILE", default="m5stats.txt",
set_group("Debugging Options")
add_option("--debug-break", metavar="TIME[,TIME]", action='append', split=',',
help="Cycle to create a breakpoint")
+add_option("--remote-gdb-port", type='int', default=7000,
+ help="Remote gdb base port")
# Tracing options
set_group("Trace Options")
@@ -256,6 +258,7 @@ def main():
internal.stats.initText(options.stats_file)
# set debugging options
+ internal.debug.setRemoteGDBPort(options.remote_gdb_port)
for when in options.debug_break:
internal.debug.schedBreakCycle(int(when))
diff --git a/src/python/swig/debug.i b/src/python/swig/debug.i
index b542e9f82..1084d6936 100644
--- a/src/python/swig/debug.i
+++ b/src/python/swig/debug.i
@@ -31,16 +31,13 @@
%module debug
%{
-// include these files when compiling debug_wrap.cc
#include "sim/host.hh"
+#include "sim/debug.hh"
%}
%include "stdint.i"
%include "sim/host.hh"
-
-%inline %{
-extern void schedBreakCycle(Tick when);
-%}
+%include "sim/debug.hh"
%wrapper %{
// fix up module name to reflect the fact that it's inside the m5 package
diff --git a/src/sim/debug.cc b/src/sim/debug.cc
index b4f4cd9dc..36ac4efac 100644
--- a/src/sim/debug.cc
+++ b/src/sim/debug.cc
@@ -108,3 +108,20 @@ eventqDump()
mainEventQueue.dump();
}
+
+int remote_gdb_base_port = 7000;
+
+int
+getRemoteGDBPort()
+{
+ return remote_gdb_base_port;
+}
+
+// Set remote GDB base port. 0 means disable remote GDB.
+// Callable from python.
+void
+setRemoteGDBPort(int port)
+{
+ remote_gdb_base_port = port;
+}
+
diff --git a/src/sim/debug.hh b/src/sim/debug.hh
index 79792234b..937864e69 100644
--- a/src/sim/debug.hh
+++ b/src/sim/debug.hh
@@ -31,6 +31,13 @@
#ifndef __DEBUG_HH__
#define __DEBUG_HH__
+#include "sim/host.hh"
+
+void schedBreakCycle(Tick when);
void debug_break();
+int getRemoteGDBPort();
+// Remote gdb base port. 0 disables remote gdb.
+void setRemoteGDBPort(int port);
+
#endif // __DEBUG_HH__
diff --git a/src/sim/process.cc b/src/sim/process.cc
index 16037b2f4..046a6bf9b 100644
--- a/src/sim/process.cc
+++ b/src/sim/process.cc
@@ -46,6 +46,7 @@
#include "mem/translating_port.hh"
#include "params/Process.hh"
#include "params/LiveProcess.hh"
+#include "sim/debug.hh"
#include "sim/process.hh"
#include "sim/process_impl.hh"
#include "sim/stats.hh"
@@ -201,12 +202,14 @@ Process::registerThreadContext(ThreadContext *tc)
int myIndex = threadContexts.size();
threadContexts.push_back(tc);
- RemoteGDB *rgdb = new RemoteGDB(system, tc);
- GDBListener *gdbl = new GDBListener(rgdb, 7000 + myIndex);
- gdbl->listen();
- //gdbl->accept();
+ int port = getRemoteGDBPort();
+ if (port) {
+ RemoteGDB *rgdb = new RemoteGDB(system, tc);
+ GDBListener *gdbl = new GDBListener(rgdb, port + myIndex);
+ gdbl->listen();
- remoteGDB.push_back(rgdb);
+ remoteGDB.push_back(rgdb);
+ }
// return CPU number to caller
return myIndex;
diff --git a/src/sim/system.cc b/src/sim/system.cc
index 10b9b1217..803881539 100644
--- a/src/sim/system.cc
+++ b/src/sim/system.cc
@@ -42,6 +42,7 @@
#include "mem/physical.hh"
#include "sim/byteswap.hh"
#include "sim/system.hh"
+#include "sim/debug.hh"
#if FULL_SYSTEM
#include "arch/vtophys.hh"
#include "kern/kernel_stats.hh"
@@ -183,9 +184,10 @@ System::registerThreadContext(ThreadContext *tc, int id)
threadContexts[id] = tc;
numcpus++;
- if (rgdb_enable) {
+ int port = getRemoteGDBPort();
+ if (rgdb_enable && port) {
RemoteGDB *rgdb = new RemoteGDB(this, tc);
- GDBListener *gdbl = new GDBListener(rgdb, 7000 + id);
+ GDBListener *gdbl = new GDBListener(rgdb, port + id);
gdbl->listen();
/**
* Uncommenting this line waits for a remote debugger to