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-rw-r--r--src/python/m5/objects/BaseCPU.py2
-rw-r--r--src/sim/process.cc5
2 files changed, 3 insertions, 4 deletions
diff --git a/src/python/m5/objects/BaseCPU.py b/src/python/m5/objects/BaseCPU.py
index 4144397a6..7906156a2 100644
--- a/src/python/m5/objects/BaseCPU.py
+++ b/src/python/m5/objects/BaseCPU.py
@@ -6,7 +6,7 @@ from Bus import Bus
class BaseCPU(SimObject):
type = 'BaseCPU'
abstract = True
- mem = Param.MemObject("memory")
+ mem = Param.PhysicalMemory(Parent.any, "memory")
system = Param.System(Parent.any, "system object")
if build_env['FULL_SYSTEM']:
diff --git a/src/sim/process.cc b/src/sim/process.cc
index f989300a3..081a25976 100644
--- a/src/sim/process.cc
+++ b/src/sim/process.cc
@@ -319,9 +319,8 @@ LiveProcess::argsInit(int intSize, int pageSize)
int space_needed =
argv_array_size + envp_array_size + arg_data_size + env_data_size;
- // for SimpleScalar compatibility
- if (space_needed < 16384)
- space_needed = 16384;
+ if (space_needed < 32*1024)
+ space_needed = 32*1024;
// set bottom of stack
stack_min = stack_base - space_needed;