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-rw-r--r--src/arch/x86/isa/microops/limmop.isa6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/x86/isa/microops/limmop.isa b/src/arch/x86/isa/microops/limmop.isa
index 37180d7fa..ec68c36dc 100644
--- a/src/arch/x86/isa/microops/limmop.isa
+++ b/src/arch/x86/isa/microops/limmop.isa
@@ -142,12 +142,12 @@ def template MicroLimmOpConstructor {{
let {{
class LimmOp(X86Microop):
- def __init__(self, dest, imm):
+ def __init__(self, dest, imm, dataSize="env.dataSize"):
self.className = "Limm"
self.mnemonic = "limm"
self.dest = dest
self.imm = imm
- self.dataSize = "env.dataSize"
+ self.dataSize = dataSize
def getAllocator(self, *microFlags):
allocator = '''new %(class_name)s(machInst, mnemonic
@@ -165,7 +165,7 @@ let {{
let {{
# Build up the all register version of this micro op
iop = InstObjParams("limm", "Limm", 'X86MicroopBase',
- {"code" : "DestReg = imm;"})
+ {"code" : "DestReg = merge(DestReg, imm, dataSize);"})
header_output += MicroLimmOpDeclare.subst(iop)
decoder_output += MicroLimmOpConstructor.subst(iop)
decoder_output += MicroLimmOpDisassembly.subst(iop)