diff options
Diffstat (limited to 'src')
106 files changed, 203 insertions, 166 deletions
diff --git a/src/arch/alpha/process.cc b/src/arch/alpha/process.cc index be286e30e..4e9f1e9dd 100644 --- a/src/arch/alpha/process.cc +++ b/src/arch/alpha/process.cc @@ -40,6 +40,7 @@ #include "mem/page_table.hh" #include "sim/byteswap.hh" #include "sim/process_impl.hh" +#include "sim/syscall_return.hh" #include "sim/system.hh" using namespace AlphaISA; diff --git a/src/arch/alpha/process.hh b/src/arch/alpha/process.hh index c41ece837..e5320564f 100644 --- a/src/arch/alpha/process.hh +++ b/src/arch/alpha/process.hh @@ -32,6 +32,7 @@ #ifndef __ARCH_ALPHA_PROCESS_HH__ #define __ARCH_ALPHA_PROCESS_HH__ +#include "mem/page_table.hh" #include "sim/process.hh" class AlphaLiveProcess : public LiveProcess diff --git a/src/arch/arm/process.cc b/src/arch/arm/process.cc index cc3d3e200..41bfa5b13 100644 --- a/src/arch/arm/process.cc +++ b/src/arch/arm/process.cc @@ -53,6 +53,7 @@ #include "mem/page_table.hh" #include "sim/byteswap.hh" #include "sim/process_impl.hh" +#include "sim/syscall_return.hh" #include "sim/system.hh" using namespace std; diff --git a/src/arch/arm/process.hh b/src/arch/arm/process.hh index 39e971c62..657f30af8 100644 --- a/src/arch/arm/process.hh +++ b/src/arch/arm/process.hh @@ -48,6 +48,7 @@ #include "arch/arm/intregs.hh" #include "base/loader/object_file.hh" +#include "mem/page_table.hh" #include "sim/process.hh" class LiveProcess; diff --git a/src/arch/mips/process.cc b/src/arch/mips/process.cc index dd97fe7f1..d26850604 100644 --- a/src/arch/mips/process.cc +++ b/src/arch/mips/process.cc @@ -41,6 +41,7 @@ #include "mem/page_table.hh" #include "sim/process.hh" #include "sim/process_impl.hh" +#include "sim/syscall_return.hh" #include "sim/system.hh" using namespace std; diff --git a/src/arch/mips/process.hh b/src/arch/mips/process.hh index 33c02d08b..e05118e9f 100644 --- a/src/arch/mips/process.hh +++ b/src/arch/mips/process.hh @@ -35,6 +35,7 @@ #include <string> #include <vector> +#include "mem/page_table.hh" #include "sim/process.hh" class LiveProcess; diff --git a/src/arch/power/interrupts.hh b/src/arch/power/interrupts.hh index be5c72151..e41b4aa95 100644 --- a/src/arch/power/interrupts.hh +++ b/src/arch/power/interrupts.hh @@ -35,6 +35,7 @@ #include "params/PowerInterrupts.hh" #include "sim/sim_object.hh" +class BaseCPU; class ThreadContext; namespace PowerISA { diff --git a/src/arch/power/process.cc b/src/arch/power/process.cc index 880d7dd6f..f7cb41dbb 100644 --- a/src/arch/power/process.cc +++ b/src/arch/power/process.cc @@ -41,6 +41,7 @@ #include "debug/Stack.hh" #include "mem/page_table.hh" #include "sim/process_impl.hh" +#include "sim/syscall_return.hh" #include "sim/system.hh" using namespace std; diff --git a/src/arch/power/process.hh b/src/arch/power/process.hh index b96c77c70..cc023e2c9 100644 --- a/src/arch/power/process.hh +++ b/src/arch/power/process.hh @@ -36,6 +36,7 @@ #include <string> #include <vector> +#include "mem/page_table.hh" #include "sim/process.hh" class LiveProcess; diff --git a/src/arch/power/remote_gdb.cc b/src/arch/power/remote_gdb.cc index ef10efc18..1ed7afbc0 100644 --- a/src/arch/power/remote_gdb.cc +++ b/src/arch/power/remote_gdb.cc @@ -133,6 +133,7 @@ * "Stub" to allow remote cpu to debug over a serial line using gdb. */ + #include "arch/power/remote_gdb.hh" #include <sys/signal.h> @@ -144,6 +145,7 @@ #include "cpu/thread_state.hh" #include "debug/GDBAcc.hh" #include "debug/GDBMisc.hh" +#include "mem/page_table.hh" #include "sim/byteswap.hh" using namespace std; diff --git a/src/arch/riscv/interrupts.hh b/src/arch/riscv/interrupts.hh index b157a3a8c..36eb52909 100644 --- a/src/arch/riscv/interrupts.hh +++ b/src/arch/riscv/interrupts.hh @@ -35,6 +35,7 @@ #include "params/RiscvInterrupts.hh" #include "sim/sim_object.hh" +class BaseCPU; class ThreadContext; namespace RiscvISA { diff --git a/src/arch/riscv/process.cc b/src/arch/riscv/process.cc index 7fa84035f..c1a67ec15 100644 --- a/src/arch/riscv/process.cc +++ b/src/arch/riscv/process.cc @@ -44,6 +44,7 @@ #include "mem/page_table.hh" #include "sim/process.hh" #include "sim/process_impl.hh" +#include "sim/syscall_return.hh" #include "sim/system.hh" using namespace std; diff --git a/src/arch/riscv/process.hh b/src/arch/riscv/process.hh index eb0e5f769..53aa7c00a 100644 --- a/src/arch/riscv/process.hh +++ b/src/arch/riscv/process.hh @@ -35,6 +35,7 @@ #include <string> #include <vector> +#include "mem/page_table.hh" #include "sim/process.hh" class LiveProcess; diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc index f863eb018..c14680a6a 100644 --- a/src/arch/sparc/process.cc +++ b/src/arch/sparc/process.cc @@ -43,6 +43,7 @@ #include "debug/Stack.hh" #include "mem/page_table.hh" #include "sim/process_impl.hh" +#include "sim/syscall_return.hh" #include "sim/system.hh" using namespace std; diff --git a/src/arch/sparc/process.hh b/src/arch/sparc/process.hh index e9d81367b..23a1a8c52 100644 --- a/src/arch/sparc/process.hh +++ b/src/arch/sparc/process.hh @@ -35,6 +35,7 @@ #include <string> #include <vector> +#include "mem/page_table.hh" #include "sim/byteswap.hh" #include "sim/process.hh" diff --git a/src/arch/x86/isa_traits.hh b/src/arch/x86/isa_traits.hh index fcdffec1c..88cd16eff 100644 --- a/src/arch/x86/isa_traits.hh +++ b/src/arch/x86/isa_traits.hh @@ -42,6 +42,7 @@ #include "arch/x86/types.hh" #include "arch/x86/x86_traits.hh" +#include "base/compiler.hh" #include "base/types.hh" namespace LittleEndianGuest {} diff --git a/src/arch/x86/pagetable.hh b/src/arch/x86/pagetable.hh index 1361109d5..354fb5a5c 100644 --- a/src/arch/x86/pagetable.hh +++ b/src/arch/x86/pagetable.hh @@ -46,14 +46,13 @@ #include <vector> #include "base/bitunion.hh" -#include "base/misc.hh" #include "base/types.hh" #include "base/trie.hh" -#include "cpu/thread_context.hh" #include "arch/x86/system.hh" #include "debug/MMU.hh" class Checkpoint; +class ThreadContext; namespace X86ISA { diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc index 116304fb4..a37468a88 100644 --- a/src/arch/x86/process.cc +++ b/src/arch/x86/process.cc @@ -59,6 +59,7 @@ #include "mem/page_table.hh" #include "sim/process_impl.hh" #include "sim/syscall_desc.hh" +#include "sim/syscall_return.hh" #include "sim/system.hh" using namespace std; diff --git a/src/arch/x86/pseudo_inst.cc b/src/arch/x86/pseudo_inst.cc index edba0474a..acf310631 100644 --- a/src/arch/x86/pseudo_inst.cc +++ b/src/arch/x86/pseudo_inst.cc @@ -31,9 +31,10 @@ #include "arch/x86/pseudo_inst.hh" #include "arch/x86/system.hh" +#include "cpu/thread_context.hh" #include "debug/PseudoInst.hh" +#include "mem/se_translating_port_proxy.hh" #include "sim/process.hh" -#include "sim/system.hh" using namespace X86ISA; diff --git a/src/arch/x86/system.cc b/src/arch/x86/system.cc index 25a1bd0df..ecde8366a 100644 --- a/src/arch/x86/system.cc +++ b/src/arch/x86/system.cc @@ -39,19 +39,12 @@ #include "arch/x86/system.hh" -#include "arch/vtophys.hh" #include "arch/x86/bios/intelmp.hh" #include "arch/x86/bios/smbios.hh" #include "arch/x86/isa_traits.hh" -#include "arch/x86/regs/misc.hh" -#include "base/intmath.hh" #include "base/loader/object_file.hh" -#include "base/loader/symtab.hh" -#include "base/trace.hh" #include "cpu/thread_context.hh" -#include "mem/port_proxy.hh" #include "params/X86System.hh" -#include "sim/byteswap.hh" using namespace LittleEndianGuest; using namespace X86ISA; diff --git a/src/arch/x86/system.hh b/src/arch/x86/system.hh index 578110a7b..45bc9651c 100644 --- a/src/arch/x86/system.hh +++ b/src/arch/x86/system.hh @@ -44,11 +44,7 @@ #include <vector> #include "arch/x86/regs/misc.hh" -#include "base/loader/symtab.hh" -#include "cpu/pc_event.hh" -#include "kern/system_events.hh" #include "params/X86System.hh" -#include "sim/sim_object.hh" #include "sim/system.hh" namespace X86ISA diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index 2e24b20e5..a5e8f5524 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -45,17 +45,13 @@ #include "arch/generic/mmapped_ipr.hh" #include "arch/x86/faults.hh" #include "arch/x86/insts/microldstop.hh" -#include "arch/x86/pagetable.hh" #include "arch/x86/pagetable_walker.hh" #include "arch/x86/regs/misc.hh" #include "arch/x86/regs/msr.hh" #include "arch/x86/x86_traits.hh" -#include "base/bitfield.hh" #include "base/trace.hh" -#include "cpu/base.hh" #include "cpu/thread_context.hh" #include "debug/TLB.hh" -#include "mem/packet_access.hh" #include "mem/page_table.hh" #include "mem/request.hh" #include "sim/full_system.hh" diff --git a/src/arch/x86/tlb.hh b/src/arch/x86/tlb.hh index 53f61dcbc..a134ad427 100644 --- a/src/arch/x86/tlb.hh +++ b/src/arch/x86/tlb.hh @@ -41,20 +41,15 @@ #define __ARCH_X86_TLB_HH__ #include <list> -#include <string> #include <vector> #include "arch/generic/tlb.hh" -#include "arch/x86/regs/segment.hh" #include "arch/x86/pagetable.hh" #include "base/trie.hh" -#include "mem/mem_object.hh" #include "mem/request.hh" #include "params/X86TLB.hh" -#include "sim/sim_object.hh" class ThreadContext; -class Packet; namespace X86ISA { diff --git a/src/arch/x86/utility.cc b/src/arch/x86/utility.cc index ae0a833e6..33b53ca92 100644 --- a/src/arch/x86/utility.cc +++ b/src/arch/x86/utility.cc @@ -42,11 +42,10 @@ #include "arch/x86/interrupts.hh" #include "arch/x86/registers.hh" -#include "arch/x86/tlb.hh" #include "arch/x86/x86_traits.hh" #include "cpu/base.hh" #include "fputils/fp80.h" -#include "sim/system.hh" +#include "sim/full_system.hh" namespace X86ISA { diff --git a/src/arch/x86/utility.hh b/src/arch/x86/utility.hh index 87bed9762..87d5cbb6c 100644 --- a/src/arch/x86/utility.hh +++ b/src/arch/x86/utility.hh @@ -40,16 +40,10 @@ #ifndef __ARCH_X86_UTILITY_HH__ #define __ARCH_X86_UTILITY_HH__ -#include "arch/x86/regs/misc.hh" -#include "arch/x86/types.hh" -#include "base/misc.hh" -#include "base/types.hh" #include "cpu/static_inst.hh" #include "cpu/thread_context.hh" #include "sim/full_system.hh" -class ThreadContext; - namespace X86ISA { diff --git a/src/base/bitfield.hh b/src/base/bitfield.hh index 5a98b13c7..64f192f6d 100644 --- a/src/base/bitfield.hh +++ b/src/base/bitfield.hh @@ -32,7 +32,7 @@ #ifndef __BASE_BITFIELD_HH__ #define __BASE_BITFIELD_HH__ -#include "base/types.hh" +#include <inttypes.h> /** * Generate a 64-bit mask of 'nbits' 1s, right justified. diff --git a/src/base/bitunion.hh b/src/base/bitunion.hh index 35448ed24..306899563 100644 --- a/src/base/bitunion.hh +++ b/src/base/bitunion.hh @@ -32,7 +32,6 @@ #define __BASE_BITUNION_HH__ #include "base/bitfield.hh" -#include "base/types.hh" // The following implements the BitUnion system of defining bitfields //on top of an underlying class. This is done through the pervasive use of diff --git a/src/base/time.cc b/src/base/time.cc index 5ee286b9c..5509bccaf 100644 --- a/src/base/time.cc +++ b/src/base/time.cc @@ -35,6 +35,7 @@ #include <iostream> #include <sstream> +#include "base/misc.hh" #include "config/use_posix_clock.hh" #include "sim/core.hh" #include "sim/serialize.hh" diff --git a/src/base/vnc/vncinput.cc b/src/base/vnc/vncinput.cc index 5021d407a..541b77143 100644 --- a/src/base/vnc/vncinput.cc +++ b/src/base/vnc/vncinput.cc @@ -46,7 +46,8 @@ #include <sys/types.h> -#include "base/output.hh" //simout +#include "base/misc.hh" +#include "base/output.hh" #include "base/trace.hh" #include "debug/VNC.hh" diff --git a/src/cpu/minor/buffers.hh b/src/cpu/minor/buffers.hh index f4ae91a70..924d7d2af 100644 --- a/src/cpu/minor/buffers.hh +++ b/src/cpu/minor/buffers.hh @@ -50,6 +50,7 @@ #include <queue> #include <sstream> +#include "base/misc.hh" #include "cpu/minor/trace.hh" #include "cpu/activity.hh" #include "cpu/timebuf.hh" diff --git a/src/cpu/testers/directedtest/InvalidateGenerator.cc b/src/cpu/testers/directedtest/InvalidateGenerator.cc index 20ea4f904..c5c48f1ad 100644 --- a/src/cpu/testers/directedtest/InvalidateGenerator.cc +++ b/src/cpu/testers/directedtest/InvalidateGenerator.cc @@ -29,6 +29,7 @@ #include "cpu/testers/directedtest/InvalidateGenerator.hh" +#include "base/trace.hh" #include "cpu/testers/directedtest/DirectedGenerator.hh" #include "cpu/testers/directedtest/RubyDirectedTester.hh" #include "debug/DirectedTest.hh" diff --git a/src/cpu/testers/directedtest/RubyDirectedTester.cc b/src/cpu/testers/directedtest/RubyDirectedTester.cc index 9b4e4543c..667d50ffd 100644 --- a/src/cpu/testers/directedtest/RubyDirectedTester.cc +++ b/src/cpu/testers/directedtest/RubyDirectedTester.cc @@ -41,6 +41,7 @@ #include "cpu/testers/directedtest/RubyDirectedTester.hh" +#include "base/trace.hh" #include "cpu/testers/directedtest/DirectedGenerator.hh" #include "debug/DirectedTest.hh" #include "sim/sim_exit.hh" diff --git a/src/cpu/testers/directedtest/SeriesRequestGenerator.cc b/src/cpu/testers/directedtest/SeriesRequestGenerator.cc index 966ee4974..386a49893 100644 --- a/src/cpu/testers/directedtest/SeriesRequestGenerator.cc +++ b/src/cpu/testers/directedtest/SeriesRequestGenerator.cc @@ -30,6 +30,7 @@ #include "cpu/testers/directedtest/SeriesRequestGenerator.hh" #include "base/random.hh" +#include "base/trace.hh" #include "cpu/testers/directedtest/DirectedGenerator.hh" #include "cpu/testers/directedtest/RubyDirectedTester.hh" #include "debug/DirectedTest.hh" diff --git a/src/cpu/testers/memtest/memtest.cc b/src/cpu/testers/memtest/memtest.cc index 5dc8b7427..46387fa01 100644 --- a/src/cpu/testers/memtest/memtest.cc +++ b/src/cpu/testers/memtest/memtest.cc @@ -46,6 +46,7 @@ #include "base/random.hh" #include "base/statistics.hh" +#include "base/trace.hh" #include "debug/MemTest.hh" #include "mem/mem_object.hh" #include "sim/sim_exit.hh" diff --git a/src/cpu/testers/rubytest/Check.cc b/src/cpu/testers/rubytest/Check.cc index f685d65be..e68196c65 100644 --- a/src/cpu/testers/rubytest/Check.cc +++ b/src/cpu/testers/rubytest/Check.cc @@ -30,6 +30,7 @@ #include "cpu/testers/rubytest/Check.hh" #include "base/random.hh" +#include "base/trace.hh" #include "debug/RubyTest.hh" #include "mem/ruby/common/SubBlock.hh" diff --git a/src/cpu/testers/rubytest/CheckTable.cc b/src/cpu/testers/rubytest/CheckTable.cc index 54248095b..843a7cf9d 100644 --- a/src/cpu/testers/rubytest/CheckTable.cc +++ b/src/cpu/testers/rubytest/CheckTable.cc @@ -31,6 +31,7 @@ #include "base/intmath.hh" #include "base/random.hh" +#include "base/trace.hh" #include "cpu/testers/rubytest/Check.hh" #include "debug/RubyTest.hh" diff --git a/src/cpu/testers/rubytest/RubyTester.cc b/src/cpu/testers/rubytest/RubyTester.cc index 61de05235..baf2b7e5b 100644 --- a/src/cpu/testers/rubytest/RubyTester.cc +++ b/src/cpu/testers/rubytest/RubyTester.cc @@ -42,6 +42,7 @@ #include "cpu/testers/rubytest/RubyTester.hh" #include "base/misc.hh" +#include "base/trace.hh" #include "cpu/testers/rubytest/Check.hh" #include "debug/RubyTest.hh" #include "mem/ruby/common/SubBlock.hh" diff --git a/src/dev/arm/flash_device.cc b/src/dev/arm/flash_device.cc index 63d232e80..3dc8d5bd2 100644 --- a/src/dev/arm/flash_device.cc +++ b/src/dev/arm/flash_device.cc @@ -54,6 +54,7 @@ #include "dev/arm/flash_device.hh" +#include "base/trace.hh" #include "debug/Drain.hh" /** diff --git a/src/dev/mc146818.hh b/src/dev/mc146818.hh index e19040ec3..8eb301c45 100644 --- a/src/dev/mc146818.hh +++ b/src/dev/mc146818.hh @@ -34,6 +34,7 @@ #define __DEV_MC146818_HH__ #include "base/bitunion.hh" +#include "base/misc.hh" #include "sim/eventq_impl.hh" /** Real-Time Clock (MC146818) */ diff --git a/src/dev/net/dist_iface.hh b/src/dev/net/dist_iface.hh index a56b9a3bb..c02c39530 100644 --- a/src/dev/net/dist_iface.hh +++ b/src/dev/net/dist_iface.hh @@ -83,6 +83,7 @@ #include <thread> #include <utility> +#include "base/misc.hh" #include "dev/net/dist_packet.hh" #include "dev/net/etherpkt.hh" #include "sim/core.hh" diff --git a/src/dev/net/etherbus.cc b/src/dev/net/etherbus.cc index 042c4ec84..7ccb8a4ac 100644 --- a/src/dev/net/etherbus.cc +++ b/src/dev/net/etherbus.cc @@ -38,6 +38,7 @@ #include <string> #include <vector> +#include "base/misc.hh" #include "base/trace.hh" #include "debug/Ethernet.hh" #include "debug/EthernetData.hh" diff --git a/src/dev/net/etherswitch.cc b/src/dev/net/etherswitch.cc index c9698cf63..995e29a0c 100644 --- a/src/dev/net/etherswitch.cc +++ b/src/dev/net/etherswitch.cc @@ -36,7 +36,9 @@ #include "dev/net/etherswitch.hh" #include "base/random.hh" +#include "base/trace.hh" #include "debug/EthernetAll.hh" +#include "sim/core.hh" using namespace std; diff --git a/src/gpu-compute/vector_register_file.hh b/src/gpu-compute/vector_register_file.hh index 360b2fb3c..0842c3695 100644 --- a/src/gpu-compute/vector_register_file.hh +++ b/src/gpu-compute/vector_register_file.hh @@ -39,6 +39,7 @@ #include <list> #include "base/statistics.hh" +#include "base/trace.hh" #include "base/types.hh" #include "debug/GPUVRF.hh" #include "gpu-compute/vector_register_state.hh" diff --git a/src/kern/linux/linux.cc b/src/kern/linux/linux.cc index ef5b4417f..6618fdbd9 100644 --- a/src/kern/linux/linux.cc +++ b/src/kern/linux/linux.cc @@ -33,7 +33,6 @@ #include <cstdio> #include <string> -#include "cpu/thread_context.hh" #include "debug/SyscallVerbose.hh" #include "sim/process.hh" #include "sim/system.hh" diff --git a/src/kern/linux/linux.hh b/src/kern/linux/linux.hh index 783341948..52a3bcd7b 100644 --- a/src/kern/linux/linux.hh +++ b/src/kern/linux/linux.hh @@ -36,9 +36,9 @@ #include <string> #include "kern/operatingsystem.hh" +#include "sim/process.hh" class ThreadContext; -class LiveProcess; /// /// This class encapsulates the types, structures, constants, diff --git a/src/mem/cache/prefetch/stride.cc b/src/mem/cache/prefetch/stride.cc index e9c83f2ff..f2679a292 100644 --- a/src/mem/cache/prefetch/stride.cc +++ b/src/mem/cache/prefetch/stride.cc @@ -49,6 +49,7 @@ #include "mem/cache/prefetch/stride.hh" #include "base/random.hh" +#include "base/trace.hh" #include "debug/HWPrefetch.hh" StridePrefetcher::StridePrefetcher(const StridePrefetcherParams *p) diff --git a/src/mem/external_master.cc b/src/mem/external_master.cc index 94fdc39cf..143019950 100644 --- a/src/mem/external_master.cc +++ b/src/mem/external_master.cc @@ -43,6 +43,7 @@ #include <cctype> #include <iomanip> +#include "base/trace.hh" #include "debug/ExternalPort.hh" std::map<std::string, ExternalMaster::Handler *> diff --git a/src/mem/external_slave.cc b/src/mem/external_slave.cc index 2d7ba1a65..990e3561a 100644 --- a/src/mem/external_slave.cc +++ b/src/mem/external_slave.cc @@ -42,6 +42,7 @@ #include <cctype> #include <iomanip> +#include "base/trace.hh" #include "debug/ExternalPort.hh" /** Implement a `stub' port which just responds to requests by printing diff --git a/src/mem/mem_checker.hh b/src/mem/mem_checker.hh index 6ceca74a7..7de4c17b7 100644 --- a/src/mem/mem_checker.hh +++ b/src/mem/mem_checker.hh @@ -48,6 +48,7 @@ #include <vector> #include "base/misc.hh" +#include "base/trace.hh" #include "base/types.hh" #include "debug/MemChecker.hh" #include "params/MemChecker.hh" diff --git a/src/mem/multi_level_page_table.hh b/src/mem/multi_level_page_table.hh index a1d3fbc39..a69d6ce7f 100644 --- a/src/mem/multi_level_page_table.hh +++ b/src/mem/multi_level_page_table.hh @@ -38,13 +38,12 @@ #include <string> -#include "arch/isa_traits.hh" #include "arch/tlb.hh" #include "base/types.hh" #include "config/the_isa.hh" #include "mem/page_table.hh" -#include "sim/serialize.hh" -#include "sim/system.hh" + +class System; /** * This class implements an in-memory multi-level page table that can be diff --git a/src/mem/multi_level_page_table_impl.hh b/src/mem/multi_level_page_table_impl.hh index 610240562..07ac92406 100644 --- a/src/mem/multi_level_page_table_impl.hh +++ b/src/mem/multi_level_page_table_impl.hh @@ -32,18 +32,15 @@ * @file * Definitions of page table */ -#include <fstream> -#include <map> #include <string> -#include "base/bitfield.hh" -#include "base/intmath.hh" +#include "arch/isa_traits.hh" +#include "arch/tlb.hh" #include "base/trace.hh" #include "config/the_isa.hh" #include "debug/MMU.hh" #include "mem/multi_level_page_table.hh" -#include "sim/faults.hh" -#include "sim/sim_object.hh" +#include "mem/page_table.hh" using namespace std; using namespace TheISA; diff --git a/src/mem/page_table.cc b/src/mem/page_table.cc index f47227f5a..8ff640837 100644 --- a/src/mem/page_table.cc +++ b/src/mem/page_table.cc @@ -37,18 +37,13 @@ */ #include "mem/page_table.hh" -#include <fstream> -#include <map> -#include <memory> #include <string> -#include "base/bitfield.hh" -#include "base/intmath.hh" #include "base/trace.hh" #include "config/the_isa.hh" #include "debug/MMU.hh" #include "sim/faults.hh" -#include "sim/sim_object.hh" +#include "sim/serialize.hh" using namespace std; using namespace TheISA; diff --git a/src/mem/page_table.hh b/src/mem/page_table.hh index 645548263..9b24c0efa 100644 --- a/src/mem/page_table.hh +++ b/src/mem/page_table.hh @@ -42,13 +42,14 @@ #include "arch/isa_traits.hh" #include "arch/tlb.hh" +#include "base/intmath.hh" #include "base/types.hh" #include "config/the_isa.hh" #include "mem/request.hh" #include "sim/serialize.hh" -#include "sim/system.hh" class ThreadContext; +class System; /** * Declaration of base class for page table diff --git a/src/mem/ruby/network/MessageBuffer.hh b/src/mem/ruby/network/MessageBuffer.hh index e6ec5ac4b..6694830b0 100644 --- a/src/mem/ruby/network/MessageBuffer.hh +++ b/src/mem/ruby/network/MessageBuffer.hh @@ -41,6 +41,7 @@ #include <string> #include <vector> +#include "base/trace.hh" #include "debug/RubyQueue.hh" #include "mem/ruby/common/Address.hh" #include "mem/ruby/common/Consumer.hh" diff --git a/src/mem/ruby/structures/AbstractReplacementPolicy.cc b/src/mem/ruby/structures/AbstractReplacementPolicy.cc index 5abd55083..05304dc84 100644 --- a/src/mem/ruby/structures/AbstractReplacementPolicy.cc +++ b/src/mem/ruby/structures/AbstractReplacementPolicy.cc @@ -30,6 +30,8 @@ #include "mem/ruby/structures/AbstractReplacementPolicy.hh" +#include "base/misc.hh" + AbstractReplacementPolicy::AbstractReplacementPolicy(const Params * p) : SimObject(p) { diff --git a/src/mem/se_translating_port_proxy.hh b/src/mem/se_translating_port_proxy.hh index 58d0c9bcd..bb823a75b 100644 --- a/src/mem/se_translating_port_proxy.hh +++ b/src/mem/se_translating_port_proxy.hh @@ -45,9 +45,9 @@ #ifndef __MEM_SE_TRANSLATING_PORT_PROXY_HH__ #define __MEM_SE_TRANSLATING_PORT_PROXY_HH__ -#include "mem/page_table.hh" #include "mem/port_proxy.hh" +class PageTableBase; class Process; /** diff --git a/src/mem/simple_mem.cc b/src/mem/simple_mem.cc index f3a01b5b0..f524d01ab 100644 --- a/src/mem/simple_mem.cc +++ b/src/mem/simple_mem.cc @@ -45,6 +45,7 @@ #include "mem/simple_mem.hh" #include "base/random.hh" +#include "base/trace.hh" #include "debug/Drain.hh" using namespace std; diff --git a/src/python/swig/pyevent.cc b/src/python/swig/pyevent.cc index 24760fc65..53f3a3397 100644 --- a/src/python/swig/pyevent.cc +++ b/src/python/swig/pyevent.cc @@ -32,6 +32,7 @@ #include <Python.h> +#include "base/misc.hh" #include "sim/async.hh" #include "sim/eventq.hh" diff --git a/src/sim/SConscript b/src/sim/SConscript index 61e4df966..7fec029f1 100644 --- a/src/sim/SConscript +++ b/src/sim/SConscript @@ -82,6 +82,9 @@ if env['TARGET_ISA'] != 'null': Source('syscall_emul.cc') Source('syscall_desc.cc') +if env['TARGET_ISA'] != 'x86': + Source('microcode_rom.cc') + DebugFlag('Checkpoint') DebugFlag('Config') DebugFlag('CxxConfig') diff --git a/src/sim/arguments.cc b/src/sim/arguments.cc index 5d6ded9ee..4d00d2cf6 100644 --- a/src/sim/arguments.cc +++ b/src/sim/arguments.cc @@ -32,7 +32,6 @@ #include "arch/utility.hh" #include "config/the_isa.hh" -#include "cpu/thread_context.hh" Arguments::Data::~Data() { diff --git a/src/sim/arguments.hh b/src/sim/arguments.hh index 165880095..498527ca2 100644 --- a/src/sim/arguments.hh +++ b/src/sim/arguments.hh @@ -34,7 +34,6 @@ #include <cassert> #include <memory> -#include "base/types.hh" #include "mem/fs_translating_port_proxy.hh" class ThreadContext; diff --git a/src/sim/byteswap.hh b/src/sim/byteswap.hh index 7e5d6809e..23786bb71 100644 --- a/src/sim/byteswap.hh +++ b/src/sim/byteswap.hh @@ -38,7 +38,6 @@ #define __SIM_BYTE_SWAP_HH__ #include "base/bigint.hh" -#include "base/misc.hh" #include "base/types.hh" // This lets us figure out what the byte order of the host system is diff --git a/src/sim/clock_domain.cc b/src/sim/clock_domain.cc index 5b05ced9b..46dbcbaac 100644 --- a/src/sim/clock_domain.cc +++ b/src/sim/clock_domain.cc @@ -47,6 +47,7 @@ #include <algorithm> #include <functional> +#include "base/trace.hh" #include "debug/ClockDomain.hh" #include "params/ClockDomain.hh" #include "params/DerivedClockDomain.hh" diff --git a/src/sim/clocked_object.hh b/src/sim/clocked_object.hh index d85d226c9..b89e1ce13 100644 --- a/src/sim/clocked_object.hh +++ b/src/sim/clocked_object.hh @@ -51,7 +51,6 @@ #include "base/callback.hh" #include "base/intmath.hh" -#include "base/misc.hh" #include "enums/PwrState.hh" #include "params/ClockedObject.hh" #include "sim/core.hh" diff --git a/src/sim/cxx_config.hh b/src/sim/cxx_config.hh index da2752b4b..8860e0297 100644 --- a/src/sim/cxx_config.hh +++ b/src/sim/cxx_config.hh @@ -57,8 +57,6 @@ #include <string> #include <vector> -#include "mem/port.hh" -#include "params/SimObject.hh" #include "sim/sim_object.hh" class CxxConfigParams; diff --git a/src/sim/cxx_config_ini.cc b/src/sim/cxx_config_ini.cc index 3df6d72d4..41ad8e6f5 100644 --- a/src/sim/cxx_config_ini.cc +++ b/src/sim/cxx_config_ini.cc @@ -39,6 +39,8 @@ #include "sim/cxx_config_ini.hh" +#include "base/str.hh" + bool CxxIniFile::getParam(const std::string &object_name, const std::string ¶m_name, diff --git a/src/sim/cxx_config_ini.hh b/src/sim/cxx_config_ini.hh index 9ea61976e..84900a62e 100644 --- a/src/sim/cxx_config_ini.hh +++ b/src/sim/cxx_config_ini.hh @@ -47,7 +47,6 @@ #define __SIM_CXX_CONFIG_INI_HH__ #include "base/inifile.hh" -#include "base/str.hh" #include "sim/cxx_config.hh" /** CxxConfigManager interface for using .ini files */ diff --git a/src/sim/cxx_manager.cc b/src/sim/cxx_manager.cc index a679c6105..bb6c6a807 100644 --- a/src/sim/cxx_manager.cc +++ b/src/sim/cxx_manager.cc @@ -43,6 +43,7 @@ #include <sstream> #include "base/str.hh" +#include "base/trace.hh" #include "debug/CxxConfig.hh" #include "mem/mem_object.hh" #include "sim/serialize.hh" diff --git a/src/sim/drain.hh b/src/sim/drain.hh index 370217bd6..b3145e7ed 100644 --- a/src/sim/drain.hh +++ b/src/sim/drain.hh @@ -44,8 +44,6 @@ #include <mutex> #include <unordered_set> -#include "base/flags.hh" - class Drainable; #ifndef SWIG // SWIG doesn't support strongly typed enums diff --git a/src/sim/dvfs_handler.cc b/src/sim/dvfs_handler.cc index 254720c5f..5ccd50bcd 100644 --- a/src/sim/dvfs_handler.cc +++ b/src/sim/dvfs_handler.cc @@ -45,9 +45,11 @@ #include <utility> #include "base/misc.hh" +#include "base/trace.hh" #include "debug/DVFS.hh" #include "params/DVFSHandler.hh" #include "sim/clock_domain.hh" +#include "sim/eventq_impl.hh" #include "sim/stat_control.hh" #include "sim/voltage_domain.hh" @@ -170,6 +172,30 @@ DVFSHandler::UpdateEvent::updatePerfLevel() d->perfLevel(perfLevelToSet); } +double +DVFSHandler::voltageAtPerfLevel(DomainID domain_id, PerfLevel perf_level) const +{ + VoltageDomain *d = findDomain(domain_id)->voltageDomain(); + assert(d); + PerfLevel n = d->numVoltages(); + if (perf_level < n) + return d->voltage(perf_level); + + // Request outside of the range of the voltage domain + if (n == 1) { + DPRINTF(DVFS, "DVFS: Request for perf-level %i for single-point "\ + "voltage domain %s. Returning voltage at level 0: %.2f "\ + "V\n", perf_level, d->name(), d->voltage(0)); + // Special case for single point voltage domain -> same voltage for + // all points + return d->voltage(0); + } + + warn("DVFSHandler %s reads illegal voltage level %u from "\ + "VoltageDomain %s. Returning 0 V\n", name(), perf_level, d->name()); + return 0.; +} + void DVFSHandler::serialize(CheckpointOut &cp) const { diff --git a/src/sim/dvfs_handler.hh b/src/sim/dvfs_handler.hh index f587f7c25..23ac4bf50 100644 --- a/src/sim/dvfs_handler.hh +++ b/src/sim/dvfs_handler.hh @@ -53,13 +53,10 @@ #include <vector> #include "debug/DVFS.hh" -#include "params/ClockDomain.hh" #include "params/DVFSHandler.hh" -#include "params/VoltageDomain.hh" #include "sim/clock_domain.hh" #include "sim/eventq.hh" #include "sim/sim_object.hh" -#include "sim/voltage_domain.hh" /** * DVFS Handler class, maintains a list of all the domains it can handle. @@ -156,28 +153,7 @@ class DVFSHandler : public SimObject * @return Voltage for the requested performance level of the respective * domain */ - double voltageAtPerfLevel(DomainID domain_id, PerfLevel perf_level) const - { - VoltageDomain *d = findDomain(domain_id)->voltageDomain(); - assert(d); - PerfLevel n = d->numVoltages(); - if (perf_level < n) - return d->voltage(perf_level); - - // Request outside of the range of the voltage domain - if (n == 1) { - DPRINTF(DVFS, "DVFS: Request for perf-level %i for single-point "\ - "voltage domain %s. Returning voltage at level 0: %.2f "\ - "V\n", perf_level, d->name(), d->voltage(0)); - // Special case for single point voltage domain -> same voltage for - // all points - return d->voltage(0); - } - - warn("DVFSHandler %s reads illegal voltage level %u from "\ - "VoltageDomain %s. Returning 0 V\n", name(), perf_level, d->name()); - return 0.; - } + double voltageAtPerfLevel(DomainID domain_id, PerfLevel perf_level) const; /** * Get the total number of available performance levels. diff --git a/src/sim/eventq.hh b/src/sim/eventq.hh index eeb392153..0b76491ca 100644 --- a/src/sim/eventq.hh +++ b/src/sim/eventq.hh @@ -47,7 +47,6 @@ #include <string> #include "base/flags.hh" -#include "base/misc.hh" #include "base/types.hh" #include "debug/Event.hh" #include "sim/serialize.hh" diff --git a/src/sim/fd_entry.hh b/src/sim/fd_entry.hh index 0cbb769b5..fd68ba50b 100644 --- a/src/sim/fd_entry.hh +++ b/src/sim/fd_entry.hh @@ -35,7 +35,9 @@ #include <ostream> #include <string> -#include "sim/emul_driver.hh" +#include "sim/serialize.hh" + +class EmulatedDriver; /** * FDEntry is used to manage a single file descriptor mapping and metadata diff --git a/src/sim/init_signals.cc b/src/sim/init_signals.cc index 81dba189b..5acfe45fd 100644 --- a/src/sim/init_signals.cc +++ b/src/sim/init_signals.cc @@ -52,6 +52,7 @@ #include "base/atomicio.hh" #include "base/cprintf.hh" +#include "base/misc.hh" #include "sim/async.hh" #include "sim/backtrace.hh" #include "sim/core.hh" diff --git a/src/sim/insttracer.hh b/src/sim/insttracer.hh index 7b15d1f91..caeee520d 100644 --- a/src/sim/insttracer.hh +++ b/src/sim/insttracer.hh @@ -45,9 +45,8 @@ #define __INSTRECORD_HH__ #include "base/bigint.hh" -#include "base/trace.hh" #include "base/types.hh" -#include "cpu/inst_seq.hh" // for InstSeqNum +#include "cpu/inst_seq.hh" #include "cpu/static_inst.hh" #include "sim/sim_object.hh" diff --git a/src/sim/microcode_rom.cc b/src/sim/microcode_rom.cc new file mode 100644 index 000000000..d050919e7 --- /dev/null +++ b/src/sim/microcode_rom.cc @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2008 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Gabe Black + */ + +#include "sim/microcode_rom.hh" + +#include "base/misc.hh" +#include "cpu/static_inst_fwd.hh" + +StaticInstPtr +MicrocodeRom::fetchMicroop(MicroPC micropc, StaticInstPtr curMacroop) +{ + panic("ROM based microcode isn't implemented.\n"); +} diff --git a/src/sim/microcode_rom.hh b/src/sim/microcode_rom.hh index be10de86b..d45c0870a 100644 --- a/src/sim/microcode_rom.hh +++ b/src/sim/microcode_rom.hh @@ -36,17 +36,16 @@ * anything more. */ -#include "base/misc.hh" -#include "cpu/static_inst.hh" +#include <inttypes.h> + +#include "cpu/static_inst_fwd.hh" + +typedef uint16_t MicroPC; class MicrocodeRom { public: - StaticInstPtr - fetchMicroop(MicroPC micropc, StaticInstPtr curMacroop) - { - panic("ROM based microcode isn't implemented.\n"); - } + StaticInstPtr fetchMicroop(MicroPC micropc, StaticInstPtr curMacroop); }; #endif // __SIM_MICROCODE_ROM_HH__ diff --git a/src/sim/power/mathexpr_powermodel.hh b/src/sim/power/mathexpr_powermodel.hh index 563b1fa7f..5c121c7b6 100644 --- a/src/sim/power/mathexpr_powermodel.hh +++ b/src/sim/power/mathexpr_powermodel.hh @@ -42,11 +42,13 @@ #include <unordered_map> -#include "base/statistics.hh" #include "params/MathExprPowerModel.hh" #include "sim/mathexpr.hh" #include "sim/power/power_model.hh" -#include "sim/sim_object.hh" + +namespace Stats { + class Info; +} /** * A Equation power model. The power is represented as a combination diff --git a/src/sim/power/power_model.cc b/src/sim/power/power_model.cc index bd06ced70..5f810fe60 100644 --- a/src/sim/power/power_model.cc +++ b/src/sim/power/power_model.cc @@ -42,7 +42,7 @@ #include "base/statistics.hh" #include "params/PowerModel.hh" #include "params/PowerModelState.hh" -#include "sim/sim_object.hh" +#include "sim/clocked_object.hh" #include "sim/sub_system.hh" PowerModelState::PowerModelState(const Params *p) diff --git a/src/sim/power/power_model.hh b/src/sim/power/power_model.hh index a2ddcea18..976c0543f 100644 --- a/src/sim/power/power_model.hh +++ b/src/sim/power/power_model.hh @@ -43,9 +43,10 @@ #include "base/statistics.hh" #include "params/PowerModel.hh" #include "params/PowerModelState.hh" -#include "sim/power/thermal_model.hh" #include "sim/probe/probe.hh" -#include "sim/sim_object.hh" + +class SimObject; +class ClockedObject; /** * A PowerModelState is an abstract class used as interface to get power diff --git a/src/sim/power/thermal_domain.cc b/src/sim/power/thermal_domain.cc index 11f48371e..0724ee80f 100644 --- a/src/sim/power/thermal_domain.cc +++ b/src/sim/power/thermal_domain.cc @@ -44,8 +44,11 @@ #include "base/statistics.hh" #include "debug/ThermalDomain.hh" #include "params/ThermalDomain.hh" +#include "sim/clocked_object.hh" +#include "sim/linear_solver.hh" #include "sim/power/thermal_model.hh" -#include "sim/sim_object.hh" +#include "sim/probe/probe.hh" +#include "sim/sub_system.hh" ThermalDomain::ThermalDomain(const Params *p) : SimObject(p), _initTemperature(p->initial_temperature), diff --git a/src/sim/power/thermal_domain.hh b/src/sim/power/thermal_domain.hh index 9236a2437..f385994f8 100644 --- a/src/sim/power/thermal_domain.hh +++ b/src/sim/power/thermal_domain.hh @@ -45,11 +45,11 @@ #include "base/statistics.hh" #include "params/ThermalDomain.hh" #include "sim/power/thermal_entity.hh" -#include "sim/probe/probe.hh" #include "sim/sim_object.hh" -#include "sim/sub_system.hh" +class SubSystem; class ThermalNode; +template <class T> class ProbePointArg; /** * A ThermalDomain is used to group objects under that operate under diff --git a/src/sim/power/thermal_entity.hh b/src/sim/power/thermal_entity.hh index 77846b67a..fb703961f 100644 --- a/src/sim/power/thermal_entity.hh +++ b/src/sim/power/thermal_entity.hh @@ -40,8 +40,7 @@ #ifndef __SIM_THERMAL_ENTITY_HH__ #define __SIM_THERMAL_ENTITY_HH__ -#include "sim/linear_solver.hh" - +class LinearEquation; class ThermalNode; /** diff --git a/src/sim/power/thermal_model.hh b/src/sim/power/thermal_model.hh index 64f831982..32f34f109 100644 --- a/src/sim/power/thermal_model.hh +++ b/src/sim/power/thermal_model.hh @@ -42,7 +42,6 @@ #include <vector> -#include "base/statistics.hh" #include "params/ThermalCapacitor.hh" #include "params/ThermalModel.hh" #include "params/ThermalReference.hh" diff --git a/src/sim/probe/probe.cc b/src/sim/probe/probe.cc index 5f20f7861..f0522bef9 100644 --- a/src/sim/probe/probe.cc +++ b/src/sim/probe/probe.cc @@ -40,6 +40,7 @@ #include "sim/probe/probe.hh" #include "debug/ProbeVerbose.hh" +#include "params/ProbeListenerObject.hh" ProbePoint::ProbePoint(ProbeManager *manager, const std::string& _name) : name(_name) diff --git a/src/sim/probe/probe.hh b/src/sim/probe/probe.hh index 8f68c0441..e391f016b 100644 --- a/src/sim/probe/probe.hh +++ b/src/sim/probe/probe.hh @@ -64,13 +64,14 @@ #include <string> #include <vector> +#include "base/compiler.hh" #include "base/trace.hh" -#include "params/ProbeListenerObject.hh" #include "sim/sim_object.hh" /** Forward declare the ProbeManager. */ class ProbeManager; class ProbeListener; +class ProbeListenerObjectParams; /** * Name space containing shared probe point declarations. diff --git a/src/sim/process.cc b/src/sim/process.cc index bead9d362..560870c96 100644 --- a/src/sim/process.cc +++ b/src/sim/process.cc @@ -48,9 +48,10 @@ #include <fcntl.h> #include <unistd.h> -#include <cstdio> +#include <array> #include <map> #include <string> +#include <vector> #include "base/intmath.hh" #include "base/loader/object_file.hh" @@ -58,14 +59,11 @@ #include "base/statistics.hh" #include "config/the_isa.hh" #include "cpu/thread_context.hh" -#include "mem/multi_level_page_table.hh" #include "mem/page_table.hh" #include "mem/se_translating_port_proxy.hh" #include "params/LiveProcess.hh" #include "params/Process.hh" -#include "sim/debug.hh" -#include "sim/process_impl.hh" -#include "sim/stats.hh" +#include "sim/emul_driver.hh" #include "sim/syscall_desc.hh" #include "sim/system.hh" diff --git a/src/sim/process.hh b/src/sim/process.hh index d9762c052..30852f6af 100644 --- a/src/sim/process.hh +++ b/src/sim/process.hh @@ -34,6 +34,7 @@ #define __PROCESS_HH__ #include <array> +#include <map> #include <string> #include <vector> @@ -44,15 +45,16 @@ #include "mem/se_translating_port_proxy.hh" #include "sim/fd_entry.hh" #include "sim/sim_object.hh" -#include "sim/syscall_return.hh" -class PageTable; -struct ProcessParams; struct LiveProcessParams; +struct ProcessParams; + +class EmulatedDriver; +class PageTableBase; class SyscallDesc; +class SyscallReturn; class System; class ThreadContext; -class EmulatedDriver; template<class IntType> struct AuxVector diff --git a/src/sim/process_impl.hh b/src/sim/process_impl.hh index b1905834b..3f3d6ae15 100644 --- a/src/sim/process_impl.hh +++ b/src/sim/process_impl.hh @@ -36,7 +36,6 @@ #include <vector> #include "mem/se_translating_port_proxy.hh" -#include "sim/byteswap.hh" //This needs to be templated for cases where 32 bit pointers are needed. template<class AddrType> diff --git a/src/sim/root.cc b/src/sim/root.cc index 6787564dd..752632b5e 100644 --- a/src/sim/root.cc +++ b/src/sim/root.cc @@ -31,13 +31,13 @@ * Gabe Black */ -#include "sim/root.hh" - #include "base/misc.hh" #include "base/trace.hh" #include "config/the_isa.hh" #include "debug/TimeSync.hh" +#include "sim/eventq_impl.hh" #include "sim/full_system.hh" +#include "sim/root.hh" Root *Root::_root = NULL; diff --git a/src/sim/serialize.hh b/src/sim/serialize.hh index 4c5e9d79c..1005d5b97 100644 --- a/src/sim/serialize.hh +++ b/src/sim/serialize.hh @@ -59,14 +59,12 @@ #include <vector> #include "base/bitunion.hh" -#include "base/types.hh" +class CheckpointIn; class IniFile; class Serializable; -class CheckpointIn; class SimObject; class SimObjectResolver; -class EventQueue; typedef std::ostream CheckpointOut; diff --git a/src/sim/sim_exit.hh b/src/sim/sim_exit.hh index 218db9aeb..55db55ff2 100644 --- a/src/sim/sim_exit.hh +++ b/src/sim/sim_exit.hh @@ -35,7 +35,8 @@ #include <string> #include "base/types.hh" -#include "sim/core.hh" + +Tick curTick(); // forward declaration class Callback; diff --git a/src/sim/sim_object.cc b/src/sim/sim_object.cc index 0ccc36b35..516019a7c 100644 --- a/src/sim/sim_object.cc +++ b/src/sim/sim_object.cc @@ -32,17 +32,11 @@ #include "sim/sim_object.hh" -#include <cassert> - -#include "base/callback.hh" -#include "base/inifile.hh" #include "base/match.hh" #include "base/misc.hh" #include "base/trace.hh" -#include "base/types.hh" #include "debug/Checkpoint.hh" #include "sim/probe/probe.hh" -#include "sim/stats.hh" using namespace std; diff --git a/src/sim/sim_object.hh b/src/sim/sim_object.hh index 7c1452f01..42a19bbe7 100644 --- a/src/sim/sim_object.hh +++ b/src/sim/sim_object.hh @@ -49,21 +49,18 @@ #ifndef __SIM_OBJECT_HH__ #define __SIM_OBJECT_HH__ -#include <iostream> -#include <list> -#include <map> #include <string> #include <vector> -#include "enums/MemoryMode.hh" #include "params/SimObject.hh" #include "sim/drain.hh" +#include "sim/eventq.hh" #include "sim/eventq_impl.hh" #include "sim/serialize.hh" -class BaseCPU; -class Event; +class EventManager; class ProbeManager; + /** * Abstract superclass for simulation objects. Represents things that * correspond to physical components and can be specified via the diff --git a/src/sim/simulate.hh b/src/sim/simulate.hh index 85d58e119..e39a2595d 100644 --- a/src/sim/simulate.hh +++ b/src/sim/simulate.hh @@ -30,7 +30,8 @@ */ #include "base/types.hh" -#include "sim/sim_events.hh" + +class GlobalSimLoopExitEvent; GlobalSimLoopExitEvent *simulate(Tick num_cycles = MaxTick); extern GlobalSimLoopExitEvent *simulate_limit_event; diff --git a/src/sim/stat_register.cc b/src/sim/stat_register.cc index ef7ff8216..371fd9621 100644 --- a/src/sim/stat_register.cc +++ b/src/sim/stat_register.cc @@ -39,6 +39,8 @@ #include "sim/stat_register.hh" +#include "base/statistics.hh" + namespace Stats { diff --git a/src/sim/stat_register.hh b/src/sim/stat_register.hh index 7f8c3bcd9..bbe909321 100644 --- a/src/sim/stat_register.hh +++ b/src/sim/stat_register.hh @@ -44,8 +44,6 @@ #ifndef __SIM_STAT_REGISTER_H__ #define __SIM_STAT_REGISTER_H__ -#include "base/statistics.hh" - namespace Stats { diff --git a/src/sim/sub_system.hh b/src/sim/sub_system.hh index 20a352fc3..e2e75be52 100644 --- a/src/sim/sub_system.hh +++ b/src/sim/sub_system.hh @@ -48,7 +48,6 @@ #include <vector> #include "params/SubSystem.hh" -#include "sim/power/thermal_domain.hh" #include "sim/sim_object.hh" class PowerModel; diff --git a/src/sim/syscall_emul.cc b/src/sim/syscall_emul.cc index b34e983a6..56518726c 100644 --- a/src/sim/syscall_emul.cc +++ b/src/sim/syscall_emul.cc @@ -34,7 +34,6 @@ #include <fcntl.h> #include <unistd.h> -#include <cstdio> #include <iostream> #include <string> @@ -42,7 +41,6 @@ #include "base/chunk_generator.hh" #include "base/trace.hh" #include "config/the_isa.hh" -#include "cpu/base.hh" #include "cpu/thread_context.hh" #include "mem/page_table.hh" #include "sim/process.hh" diff --git a/src/sim/syscall_emul.hh b/src/sim/syscall_emul.hh index 4433b5039..31e4c07cd 100644 --- a/src/sim/syscall_emul.hh +++ b/src/sim/syscall_emul.hh @@ -62,7 +62,7 @@ /// application on the host machine. #ifdef __CYGWIN32__ -#include <sys/fcntl.h> // for O_BINARY +#include <sys/fcntl.h> #endif #include <fcntl.h> @@ -78,8 +78,7 @@ #include <cerrno> #include <string> -#include "base/chunk_generator.hh" -#include "base/intmath.hh" // for RoundUp +#include "base/intmath.hh" #include "base/loader/object_file.hh" #include "base/misc.hh" #include "base/trace.hh" @@ -88,13 +87,11 @@ #include "cpu/base.hh" #include "cpu/thread_context.hh" #include "mem/page_table.hh" -#include "sim/byteswap.hh" #include "sim/emul_driver.hh" #include "sim/process.hh" #include "sim/syscall_debug_macros.hh" #include "sim/syscall_emul_buf.hh" #include "sim/syscall_return.hh" -#include "sim/system.hh" class SyscallDesc; @@ -156,7 +153,7 @@ SyscallReturn lseekFunc(SyscallDesc *desc, int num, /// Target _llseek() handler. SyscallReturn _llseekFunc(SyscallDesc *desc, int num, - LiveProcess *p, ThreadContext *tc); + LiveProcess *p, ThreadContext *tc); /// Target munmap() handler. SyscallReturn munmapFunc(SyscallDesc *desc, int num, @@ -236,39 +233,39 @@ SyscallReturn fcntlFunc(SyscallDesc *desc, int num, /// Target fcntl64() handler. SyscallReturn fcntl64Func(SyscallDesc *desc, int num, - LiveProcess *process, ThreadContext *tc); + LiveProcess *process, ThreadContext *tc); /// Target setuid() handler. SyscallReturn setuidFunc(SyscallDesc *desc, int num, - LiveProcess *p, ThreadContext *tc); + LiveProcess *p, ThreadContext *tc); /// Target getpid() handler. SyscallReturn getpidFunc(SyscallDesc *desc, int num, - LiveProcess *p, ThreadContext *tc); + LiveProcess *p, ThreadContext *tc); /// Target getuid() handler. SyscallReturn getuidFunc(SyscallDesc *desc, int num, - LiveProcess *p, ThreadContext *tc); + LiveProcess *p, ThreadContext *tc); /// Target getgid() handler. SyscallReturn getgidFunc(SyscallDesc *desc, int num, - LiveProcess *p, ThreadContext *tc); + LiveProcess *p, ThreadContext *tc); /// Target getppid() handler. SyscallReturn getppidFunc(SyscallDesc *desc, int num, - LiveProcess *p, ThreadContext *tc); + LiveProcess *p, ThreadContext *tc); /// Target geteuid() handler. SyscallReturn geteuidFunc(SyscallDesc *desc, int num, - LiveProcess *p, ThreadContext *tc); + LiveProcess *p, ThreadContext *tc); /// Target getegid() handler. SyscallReturn getegidFunc(SyscallDesc *desc, int num, - LiveProcess *p, ThreadContext *tc); + LiveProcess *p, ThreadContext *tc); /// Target clone() handler. SyscallReturn cloneFunc(SyscallDesc *desc, int num, - LiveProcess *p, ThreadContext *tc); + LiveProcess *p, ThreadContext *tc); /// Target access() handler SyscallReturn accessFunc(SyscallDesc *desc, int num, diff --git a/src/sim/syscall_return.hh b/src/sim/syscall_return.hh index fdd740775..1d531daac 100644 --- a/src/sim/syscall_return.hh +++ b/src/sim/syscall_return.hh @@ -31,7 +31,7 @@ #ifndef __SIM_SYSCALLRETURN_HH__ #define __SIM_SYSCALLRETURN_HH__ -#include "base/types.hh" +#include <inttypes.h> /** * This class represents the return value from an emulated system call, diff --git a/src/sim/system.hh b/src/sim/system.hh index 7e167c75f..2d491e8c3 100644 --- a/src/sim/system.hh +++ b/src/sim/system.hh @@ -53,7 +53,6 @@ #include "arch/isa_traits.hh" #include "base/loader/symtab.hh" -#include "base/misc.hh" #include "base/statistics.hh" #include "config/the_isa.hh" #include "enums/MemoryMode.hh" @@ -71,11 +70,9 @@ #include "cpu/pc_event.hh" #endif -class BaseCPU; class BaseRemoteGDB; class GDBListener; class ObjectFile; -class Platform; class ThreadContext; class System : public MemObject diff --git a/src/sim/ticked_object.cc b/src/sim/ticked_object.cc index ecdb87827..4cd0dc171 100644 --- a/src/sim/ticked_object.cc +++ b/src/sim/ticked_object.cc @@ -39,6 +39,9 @@ #include "sim/ticked_object.hh" +#include "params/TickedObject.hh" +#include "sim/clocked_object.hh" + Ticked::Ticked(ClockedObject &object_, Stats::Scalar *imported_num_cycles, Event::Priority priority) : diff --git a/src/sim/ticked_object.hh b/src/sim/ticked_object.hh index b21322670..d8b69a320 100644 --- a/src/sim/ticked_object.hh +++ b/src/sim/ticked_object.hh @@ -48,9 +48,10 @@ #ifndef __SIM_TICKED_OBJECT_HH__ #define __SIM_TICKED_OBJECT_HH__ -#include "params/TickedObject.hh" #include "sim/clocked_object.hh" +class TickedObjectParams; + /** Ticked attaches gem5's event queue/scheduler to evaluate * calls and provides a start/stop interface to ticking. * diff --git a/src/sim/voltage_domain.cc b/src/sim/voltage_domain.cc index 0c5b65d6a..6f32dc7c0 100644 --- a/src/sim/voltage_domain.cc +++ b/src/sim/voltage_domain.cc @@ -43,6 +43,7 @@ #include <algorithm> #include "base/statistics.hh" +#include "base/trace.hh" #include "debug/VoltageDomain.hh" #include "params/VoltageDomain.hh" #include "sim/sim_object.hh" diff --git a/src/sim/vptr.hh b/src/sim/vptr.hh index 658959a90..6eefd5937 100644 --- a/src/sim/vptr.hh +++ b/src/sim/vptr.hh @@ -31,8 +31,6 @@ #ifndef __ARCH_ALPHA_VPTR_HH__ #define __ARCH_ALPHA_VPTR_HH__ -#include "arch/isa_traits.hh" -#include "arch/vtophys.hh" #include "mem/fs_translating_port_proxy.hh" class ThreadContext; |