diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/x86/SConscript | 1 | ||||
| -rw-r--r-- | src/arch/x86/faults.cc | 24 | ||||
| -rw-r--r-- | src/arch/x86/faults.hh | 8 |
3 files changed, 31 insertions, 2 deletions
diff --git a/src/arch/x86/SConscript b/src/arch/x86/SConscript index 8c1aec7a7..0e13d3104 100644 --- a/src/arch/x86/SConscript +++ b/src/arch/x86/SConscript @@ -113,6 +113,7 @@ if env['TARGET_ISA'] == 'x86': TraceFlag('LocalApic', "Local APIC debugging") TraceFlag('PageTableWalker', \ "Page table walker state machine debugging") + TraceFlag('Faults', "Trace all faults/exceptions/traps") SimObject('X86LocalApic.py') SimObject('X86System.py') diff --git a/src/arch/x86/faults.cc b/src/arch/x86/faults.cc index 964eb0a7f..b81400cc3 100644 --- a/src/arch/x86/faults.cc +++ b/src/arch/x86/faults.cc @@ -103,6 +103,8 @@ namespace X86ISA #if FULL_SYSTEM void X86FaultBase::invoke(ThreadContext * tc) { + Addr pc = tc->readPC(); + DPRINTF(Faults, "RIP %#x: vector %d: %s\n", pc, vector, describe()); using namespace X86ISAInst::RomLabels; HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG); MicroPC entry; @@ -116,7 +118,7 @@ namespace X86ISA entry = extern_label_legacyModeInterrupt; } tc->setIntReg(INTREG_MICRO(1), vector); - tc->setIntReg(INTREG_MICRO(7), tc->readPC()); + tc->setIntReg(INTREG_MICRO(7), pc); if (errorCode != (uint64_t)(-1)) { if (m5reg.mode == LongMode) { entry = extern_label_longModeInterruptWithError; @@ -132,6 +134,18 @@ namespace X86ISA tc->setMicroPC(romMicroPC(entry)); tc->setNextMicroPC(romMicroPC(entry) + 1); } + + std::string + X86FaultBase::describe() const + { + std::stringstream ss; + ccprintf(ss, "%s", mnemonic()); + if (errorCode != (uint64_t)(-1)) { + ccprintf(ss, "(%#x)", errorCode); + } + + return ss.str(); + } void X86Trap::invoke(ThreadContext * tc) { @@ -163,6 +177,14 @@ namespace X86ISA } } + std::string + PageFault::describe() const + { + std::stringstream ss; + ccprintf(ss, "%s at %#x", X86FaultBase::describe(), addr); + return ss.str(); + } + #endif } // namespace X86ISA diff --git a/src/arch/x86/faults.hh b/src/arch/x86/faults.hh index 3753e60e5..cb1a3f18a 100644 --- a/src/arch/x86/faults.hh +++ b/src/arch/x86/faults.hh @@ -62,6 +62,8 @@ #include "base/misc.hh" #include "sim/faults.hh" +#include <string> + namespace X86ISA { // Base class for all x86 "faults" where faults is in the m5 sense @@ -102,6 +104,8 @@ namespace X86ISA #if FULL_SYSTEM void invoke(ThreadContext * tc); + + virtual std::string describe() const; #endif }; @@ -342,6 +346,8 @@ namespace X86ISA #if FULL_SYSTEM void invoke(ThreadContext * tc); + + virtual std::string describe() const; #endif }; @@ -414,7 +420,7 @@ namespace X86ISA { public: SoftwareInterrupt(uint8_t _vector) : - X86Interrupt("Software Interrupt", "INTn", _vector) + X86Interrupt("Software Interrupt", "#INTR", _vector) {} bool isSoft() |