23 files changed, 119 insertions, 117 deletions

diff --git a/src/dev/SConscript b/src/dev/SConscript
index bd6b16c43..82fa5cb02 100644
--- a/src/dev/SConscript
+++ b/src/dev/SConscript
@@ -39,8 +39,8 @@ if env['FULL_SYSTEM']:
     SimObject('Ide.py')
     SimObject('Pci.py')
     SimObject('Platform.py')
-    SimObject('SimConsole.py')
     SimObject('SimpleDisk.py')
+    SimObject('Terminal.py')
     SimObject('Uart.py')
 
     Source('baddev.cc')
@@ -63,14 +63,12 @@ if env['FULL_SYSTEM']:
     Source('pcidev.cc')
     Source('pktfifo.cc')
     Source('platform.cc')
-    Source('simconsole.cc')
     Source('simple_disk.cc')
     Source('sinic.cc')
+    Source('terminal.cc')
     Source('uart.cc')
     Source('uart8250.cc')
 
-    TraceFlag('Console')
-    TraceFlag('ConsoleVerbose')
     TraceFlag('DiskImageRead')
     TraceFlag('DiskImageWrite')
     TraceFlag('DMA')
@@ -92,6 +90,8 @@ if env['FULL_SYSTEM']:
     TraceFlag('PciConfigAll')
     TraceFlag('SimpleDisk')
     TraceFlag('SimpleDiskData')
+    TraceFlag('Terminal')
+    TraceFlag('TerminalVerbose')
     TraceFlag('Uart')
 
     CompoundFlag('DiskImageAll', [ 'DiskImageRead', 'DiskImageWrite' ])
diff --git a/src/dev/SimConsole.py b/src/dev/Terminal.py
index bb8420527..3d97070ba 100644
--- a/src/dev/SimConsole.py
+++ b/src/dev/Terminal.py
@@ -30,10 +30,10 @@ from m5.SimObject import SimObject
 from m5.params import *
 from m5.proxy import *
 
-class SimConsole(SimObject):
-    type = 'SimConsole'
+class Terminal(SimObject):
+    type = 'Terminal'
     append_name = Param.Bool(True, "append name() to filename")
     intr_control = Param.IntrControl(Parent.any, "interrupt controller")
     port = Param.TcpPort(3456, "listen port")
-    number = Param.Int(0, "console number")
+    number = Param.Int(0, "terminal number")
     output = Param.String('console', "file to dump output to")
diff --git a/src/dev/Uart.py b/src/dev/Uart.py
index e32517a4c..c5db3c42f 100644
--- a/src/dev/Uart.py
+++ b/src/dev/Uart.py
@@ -34,7 +34,7 @@ from Device import BasicPioDevice
 class Uart(BasicPioDevice):
     type = 'Uart'
     abstract = True
-    sim_console = Param.SimConsole(Parent.any, "The console")
+    terminal = Param.Terminal(Parent.any, "The terminal")
 
 class Uart8250(Uart):
     type = 'Uart8250'
diff --git a/src/dev/alpha/AlphaConsole.py b/src/dev/alpha/AlphaConsole.py
index 43c7ef954..8983fcbed 100644
--- a/src/dev/alpha/AlphaConsole.py
+++ b/src/dev/alpha/AlphaConsole.py
@@ -34,5 +34,5 @@ class AlphaConsole(BasicPioDevice):
     type = 'AlphaConsole'
     cpu = Param.BaseCPU(Parent.cpu[0], "Processor")
     disk = Param.SimpleDisk("Simple Disk")
-    sim_console = Param.SimConsole(Parent.any, "The Simulator Console")
+    terminal = Param.Terminal(Parent.any, "The console terminal")
     system = Param.AlphaSystem(Parent.any, "system object")
diff --git a/src/dev/alpha/Tsunami.py b/src/dev/alpha/Tsunami.py
index 484976c09..5c5207a33 100644
--- a/src/dev/alpha/Tsunami.py
+++ b/src/dev/alpha/Tsunami.py
@@ -87,7 +87,8 @@ class Tsunami(Platform):
     fb = BadDevice(pio_addr=0x801fc0003d0, devicename='FrameBuffer')
     io = TsunamiIO(pio_addr=0x801fc000000)
     uart = Uart8250(pio_addr=0x801fc0003f8)
-    console = AlphaConsole(pio_addr=0x80200000000, disk=Parent.simple_disk)
+    alpha_console = AlphaConsole(pio_addr=0x80200000000,
+                                 disk=Parent.simple_disk)
 
     # Attach I/O devices to specified bus object.  Can't do this
     # earlier, since the bus object itself is typically defined at the
@@ -120,4 +121,4 @@ class Tsunami(Platform):
         self.fb.pio = bus.port
         self.io.pio = bus.port
         self.uart.pio = bus.port
-        self.console.pio = bus.port
+        self.alpha_console.pio = bus.port
diff --git a/src/dev/alpha/console.cc b/src/dev/alpha/console.cc
index 493a21f99..d7b2b5b02 100644
--- a/src/dev/alpha/console.cc
+++ b/src/dev/alpha/console.cc
@@ -46,8 +46,8 @@
 #include "cpu/thread_context.hh"
 #include "dev/alpha/console.hh"
 #include "dev/platform.hh"
-#include "dev/simconsole.hh"
 #include "dev/simple_disk.hh"
+#include "dev/terminal.hh"
 #include "mem/packet.hh"
 #include "mem/packet_access.hh"
 #include "mem/physical.hh"
@@ -58,7 +58,7 @@ using namespace std;
 using namespace AlphaISA;
 
 AlphaConsole::AlphaConsole(const Params *p)
-    : BasicPioDevice(p), disk(p->disk), console(p->sim_console),
+    : BasicPioDevice(p), disk(p->disk), terminal(p->terminal),
       system(p->system), cpu(p->cpu)
 {
 
@@ -139,7 +139,7 @@ AlphaConsole::read(PacketPtr pkt)
             switch (daddr)
             {
                 case offsetof(AlphaAccess, inputChar):
-                    pkt->set(console->console_in());
+                    pkt->set(terminal->console_in());
                     break;
                 case offsetof(AlphaAccess, cpuClock):
                     pkt->set(alphaAccess->cpuClock);
@@ -228,7 +228,7 @@ AlphaConsole::write(PacketPtr pkt)
         break;
 
       case offsetof(AlphaAccess, outputChar):
-        console->out((char)(val & 0xff));
+        terminal->out((char)(val & 0xff));
         break;
 
       default:
diff --git a/src/dev/alpha/console.hh b/src/dev/alpha/console.hh
index e77a7fad6..b6145ef38 100644
--- a/src/dev/alpha/console.hh
+++ b/src/dev/alpha/console.hh
@@ -43,7 +43,7 @@
 #include "sim/sim_object.hh"
 
 class BaseCPU;
-class SimConsole;
+class Terminal;
 class AlphaSystem;
 class SimpleDisk;
 
@@ -90,7 +90,7 @@ class AlphaConsole : public BasicPioDevice
     SimpleDisk *disk;
 
     /** the system console (the terminal) is accessable from the console */
-    SimConsole *console;
+    Terminal *terminal;
 
     /** a pointer to the system we are running in */
     AlphaSystem *system;
diff --git a/src/dev/alpha/tsunami.cc b/src/dev/alpha/tsunami.cc
index 5bc0de5da..7923fc3f1 100644
--- a/src/dev/alpha/tsunami.cc
+++ b/src/dev/alpha/tsunami.cc
@@ -37,11 +37,11 @@
 #include <vector>
 
 #include "cpu/intr_control.hh"
-#include "dev/simconsole.hh"
 #include "dev/alpha/tsunami_cchip.hh"
 #include "dev/alpha/tsunami_pchip.hh"
 #include "dev/alpha/tsunami_io.hh"
 #include "dev/alpha/tsunami.hh"
+#include "dev/terminal.hh"
 #include "sim/system.hh"
 
 using namespace std;
diff --git a/src/dev/mips/MipsConsole.py b/src/dev/mips/MipsConsole.py
index 36575677a..8b724991a 100644
--- a/src/dev/mips/MipsConsole.py
+++ b/src/dev/mips/MipsConsole.py
@@ -34,5 +34,5 @@ class MipsConsole(BasicPioDevice):
     type = 'MipsConsole'
     cpu = Param.BaseCPU(Parent.cpu[0], "Processor")
     disk = Param.SimpleDisk("Simple Disk")
-    sim_console = Param.SimConsole(Parent.any, "The Simulator Console")
+    terminal = Param.Terminal(Parent.any, "The console terminal")
     system = Param.MipsSystem(Parent.any, "system object")
diff --git a/src/dev/mips/console.cc b/src/dev/mips/console.cc
index 185e1acbc..d1663999a 100755
--- a/src/dev/mips/console.cc
+++ b/src/dev/mips/console.cc
@@ -45,8 +45,8 @@
 #include "cpu/thread_context.hh"
 #include "dev/mips/console.hh"
 #include "dev/platform.hh"
-#include "dev/simconsole.hh"
 #include "dev/simple_disk.hh"
+#include "dev/terminal.hh"
 #include "mem/packet.hh"
 #include "mem/packet_access.hh"
 #include "mem/physical.hh"
@@ -58,7 +58,7 @@ using namespace std;
 using namespace MipsISA;
 
 MipsConsole::MipsConsole(const Params *p)
-  : BasicPioDevice(p), disk(p->disk), console(p->sim_console),
+  : BasicPioDevice(p), disk(p->disk), terminal(p->terminal),
     system(p->system), cpu(p->cpu)
 {
 
@@ -125,7 +125,7 @@ MipsConsole::read(PacketPtr pkt)
                     pkt->set(mipsAccess->intrClockFrequency);
                     break;
                 case offsetof(MipsAccess, inputChar):
-                    pkt->set(console->console_in());
+                    pkt->set(terminal->console_in());
                     break;
                 case offsetof(MipsAccess, cpuClock):
                     pkt->set(mipsAccess->cpuClock);
@@ -215,7 +215,7 @@ MipsConsole::write(PacketPtr pkt)
         break;
 
       case offsetof(MipsAccess, outputChar):
-        console->out((char)(val & 0xff));
+        terminal->out((char)(val & 0xff));
         break;
 
       default:
diff --git a/src/dev/mips/console.hh b/src/dev/mips/console.hh
index 34792090d..a78343f35 100755
--- a/src/dev/mips/console.hh
+++ b/src/dev/mips/console.hh
@@ -43,7 +43,7 @@
 #include "sim/sim_object.hh"
 
 class BaseCPU;
-class SimConsole;
+class Terminal;
 class MipsSystem;
 class SimpleDisk;
 
@@ -89,8 +89,8 @@ class MipsConsole : public BasicPioDevice
     /** the disk must be accessed from the console */
     SimpleDisk *disk;
 
-    /** the system console (the terminal) is accessable from the console */
-    SimConsole *console;
+    /** the system terminal is accessable from the console */
+    Terminal *terminal;
 
     /** a pointer to the system we are running in */
     MipsSystem *system;
diff --git a/src/dev/mips/malta.cc b/src/dev/mips/malta.cc
index 0b1fa15ba..21e79d999 100755
--- a/src/dev/mips/malta.cc
+++ b/src/dev/mips/malta.cc
@@ -38,11 +38,11 @@
 #include <vector>
 
 #include "cpu/intr_control.hh"
-#include "dev/simconsole.hh"
 #include "dev/mips/malta_cchip.hh"
 #include "dev/mips/malta_pchip.hh"
 #include "dev/mips/malta_io.hh"
 #include "dev/mips/malta.hh"
+#include "dev/terminal.hh"
 #include "params/Malta.hh"
 #include "sim/system.hh"
 
diff --git a/src/dev/platform.hh b/src/dev/platform.hh
index 699b168ce..fc556787d 100644
--- a/src/dev/platform.hh
+++ b/src/dev/platform.hh
@@ -46,7 +46,7 @@
 
 class PciConfigAll;
 class IntrControl;
-class SimConsole;
+class Terminal;
 class Uart;
 class System;
 
diff --git a/src/dev/sparc/T1000.py b/src/dev/sparc/T1000.py
index a033e27e2..cbf390737 100644
--- a/src/dev/sparc/T1000.py
+++ b/src/dev/sparc/T1000.py
@@ -29,9 +29,9 @@
 from m5.params import *
 from m5.proxy import *
 from Device import BasicPioDevice, PioDevice, IsaFake, BadAddr
-from Uart import Uart8250
 from Platform import Platform
-from SimConsole import SimConsole
+from Terminal import Terminal
+from Uart import Uart8250
 
 
 class MmDisk(BasicPioDevice):
@@ -98,11 +98,11 @@ class T1000(Platform):
     fake_ssi = IsaFake(pio_addr=0xff00000000, pio_size=0x10000000)
             #warn_access="Accessing SSI -- Unimplemented!")
 
-    hconsole = SimConsole()
+    hterm = Terminal()
     hvuart = Uart8250(pio_addr=0xfff0c2c000)
     htod = DumbTOD()
 
-    pconsole = SimConsole()
+    pterm = Terminal()
     puart0 = Uart8250(pio_addr=0x1f10000000)
 
     iob = Iob()
@@ -116,8 +116,8 @@ class T1000(Platform):
     # earlier, since the bus object itself is typically defined at the
     # System level.
     def attachIO(self, bus):
-        self.hvuart.sim_console = self.hconsole
-        self.puart0.sim_console = self.pconsole
+        self.hvuart.terminal = self.hterm
+        self.puart0.terminal = self.pterm
         self.fake_clk.pio = bus.port
         self.fake_membnks.pio = bus.port
         self.fake_l2_1.pio = bus.port
diff --git a/src/dev/sparc/t1000.cc b/src/dev/sparc/t1000.cc
index 49e44af55..d42b442a1 100644
--- a/src/dev/sparc/t1000.cc
+++ b/src/dev/sparc/t1000.cc
@@ -37,8 +37,8 @@
 #include <vector>
 
 #include "cpu/intr_control.hh"
-#include "dev/simconsole.hh"
 #include "dev/sparc/t1000.hh"
+#include "dev/terminal.hh"
 #include "sim/system.hh"
 
 using namespace std;
diff --git a/src/dev/simconsole.cc b/src/dev/terminal.cc
index e8dc1b210..18c9945bc 100644
--- a/src/dev/simconsole.cc
+++ b/src/dev/terminal.cc
@@ -30,7 +30,7 @@
  */
 
 /* @file
- * Implements the user interface to a serial console
+ * Implements the user interface to a serial terminal
  */
 
 #include <sys/ioctl.h>
@@ -50,7 +50,7 @@
 #include "base/socket.hh"
 #include "base/trace.hh"
 #include "dev/platform.hh"
-#include "dev/simconsole.hh"
+#include "dev/terminal.hh"
 #include "dev/uart.hh"
 
 using namespace std;
@@ -59,38 +59,38 @@ using namespace std;
 /*
  * Poll event for the listen socket
  */
-SimConsole::ListenEvent::ListenEvent(SimConsole *c, int fd, int e)
-    : PollEvent(fd, e), cons(c)
+Terminal::ListenEvent::ListenEvent(Terminal *t, int fd, int e)
+    : PollEvent(fd, e), term(t)
 {
 }
 
 void
-SimConsole::ListenEvent::process(int revent)
+Terminal::ListenEvent::process(int revent)
 {
-    cons->accept();
+    term->accept();
 }
 
 /*
  * Poll event for the data socket
  */
-SimConsole::DataEvent::DataEvent(SimConsole *c, int fd, int e)
-    : PollEvent(fd, e), cons(c)
+Terminal::DataEvent::DataEvent(Terminal *t, int fd, int e)
+    : PollEvent(fd, e), term(t)
 {
 }
 
 void
-SimConsole::DataEvent::process(int revent)
+Terminal::DataEvent::process(int revent)
 {
     if (revent & POLLIN)
-        cons->data();
+        term->data();
     else if (revent & POLLNVAL)
-        cons->detach();
+        term->detach();
 }
 
 /*
- * SimConsole code
+ * Terminal code
  */
-SimConsole::SimConsole(const Params *p)
+Terminal::Terminal(const Params *p)
     : SimObject(p), listenEvent(NULL), dataEvent(NULL), number(p->number),
       data_fd(-1), txbuf(16384), rxbuf(16384), outfile(NULL)
 #if TRACING_ON == 1
@@ -110,7 +110,7 @@ SimConsole::SimConsole(const Params *p)
         listen(p->port);
 }
 
-SimConsole::~SimConsole()
+Terminal::~Terminal()
 {
     if (data_fd != -1)
         ::close(data_fd);
@@ -123,15 +123,15 @@ SimConsole::~SimConsole()
 }
 
 ///////////////////////////////////////////////////////////////////////
-// socket creation and console attach
+// socket creation and terminal attach
 //
 
 void
-SimConsole::listen(int port)
+Terminal::listen(int port)
 {
     while (!listener.listen(port, true)) {
-        DPRINTF(Console,
-                ": can't bind address console port %d inuse PID %d\n",
+        DPRINTF(Terminal,
+                ": can't bind address terminal port %d inuse PID %d\n",
                 port, getpid());
         port++;
     }
@@ -147,14 +147,14 @@ SimConsole::listen(int port)
 }
 
 void
-SimConsole::accept()
+Terminal::accept()
 {
     if (!listener.islistening())
         panic("%s: cannot accept a connection if not listening!", name());
 
     int fd = listener.accept(true);
     if (data_fd != -1) {
-        char message[] = "console already attached!\n";
+        char message[] = "terminal already attached!\n";
         ::write(fd, message, sizeof(message));
         ::close(fd);
         return;
@@ -165,7 +165,7 @@ SimConsole::accept()
     pollQueue.schedule(dataEvent);
 
     stringstream stream;
-    ccprintf(stream, "==== m5 slave console: Console %d ====", number);
+    ccprintf(stream, "==== m5 slave terminal: Terminal %d ====", number);
 
     // we need an actual carriage return followed by a newline for the
     // terminal
@@ -173,13 +173,13 @@ SimConsole::accept()
 
     write((const uint8_t *)stream.str().c_str(), stream.str().size());
 
-    DPRINTFN("attach console %d\n", number);
+    DPRINTFN("attach terminal %d\n", number);
 
     txbuf.readall(data_fd);
 }
 
 void
-SimConsole::detach()
+Terminal::detach()
 {
     if (data_fd != -1) {
         ::close(data_fd);
@@ -190,11 +190,11 @@ SimConsole::detach()
     delete dataEvent;
     dataEvent = NULL;
 
-    DPRINTFN("detach console %d\n", number);
+    DPRINTFN("detach terminal %d\n", number);
 }
 
 void
-SimConsole::data()
+Terminal::data()
 {
     uint8_t buf[1024];
     int len;
@@ -208,10 +208,10 @@ SimConsole::data()
 }
 
 size_t
-SimConsole::read(uint8_t *buf, size_t len)
+Terminal::read(uint8_t *buf, size_t len)
 {
     if (data_fd < 0)
-        panic("Console not properly attached.\n");
+        panic("Terminal not properly attached.\n");
 
     size_t ret;
     do {
@@ -230,12 +230,12 @@ SimConsole::read(uint8_t *buf, size_t len)
     return ret;
 }
 
-// Console output.
+// Terminal output.
 size_t
-SimConsole::write(const uint8_t *buf, size_t len)
+Terminal::write(const uint8_t *buf, size_t len)
 {
     if (data_fd < 0)
-        panic("Console not properly attached.\n");
+        panic("Terminal not properly attached.\n");
 
     size_t ret;
     for (;;) {
@@ -257,7 +257,7 @@ SimConsole::write(const uint8_t *buf, size_t len)
 #define RECEIVE_ERROR (ULL(3) << 62)
 
 uint8_t
-SimConsole::in()
+Terminal::in()
 {
     bool empty;
     uint8_t c;
@@ -268,14 +268,14 @@ SimConsole::in()
     empty = rxbuf.empty();
 
 
-    DPRINTF(ConsoleVerbose, "in: \'%c\' %#02x more: %d\n",
+    DPRINTF(TerminalVerbose, "in: \'%c\' %#02x more: %d\n",
             isprint(c) ? c : ' ', c, !empty);
 
     return c;
 }
 
 uint64_t
-SimConsole::console_in()
+Terminal::console_in()
 {
     uint64_t value;
 
@@ -287,16 +287,16 @@ SimConsole::console_in()
         value = RECEIVE_NONE;
     }
 
-    DPRINTF(ConsoleVerbose, "console_in: return: %#x\n", value);
+    DPRINTF(TerminalVerbose, "console_in: return: %#x\n", value);
 
     return value;
 }
 
 void
-SimConsole::out(char c)
+Terminal::out(char c)
 {
 #if TRACING_ON == 1
-    if (DTRACE(Console)) {
+    if (DTRACE(Terminal)) {
         static char last = '\0';
 
         if (c != '\n' && c != '\r' ||
@@ -306,7 +306,7 @@ SimConsole::out(char c)
                 char *buffer = new char[size + 1];
                 linebuf.read(buffer, size);
                 buffer[size] = '\0';
-                DPRINTF(Console, "%s\n", buffer);
+                DPRINTF(Terminal, "%s\n", buffer);
                 delete [] buffer;
             } else {
                 linebuf.write(c);
@@ -325,13 +325,13 @@ SimConsole::out(char c)
     if (outfile)
         outfile->write(&c, 1);
 
-    DPRINTF(ConsoleVerbose, "out: \'%c\' %#02x\n",
+    DPRINTF(TerminalVerbose, "out: \'%c\' %#02x\n",
             isprint(c) ? c : ' ', (int)c);
 
 }
 
-SimConsole *
-SimConsoleParams::create()
+Terminal *
+TerminalParams::create()
 {
-    return new SimConsole(this);
+    return new Terminal(this);
 }
diff --git a/src/dev/simconsole.hh b/src/dev/terminal.hh
index c8d453960..d2499b6b2 100644
--- a/src/dev/simconsole.hh
+++ b/src/dev/terminal.hh
@@ -30,11 +30,11 @@
  */
 
 /* @file
- * User Console Interface
+ * User Terminal Interface
  */
 
-#ifndef __CONSOLE_HH__
-#define __CONSOLE_HH__
+#ifndef __DEV_TERMINAL_HH__
+#define __DEV_TERMINAL_HH__
 
 #include <iostream>
 
@@ -43,12 +43,12 @@
 #include "base/pollevent.hh"
 #include "base/socket.hh"
 #include "sim/sim_object.hh"
-#include "params/SimConsole.hh"
+#include "params/Terminal.hh"
 
-class ConsoleListener;
+class TerminalListener;
 class Uart;
 
-class SimConsole : public SimObject
+class Terminal : public SimObject
 {
   public:
     Uart *uart;
@@ -57,10 +57,10 @@ class SimConsole : public SimObject
     class ListenEvent : public PollEvent
     {
       protected:
-        SimConsole *cons;
+        Terminal *term;
 
       public:
-        ListenEvent(SimConsole *c, int fd, int e);
+        ListenEvent(Terminal *t, int fd, int e);
         void process(int revent);
     };
 
@@ -70,10 +70,10 @@ class SimConsole : public SimObject
     class DataEvent : public PollEvent
     {
       protected:
-        SimConsole *cons;
+        Terminal *term;
 
       public:
-        DataEvent(SimConsole *c, int fd, int e);
+        DataEvent(Terminal *t, int fd, int e);
         void process(int revent);
     };
 
@@ -85,9 +85,9 @@ class SimConsole : public SimObject
     int data_fd;
 
   public:
-    typedef SimConsoleParams Params;
-    SimConsole(const Params *p);
-    ~SimConsole();
+    typedef TerminalParams Params;
+    Terminal(const Params *p);
+    ~Terminal();
 
   protected:
     ListenSocket listener;
@@ -119,10 +119,10 @@ class SimConsole : public SimObject
     /////////////////
     // OS interface
 
-    // Get a character from the console.
+    // Get a character from the terminal.
     uint8_t  in();
 
-    // get a character from the console in the console specific format
+    // get a character from the terminal in the console specific format
     // corresponds to GETC:
     // retval<63:61>
     //     000: success: character received
@@ -136,11 +136,11 @@ class SimConsole : public SimObject
     // Interrupts are cleared when the buffer is empty.
     uint64_t console_in();
 
-    // Send a character to the console
+    // Send a character to the terminal
     void out(char c);
 
-    //Ask the console if data is available
+    // Ask the terminal if data is available
     bool dataAvailable() { return !rxbuf.empty(); }
 };
 
-#endif // __CONSOLE_HH__
+#endif // __DEV_TERMINAL_HH__
diff --git a/src/dev/uart.cc b/src/dev/uart.cc
index c9a2ae964..ab0ebde2c 100644
--- a/src/dev/uart.cc
+++ b/src/dev/uart.cc
@@ -32,17 +32,17 @@
  * Implements a base class for UARTs
  */
 
-#include "dev/simconsole.hh"
-#include "dev/uart.hh"
 #include "dev/platform.hh"
+#include "dev/terminal.hh"
+#include "dev/uart.hh"
 
 using namespace std;
 
 Uart::Uart(const Params *p)
-    : BasicPioDevice(p), platform(p->platform), cons(p->sim_console)
+    : BasicPioDevice(p), platform(p->platform), term(p->terminal)
 {
     status = 0;
 
     // set back pointers
-    cons->uart = this;
+    term->uart = this;
 }
diff --git a/src/dev/uart.hh b/src/dev/uart.hh
index f5d5e2855..ba10c204c 100644
--- a/src/dev/uart.hh
+++ b/src/dev/uart.hh
@@ -39,7 +39,7 @@
 #include "dev/io_device.hh"
 #include "params/Uart.hh"
 
-class SimConsole;
+class Terminal;
 class Platform;
 
 const int RX_INT = 0x1;
@@ -51,7 +51,7 @@ class Uart : public BasicPioDevice
   protected:
     int status;
     Platform *platform;
-    SimConsole *cons;
+    Terminal *term;
 
   public:
     typedef UartParams Params;
diff --git a/src/dev/uart8250.cc b/src/dev/uart8250.cc
index b4dc93645..eefda76e5 100644
--- a/src/dev/uart8250.cc
+++ b/src/dev/uart8250.cc
@@ -38,9 +38,9 @@
 #include "base/inifile.hh"
 #include "base/str.hh"        // for to_number
 #include "base/trace.hh"
-#include "dev/simconsole.hh"
-#include "dev/uart8250.hh"
 #include "dev/platform.hh"
+#include "dev/terminal.hh"
+#include "dev/uart8250.hh"
 #include "mem/packet.hh"
 #include "mem/packet_access.hh"
 
@@ -120,8 +120,8 @@ Uart8250::read(PacketPtr pkt)
     switch (daddr) {
         case 0x0:
             if (!(LCR & 0x80)) { // read byte
-                if (cons->dataAvailable())
-                    pkt->set(cons->in());
+                if (term->dataAvailable())
+                    pkt->set(term->in());
                 else {
                     pkt->set((uint8_t)0);
                     // A limited amount of these are ok.
@@ -130,7 +130,7 @@ Uart8250::read(PacketPtr pkt)
                 status &= ~RX_INT;
                 platform->clearConsoleInt();
 
-                if (cons->dataAvailable() && (IER & UART_IER_RDI))
+                if (term->dataAvailable() && (IER & UART_IER_RDI))
                     rxIntrEvent.scheduleIntr();
             } else { // dll divisor latch
                ;
@@ -165,7 +165,7 @@ Uart8250::read(PacketPtr pkt)
             uint8_t lsr;
             lsr = 0;
             // check if there are any bytes to be read
-            if (cons->dataAvailable())
+            if (term->dataAvailable())
                 lsr = UART_LSR_DR;
             lsr |= UART_LSR_TEMT | UART_LSR_THRE;
             pkt->set(lsr);
@@ -201,7 +201,7 @@ Uart8250::write(PacketPtr pkt)
     switch (daddr) {
         case 0x0:
             if (!(LCR & 0x80)) { // write byte
-                cons->out(pkt->get<uint8_t>());
+                term->out(pkt->get<uint8_t>());
                 platform->clearConsoleInt();
                 status &= ~TX_INT;
                 if (UART_IER_THRI & IER)
@@ -237,7 +237,7 @@ Uart8250::write(PacketPtr pkt)
                     status &= ~TX_INT;
                 }
 
-                if ((UART_IER_RDI & IER) && cons->dataAvailable()) {
+                if ((UART_IER_RDI & IER) && term->dataAvailable()) {
                     DPRINTF(Uart, "IER: IER_RDI set, scheduling RX intrrupt\n");
                     rxIntrEvent.scheduleIntr();
                 } else {
diff --git a/src/dev/uart8250.hh b/src/dev/uart8250.hh
index 2c69667e1..79c31d5cf 100644
--- a/src/dev/uart8250.hh
+++ b/src/dev/uart8250.hh
@@ -65,7 +65,7 @@ const uint8_t UART_LSR_DR   = 0x01;
 const uint8_t UART_MCR_LOOP = 0x10;
 
 
-class SimConsole;
+class Terminal;
 class Platform;
 
 class Uart8250 : public Uart
diff --git a/src/dev/x86/PC.py b/src/dev/x86/PC.py
index 4ba9e7a8a..5165308ed 100644
--- a/src/dev/x86/PC.py
+++ b/src/dev/x86/PC.py
@@ -28,12 +28,13 @@
 
 from m5.params import *
 from m5.proxy import *
-from Uart import Uart8250
+
 from Device import IsaFake
-from SouthBridge import SouthBridge
-from Platform import Platform
 from Pci import PciConfigAll
-from SimConsole import SimConsole
+from Platform import Platform
+from SouthBridge import SouthBridge
+from Terminal import Terminal
+from Uart import Uart8250
 
 def x86IOAddress(port):
     IO_address_space_base = 0x8000000000000000
@@ -54,11 +55,11 @@ class PC(Platform):
     # but the linux kernel fiddles with them anway.
     behind_pci = IsaFake(pio_addr=x86IOAddress(0xcf8), pio_size=8)
 
-    # Serial port and console
-    console = SimConsole()
+    # Serial port and terminal
+    terminal = Terminal()
     com_1 = Uart8250()
     com_1.pio_addr = x86IOAddress(0x3f8)
-    com_1.sim_console = console
+    com_1.terminal = terminal
 
     def attachIO(self, bus):
         self.south_bridge.pio = bus.port
diff --git a/src/dev/x86/pc.cc b/src/dev/x86/pc.cc
index 0881672d2..d04529ab9 100644
--- a/src/dev/x86/pc.cc
+++ b/src/dev/x86/pc.cc
@@ -39,7 +39,7 @@
 #include "arch/x86/x86_traits.hh"
 #include "dev/intel_8254_timer.hh"
 #include "cpu/intr_control.hh"
-#include "dev/simconsole.hh"
+#include "dev/terminal.hh"
 #include "dev/x86/pc.hh"
 #include "sim/system.hh"