diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/cpu/o3/cpu.cc | 5 | ||||
| -rw-r--r-- | src/cpu/o3/free_list.hh | 2 |
2 files changed, 6 insertions, 1 deletions
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index 8eb17d23b..ff1ee7920 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -682,7 +682,7 @@ FullO3CPU<Impl>::removeThread(unsigned tid) } // Unbind Float Regs from Rename Map - for (int freg = 0; freg < TheISA::NumFloatRegs; freg++) { + for (int freg = TheISA::NumIntRegs; freg < TheISA::NumFloatRegs; freg++) { PhysRegIndex phys_reg = renameMap[tid].lookup(freg); scoreboard.unsetReg(phys_reg); @@ -695,8 +695,11 @@ FullO3CPU<Impl>::removeThread(unsigned tid) decode.squash(tid); rename.squash(squash_seq_num, tid); iew.squash(tid); + //iew.ldstQueue.squash(squash_seq_num, tid); commit.rob->squash(squash_seq_num, tid); + + assert(iew.instQueue.getCount(tid) == 0); assert(iew.ldstQueue.getCount(tid) == 0); // Reset ROB/IQ/LSQ Entries diff --git a/src/cpu/o3/free_list.hh b/src/cpu/o3/free_list.hh index 42fc0c533..d05068800 100644 --- a/src/cpu/o3/free_list.hh +++ b/src/cpu/o3/free_list.hh @@ -173,6 +173,8 @@ SimpleFreeList::addReg(PhysRegIndex freed_reg) #endif freeFloatRegs.push(freed_reg); } + + //assert(freeIntRegs.size() <= numPhysicalIntRegs); } inline void |