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-rw-r--r--src/dev/sparc/SConscript1
-rw-r--r--src/dev/sparc/dtod.cc115
-rw-r--r--src/dev/sparc/dtod.hh67
-rw-r--r--src/python/m5/objects/T1000.py9
4 files changed, 192 insertions, 0 deletions
diff --git a/src/dev/sparc/SConscript b/src/dev/sparc/SConscript
index 63f29846a..44b082b68 100644
--- a/src/dev/sparc/SConscript
+++ b/src/dev/sparc/SConscript
@@ -37,6 +37,7 @@ Import('env')
sources = []
sources += Split('''
+ dtod.cc
t1000.cc
mm_disk.cc
''')
diff --git a/src/dev/sparc/dtod.cc b/src/dev/sparc/dtod.cc
new file mode 100644
index 000000000..30c7baaf5
--- /dev/null
+++ b/src/dev/sparc/dtod.cc
@@ -0,0 +1,115 @@
+/*
+ * Copyright (c) 2004-2006 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ */
+
+/** @file
+ * Time of date device implementation
+ */
+#include <sys/time.h>
+
+#include <deque>
+#include <string>
+#include <vector>
+
+#include "base/trace.hh"
+#include "dev/sparc/dtod.hh"
+#include "dev/platform.hh"
+#include "mem/packet_access.hh"
+#include "mem/port.hh"
+#include "sim/builder.hh"
+#include "sim/system.hh"
+
+using namespace std;
+using namespace TheISA;
+
+DumbTOD::DumbTOD(Params *p)
+ : BasicPioDevice(p), todTime(p->init_time)
+{
+ pioSize = 0x08;
+
+ struct tm tm;
+ gmtime_r((time_t*)&todTime, &tm);
+ DPRINTFN("Real-time clock set to %s\n", asctime(&tm));
+ DPRINTFN("Real-time clock set to %d\n", todTime);
+}
+
+Tick
+DumbTOD::read(PacketPtr pkt)
+{
+ assert(pkt->result == Packet::Unknown);
+ assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
+ assert(pkt->getSize() == 8);
+
+ pkt->allocate();
+ pkt->set(todTime);
+ todTime += 1000;
+
+ pkt->result = Packet::Success;
+ return pioDelay;
+}
+
+Tick
+DumbTOD::write(PacketPtr pkt)
+{
+ panic("Dumb tod device doesn't support writes\n");
+}
+
+BEGIN_DECLARE_SIM_OBJECT_PARAMS(DumbTOD)
+
+ Param<Addr> pio_addr;
+ Param<Tick> pio_latency;
+ SimObjectParam<Platform *> platform;
+ SimObjectParam<System *> system;
+ Param<time_t> time;
+
+END_DECLARE_SIM_OBJECT_PARAMS(DumbTOD)
+
+BEGIN_INIT_SIM_OBJECT_PARAMS(DumbTOD)
+
+ INIT_PARAM(pio_addr, "Device Address"),
+ INIT_PARAM(pio_latency, "Programmed IO latency"),
+ INIT_PARAM(platform, "platform"),
+ INIT_PARAM(system, "system object"),
+ INIT_PARAM(time, "System time to use (0 for actual time")
+
+END_INIT_SIM_OBJECT_PARAMS(DumbTOD)
+
+CREATE_SIM_OBJECT(DumbTOD)
+{
+ DumbTOD::Params *p = new DumbTOD::Params;
+ p->name =getInstanceName();
+ p->pio_addr = pio_addr;
+ p->pio_delay = pio_latency;
+ p->platform = platform;
+ p->system = system;
+ p->init_time = time;
+ return new DumbTOD(p);
+}
+
+REGISTER_SIM_OBJECT("DumbTOD", DumbTOD)
diff --git a/src/dev/sparc/dtod.hh b/src/dev/sparc/dtod.hh
new file mode 100644
index 000000000..7d3a9f628
--- /dev/null
+++ b/src/dev/sparc/dtod.hh
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 206, 2004-2005 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ */
+
+/** @file
+ * This device acts as a simple time of date device. It's implemented as a
+ * simple device register read.
+ */
+
+#ifndef __DEV_SPARC_DTOD_HH__
+#define __DEV_SPARC_DTOD_HH__
+
+#include "base/range.hh"
+#include "dev/io_device.hh"
+
+
+/**
+ * DumbTOD simply returns some idea of time when read. Until we finish with
+ * legion it starts with the start time and increments itself by 1000 each time.
+ */
+class DumbTOD : public BasicPioDevice
+{
+ private:
+ uint64_t todTime;
+
+ public:
+ struct Params : public BasicPioDevice::Params
+ {
+ time_t init_time;
+ };
+ protected:
+ const Params *params() const { return (const Params *)_params; }
+
+ public:
+ DumbTOD(Params *p);
+
+ virtual Tick read(PacketPtr pkt);
+ virtual Tick write(PacketPtr pkt);
+};
+
+#endif // __DEV_BADDEV_HH__
diff --git a/src/python/m5/objects/T1000.py b/src/python/m5/objects/T1000.py
index 030f4abd8..7b93268ac 100644
--- a/src/python/m5/objects/T1000.py
+++ b/src/python/m5/objects/T1000.py
@@ -11,6 +11,12 @@ class MmDisk(BasicPioDevice):
image = Param.DiskImage("Disk Image")
pio_addr = 0x1F40000000
+class DumbTOD(BasicPioDevice):
+ type = 'DumbTOD'
+ time = Param.Time('01/01/2009', "System time to use ('Now' for real time)")
+ pio_addr = 0xfff0c1fff8
+
+
class T1000(Platform):
type = 'T1000'
system = Param.System(Parent.any, "system")
@@ -64,6 +70,8 @@ class T1000(Platform):
warn_access="Accessing SSI -- Unimplemented!")
hvuart = Uart8250(pio_addr=0xfff0c2c000)
+ htod = DumbTOD()
+
puart0 = Uart8250(pio_addr=0x1f10000000)
console = SimConsole(listener = ConsoleListener())
@@ -86,3 +94,4 @@ class T1000(Platform):
self.fake_ssi.pio = bus.port
self.puart0.pio = bus.port
self.hvuart.pio = bus.port
+ self.htod.pio = bus.port
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-30 10:09:08 +0000