diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/cpu/simple/atomic.cc | 7 | ||||
-rw-r--r-- | src/python/m5/__init__.py | 1 | ||||
-rw-r--r-- | src/sim/main.cc | 38 |
3 files changed, 44 insertions, 2 deletions
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index 604c48086..704b65f36 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -183,6 +183,7 @@ AtomicSimpleCPU::unserialize(Checkpoint *cp, const string §ion) void AtomicSimpleCPU::resume() { + DPRINTF(SimpleCPU, "Resume\n"); if (_status != SwitchedOut && _status != Idle) { assert(system->getMemoryMode() == Enums::atomic); @@ -231,6 +232,8 @@ AtomicSimpleCPU::takeOverFrom(BaseCPU *oldCPU) void AtomicSimpleCPU::activateContext(int thread_num, int delay) { + DPRINTF(SimpleCPU, "ActivateContext %d (%d cycles)\n", thread_num, delay); + assert(thread_num == 0); assert(thread); @@ -248,6 +251,8 @@ AtomicSimpleCPU::activateContext(int thread_num, int delay) void AtomicSimpleCPU::suspendContext(int thread_num) { + DPRINTF(SimpleCPU, "SuspendContext %d\n", thread_num); + assert(thread_num == 0); assert(thread); @@ -483,6 +488,8 @@ AtomicSimpleCPU::write(int32_t data, Addr addr, unsigned flags, uint64_t *res) void AtomicSimpleCPU::tick() { + DPRINTF(SimpleCPU, "Tick\n"); + Tick latency = cycles(1); // instruction takes one cycle by default for (int i = 0; i < width; ++i) { diff --git a/src/python/m5/__init__.py b/src/python/m5/__init__.py index 96cb2ca13..f21bb362e 100644 --- a/src/python/m5/__init__.py +++ b/src/python/m5/__init__.py @@ -92,6 +92,7 @@ if running_m5: from event import * from simulate import * from main import options + import stats import SimObject import params diff --git a/src/sim/main.cc b/src/sim/main.cc index 5bf4add4b..62ab9445b 100644 --- a/src/sim/main.cc +++ b/src/sim/main.cc @@ -76,6 +76,39 @@ abortHandler(int sigtype) } int +python_main() +{ + PyObject *module; + PyObject *dict; + PyObject *result; + + module = PyImport_AddModule("__main__"); + if (module == NULL) + fatal("Could not import __main__"); + + dict = PyModule_GetDict(module); + + result = PyRun_String("import m5.main", Py_file_input, dict, dict); + if (!result) { + PyErr_Print(); + return 1; + } + Py_DECREF(result); + + result = PyRun_String("m5.main.main()", Py_file_input, dict, dict); + if (!result) { + PyErr_Print(); + return 1; + } + Py_DECREF(result); + + if (Py_FlushLine()) + PyErr_Clear(); + + return 0; +} + +int main(int argc, char **argv) { signal(SIGFPE, SIG_IGN); // may occur on misspeculated paths @@ -114,9 +147,10 @@ main(int argc, char **argv) // initialize SWIG modules init_swig(); - PyRun_SimpleString("import m5.main"); - PyRun_SimpleString("m5.main.main()"); + int ret = python_main(); // clean up Python intepreter. Py_Finalize(); + + return ret; } |