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-rw-r--r--src/cpu/o3/cpu.cc4
-rw-r--r--src/cpu/simple/atomic.cc4
-rw-r--r--src/cpu/simple/timing.cc4
3 files changed, 8 insertions, 4 deletions
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 2613a8da3..78fbd6694 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -1192,8 +1192,6 @@ FullO3CPU<Impl>::signalDrained()
setDrainState(Drainable::Drained);
- BaseCPU::switchOut();
-
if (drainManager) {
DPRINTF(Drain, "CPU done draining, processing drain event\n");
drainManager->signalDrainDone();
@@ -1207,6 +1205,8 @@ template <class Impl>
void
FullO3CPU<Impl>::switchOut()
{
+ BaseCPU::switchOut();
+
fetch.switchOut();
rename.switchOut();
iew.switchOut();
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index fffbb55d6..2d026e733 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -177,6 +177,8 @@ AtomicSimpleCPU::drainResume()
void
AtomicSimpleCPU::switchOut()
{
+ BaseSimpleCPU::switchOut();
+
assert(_status == BaseSimpleCPU::Running || _status == Idle);
_status = SwitchedOut;
@@ -187,7 +189,7 @@ AtomicSimpleCPU::switchOut()
void
AtomicSimpleCPU::takeOverFrom(BaseCPU *oldCPU)
{
- BaseCPU::takeOverFrom(oldCPU);
+ BaseSimpleCPU::takeOverFrom(oldCPU);
assert(!tickEvent.scheduled());
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index d3959c895..121db090b 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -163,6 +163,8 @@ TimingSimpleCPU::drainResume()
void
TimingSimpleCPU::switchOut()
{
+ BaseSimpleCPU::switchOut();
+
assert(_status == BaseSimpleCPU::Running || _status == Idle);
_status = SwitchedOut;
numCycles += curCycle() - previousCycle;
@@ -177,7 +179,7 @@ TimingSimpleCPU::switchOut()
void
TimingSimpleCPU::takeOverFrom(BaseCPU *oldCPU)
{
- BaseCPU::takeOverFrom(oldCPU);
+ BaseSimpleCPU::takeOverFrom(oldCPU);
// if any of this CPU's ThreadContexts are active, mark the CPU as
// running and schedule its tick event.