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-rw-r--r--src/SConscript28
-rw-r--r--src/arch/arm/stacktrace.hh1
-rw-r--r--src/arch/isa_specific.hh70
-rw-r--r--src/base/cp_annotate.cc1
-rw-r--r--src/base/cp_annotate.hh1
-rw-r--r--src/base/remote_gdb.cc2
-rw-r--r--src/cpu/base.hh1
-rw-r--r--src/cpu/base_dyn_inst.hh1
-rw-r--r--src/cpu/base_dyn_inst_impl.hh7
-rw-r--r--src/cpu/checker/cpu_impl.hh1
-rw-r--r--src/cpu/checker/thread_context.hh1
-rw-r--r--src/cpu/exetrace.cc1
-rw-r--r--src/cpu/inorder/cpu.cc19
-rw-r--r--src/cpu/inorder/cpu.hh1
-rw-r--r--src/cpu/inorder/inorder_dyn_inst.cc9
-rw-r--r--src/cpu/inorder/inorder_dyn_inst.hh18
-rw-r--r--src/cpu/inorder/inorder_trace.cc1
-rw-r--r--src/cpu/inorder/pipeline_stage.cc1
-rw-r--r--src/cpu/inorder/reg_dep_map.cc1
-rw-r--r--src/cpu/inorder/reg_dep_map.hh1
-rw-r--r--src/cpu/inorder/resources/bpred_unit.cc1
-rw-r--r--src/cpu/inorder/resources/branch_predictor.cc1
-rw-r--r--src/cpu/inorder/resources/cache_unit.cc2
-rw-r--r--src/cpu/inorder/resources/cache_unit.hh10
-rw-r--r--src/cpu/inorder/resources/decode_unit.cc1
-rw-r--r--src/cpu/inorder/resources/fetch_seq_unit.cc1
-rw-r--r--src/cpu/inorder/resources/fetch_seq_unit.hh1
-rw-r--r--src/cpu/inorder/resources/inst_buffer.cc2
-rw-r--r--src/cpu/inorder/resources/inst_buffer_new.cc2
-rw-r--r--src/cpu/inorder/resources/tlb_unit.cc2
-rw-r--r--src/cpu/inorder/resources/tlb_unit.hh1
-rw-r--r--src/cpu/inorder/resources/use_def.cc2
-rw-r--r--src/cpu/inorder/thread_context.cc1
-rw-r--r--src/cpu/inorder/thread_context.hh1
-rw-r--r--src/cpu/inteltrace.cc1
-rw-r--r--src/cpu/legiontrace.cc2
-rw-r--r--src/cpu/o3/bpred_unit_impl.hh6
-rw-r--r--src/cpu/o3/commit_impl.hh1
-rw-r--r--src/cpu/o3/cpu.cc2
-rw-r--r--src/cpu/o3/cpu.hh1
-rw-r--r--src/cpu/o3/decode_impl.hh1
-rw-r--r--src/cpu/o3/dyn_inst.hh1
-rw-r--r--src/cpu/o3/fetch.hh1
-rw-r--r--src/cpu/o3/fetch_impl.hh1
-rw-r--r--src/cpu/o3/free_list.hh1
-rw-r--r--src/cpu/o3/iew_impl.hh1
-rw-r--r--src/cpu/o3/impl.hh2
-rw-r--r--src/cpu/o3/lsq_unit.hh1
-rw-r--r--src/cpu/o3/lsq_unit_impl.hh2
-rw-r--r--src/cpu/o3/regfile.hh5
-rw-r--r--src/cpu/o3/rename.hh1
-rw-r--r--src/cpu/o3/rename_impl.hh1
-rw-r--r--src/cpu/o3/rename_map.hh3
-rw-r--r--src/cpu/o3/rob.hh2
-rw-r--r--src/cpu/o3/scoreboard.cc2
-rwxr-xr-xsrc/cpu/o3/thread_context.hh1
-rwxr-xr-xsrc/cpu/o3/thread_context_impl.hh1
-rw-r--r--src/cpu/ozone/cpu.hh1
-rw-r--r--src/cpu/ozone/cpu_impl.hh1
-rw-r--r--src/cpu/ozone/dyn_inst.hh1
-rw-r--r--src/cpu/ozone/dyn_inst_impl.hh1
-rw-r--r--src/cpu/ozone/front_end.hh1
-rw-r--r--src/cpu/ozone/front_end_impl.hh4
-rw-r--r--src/cpu/ozone/inorder_back_end_impl.hh1
-rw-r--r--src/cpu/ozone/lsq_unit.hh1
-rw-r--r--src/cpu/ozone/lsq_unit_impl.hh1
-rw-r--r--src/cpu/ozone/lw_back_end_impl.hh2
-rw-r--r--src/cpu/ozone/lw_lsq.hh1
-rw-r--r--src/cpu/ozone/lw_lsq_impl.hh4
-rw-r--r--src/cpu/ozone/rename_table.hh1
-rw-r--r--src/cpu/ozone/rename_table_impl.hh2
-rw-r--r--src/cpu/ozone/simple_params.hh1
-rw-r--r--src/cpu/ozone/thread_state.hh5
-rw-r--r--src/cpu/profile.hh1
-rw-r--r--src/cpu/simple/atomic.cc1
-rw-r--r--src/cpu/simple/base.cc1
-rw-r--r--src/cpu/simple/base.hh1
-rw-r--r--src/cpu/simple/timing.cc1
-rw-r--r--src/cpu/simple_thread.cc1
-rw-r--r--src/cpu/simple_thread.hh1
-rw-r--r--src/cpu/static_inst.hh1
-rw-r--r--src/cpu/thread_context.cc1
-rw-r--r--src/cpu/thread_context.hh1
-rw-r--r--src/cpu/thread_state.hh1
-rw-r--r--src/dev/alpha/tsunami.cc1
-rw-r--r--src/dev/alpha/tsunami_cchip.cc1
-rw-r--r--src/dev/alpha/tsunami_io.cc1
-rw-r--r--src/dev/alpha/tsunami_pchip.cc1
-rw-r--r--src/dev/baddev.cc1
-rw-r--r--src/dev/ide_disk.cc1
-rwxr-xr-xsrc/dev/mips/malta.cc2
-rwxr-xr-xsrc/dev/mips/malta_cchip.cc3
-rwxr-xr-xsrc/dev/mips/malta_io.cc1
-rwxr-xr-xsrc/dev/mips/malta_pchip.cc1
-rw-r--r--src/dev/ns_gige.cc1
-rw-r--r--src/dev/platform.cc1
-rw-r--r--src/dev/sinic.cc1
-rw-r--r--src/dev/sparc/dtod.cc1
-rw-r--r--src/dev/sparc/t1000.cc1
-rw-r--r--src/dev/uart8250.cc1
-rw-r--r--src/dev/x86/pc.cc1
-rw-r--r--src/kern/linux/printk.hh2
-rw-r--r--src/kern/system_events.cc2
-rw-r--r--src/kern/tru64/dump_mbuf.cc1
-rw-r--r--src/kern/tru64/tru64.hh2
-rw-r--r--src/kern/tru64/tru64_events.cc1
-rw-r--r--src/mem/cache/builder.cc3
-rw-r--r--src/mem/cache/prefetch/base.cc4
-rw-r--r--src/mem/packet_access.hh1
-rw-r--r--src/mem/page_table.cc1
-rw-r--r--src/mem/page_table.hh1
-rw-r--r--src/mem/physical.cc1
-rw-r--r--src/mem/port_impl.hh3
-rw-r--r--src/mem/rubymem.cc1
-rw-r--r--src/mem/translating_port.cc2
-rw-r--r--src/mem/vport.cc1
-rw-r--r--src/sim/arguments.cc5
-rw-r--r--src/sim/process.cc2
-rw-r--r--src/sim/process.hh8
-rw-r--r--src/sim/pseudo_inst.cc4
-rw-r--r--src/sim/syscall_emul.cc2
-rw-r--r--src/sim/syscall_emul.hh1
-rw-r--r--src/sim/system.cc3
-rw-r--r--src/sim/system.hh8
124 files changed, 202 insertions, 150 deletions
diff --git a/src/SConscript b/src/SConscript
index d3323f0a0..705d76b1d 100644
--- a/src/SConscript
+++ b/src/SConscript
@@ -228,9 +228,6 @@ env.Append(CPPPATH=Dir('.'))
for extra_dir in extras_dir_list:
env.Append(CPPPATH=Dir(extra_dir))
-# Add a flag defining what THE_ISA should be for all compilation
-env.Append(CPPDEFINES=[('THE_ISA','%s_ISA' % env['TARGET_ISA'].upper())])
-
# Workaround for bug in SCons version > 0.97d20071212
# Scons bug id: 2006 M5 Bug id: 308
for root, dirs, files in os.walk(base_dir, topdown=True):
@@ -261,6 +258,31 @@ for extra_dir in extras_dir_list:
for opt in export_vars:
env.ConfigFile(opt)
+def makeTheISA(source, target, env):
+ f = file(str(target[0]), 'w')
+
+ isas = [ src.get_contents() for src in source ]
+ target = env['TARGET_ISA']
+ def define(isa):
+ return isa.upper() + '_ISA'
+
+ def namespace(isa):
+ return isa[0].upper() + isa[1:].lower() + 'ISA'
+
+
+ print >>f, '#ifndef __CONFIG_THE_ISA_HH__'
+ print >>f, '#define __CONFIG_THE_ISA_HH__'
+ print >>f
+ for i,isa in enumerate(isas):
+ print >>f, '#define %s %d' % (define(isa), i + 1)
+ print >>f
+ print >>f, '#define THE_ISA %s' % (define(target))
+ print >>f, '#define TheISA %s' % (namespace(target))
+ print >>f
+ print >>f, '#endif // __CONFIG_THE_ISA_HH__'
+
+env.Command('config/the_isa.hh', map(Value, all_isa_list), makeTheISA)
+
########################################################################
#
# Prevent any SimObjects from being added after this point, they
diff --git a/src/arch/arm/stacktrace.hh b/src/arch/arm/stacktrace.hh
index 3f9c91096..c5225455c 100644
--- a/src/arch/arm/stacktrace.hh
+++ b/src/arch/arm/stacktrace.hh
@@ -34,6 +34,7 @@
#define __ARCH_ARM_STACKTRACE_HH__
#include "base/trace.hh"
+#include "config/the_isa.hh"
#include "cpu/static_inst.hh"
class ThreadContext;
diff --git a/src/arch/isa_specific.hh b/src/arch/isa_specific.hh
deleted file mode 100644
index de070bbf9..000000000
--- a/src/arch/isa_specific.hh
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Gabe Black
- */
-
-#ifndef __ARCH_ISA_SPECIFIC_HH__
-#define __ARCH_ISA_SPECIFIC_HH__
-
-//This file provides a mechanism for other source code to bring in
-//files from the ISA being compiled in.
-
-//These are constants so you can selectively compile code based on the isa.
-//To use them, do something like:
-//
-//#if THE_ISA == YOUR_FAVORITE_ISA
-// conditional_code
-//#endif
-//
-//Note that this is how this file sets up the TheISA macro.
-
-//These macros have numerical values because otherwise the preprocessor
-//would treat them as 0 in comparisons.
-#define ALPHA_ISA 21064
-#define SPARC_ISA 42
-#define MIPS_ISA 34000
-#define X86_ISA 8086
-#define ARM_ISA 6
-
-//These tell the preprocessor where to find the files of a particular
-//ISA, and set the "TheISA" macro for use elsewhere.
-#if THE_ISA == ALPHA_ISA
- #define TheISA AlphaISA
-#elif THE_ISA == SPARC_ISA
- #define TheISA SparcISA
-#elif THE_ISA == MIPS_ISA
- #define TheISA MipsISA
-#elif THE_ISA == X86_ISA
- #define TheISA X86ISA
-#elif THE_ISA == ARM_ISA
- #define TheISA ArmISA
-#else
- #error "THE_ISA not set"
-#endif
-
-#endif
diff --git a/src/base/cp_annotate.cc b/src/base/cp_annotate.cc
index 0aba2d999..4e138a6dd 100644
--- a/src/base/cp_annotate.cc
+++ b/src/base/cp_annotate.cc
@@ -35,6 +35,7 @@
#include "base/loader/object_file.hh"
#include "base/output.hh"
#include "base/trace.hh"
+#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
#include "sim/arguments.hh"
#include "sim/core.hh"
diff --git a/src/base/cp_annotate.hh b/src/base/cp_annotate.hh
index 05d8129d0..4248c070a 100644
--- a/src/base/cp_annotate.hh
+++ b/src/base/cp_annotate.hh
@@ -41,6 +41,7 @@
#include "base/trace.hh"
#include "base/types.hh"
#include "config/cp_annotate.hh"
+#include "config/the_isa.hh"
#include "sim/serialize.hh"
#include "sim/startup.hh"
#include "sim/system.hh"
diff --git a/src/base/remote_gdb.cc b/src/base/remote_gdb.cc
index 6c301b10e..c54379c23 100644
--- a/src/base/remote_gdb.cc
+++ b/src/base/remote_gdb.cc
@@ -131,9 +131,9 @@
#include "base/remote_gdb.hh"
#include "base/socket.hh"
#include "base/trace.hh"
+#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
#include "cpu/static_inst.hh"
-//#include "mem/physical.hh"
#include "mem/port.hh"
#include "mem/translating_port.hh"
#include "sim/system.hh"
diff --git a/src/cpu/base.hh b/src/cpu/base.hh
index 441d9b5dd..bfeec0870 100644
--- a/src/cpu/base.hh
+++ b/src/cpu/base.hh
@@ -38,6 +38,7 @@
#include "arch/microcode_rom.hh"
#include "base/statistics.hh"
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "sim/eventq.hh"
#include "sim/insttracer.hh"
#include "mem/mem_object.hh"
diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh
index f4ff88209..31206c81e 100644
--- a/src/cpu/base_dyn_inst.hh
+++ b/src/cpu/base_dyn_inst.hh
@@ -39,6 +39,7 @@
#include "base/fast_alloc.hh"
#include "base/trace.hh"
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "cpu/o3/comm.hh"
#include "cpu/exetrace.hh"
#include "cpu/inst_seq.hh"
diff --git a/src/cpu/base_dyn_inst_impl.hh b/src/cpu/base_dyn_inst_impl.hh
index 4ee7d2f2c..70c91ceda 100644
--- a/src/cpu/base_dyn_inst_impl.hh
+++ b/src/cpu/base_dyn_inst_impl.hh
@@ -35,12 +35,11 @@
#include "base/cprintf.hh"
#include "base/trace.hh"
-
-#include "sim/faults.hh"
+#include "config/the_isa.hh"
+#include "cpu/base_dyn_inst.hh"
#include "cpu/exetrace.hh"
#include "mem/request.hh"
-
-#include "cpu/base_dyn_inst.hh"
+#include "sim/faults.hh"
#define NOHASH
#ifndef NOHASH
diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh
index 26571ed68..81f494630 100644
--- a/src/cpu/checker/cpu_impl.hh
+++ b/src/cpu/checker/cpu_impl.hh
@@ -32,6 +32,7 @@
#include <string>
#include "base/refcnt.hh"
+#include "config/the_isa.hh"
#include "cpu/base_dyn_inst.hh"
#include "cpu/checker/cpu.hh"
#include "cpu/simple_thread.hh"
diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh
index d38bd2915..ef7d4c643 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -32,6 +32,7 @@
#define __CPU_CHECKER_THREAD_CONTEXT_HH__
#include "arch/types.hh"
+#include "config/the_isa.hh"
#include "cpu/checker/cpu.hh"
#include "cpu/simple_thread.hh"
#include "cpu/thread_context.hh"
diff --git a/src/cpu/exetrace.cc b/src/cpu/exetrace.cc
index ea53fb6f5..07be700bb 100644
--- a/src/cpu/exetrace.cc
+++ b/src/cpu/exetrace.cc
@@ -38,6 +38,7 @@
#include "cpu/exetrace.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
+#include "config/the_isa.hh"
#include "enums/OpClass.hh"
using namespace std;
diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc
index 4107ac3b4..486edc87b 100644
--- a/src/cpu/inorder/cpu.cc
+++ b/src/cpu/inorder/cpu.cc
@@ -33,21 +33,22 @@
#include "arch/utility.hh"
#include "config/full_system.hh"
-#include "cpu/exetrace.hh"
+#include "config/the_isa.hh"
#include "cpu/activity.hh"
-#include "cpu/simple_thread.hh"
-#include "cpu/thread_context.hh"
#include "cpu/base.hh"
-#include "cpu/inorder/inorder_dyn_inst.hh"
-#include "cpu/inorder/thread_context.hh"
-#include "cpu/inorder/thread_state.hh"
+#include "cpu/exetrace.hh"
#include "cpu/inorder/cpu.hh"
-#include "params/InOrderCPU.hh"
-#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/first_stage.hh"
-#include "cpu/inorder/resources/resource_list.hh"
+#include "cpu/inorder/inorder_dyn_inst.hh"
+#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/resource_pool.hh"
+#include "cpu/inorder/resources/resource_list.hh"
+#include "cpu/inorder/thread_context.hh"
+#include "cpu/inorder/thread_state.hh"
+#include "cpu/simple_thread.hh"
+#include "cpu/thread_context.hh"
#include "mem/translating_port.hh"
+#include "params/InOrderCPU.hh"
#include "sim/process.hh"
#include "sim/stat_control.hh"
diff --git a/src/cpu/inorder/cpu.hh b/src/cpu/inorder/cpu.hh
index 9fb8e0df4..3320532ba 100644
--- a/src/cpu/inorder/cpu.hh
+++ b/src/cpu/inorder/cpu.hh
@@ -45,6 +45,7 @@
#include "base/timebuf.hh"
#include "base/types.hh"
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "cpu/activity.hh"
#include "cpu/base.hh"
#include "cpu/simple_thread.hh"
diff --git a/src/cpu/inorder/inorder_dyn_inst.cc b/src/cpu/inorder/inorder_dyn_inst.cc
index 9f0927b2f..5ab839615 100644
--- a/src/cpu/inorder/inorder_dyn_inst.cc
+++ b/src/cpu/inorder/inorder_dyn_inst.cc
@@ -34,15 +34,14 @@
#include <string>
#include <sstream>
+#include "arch/faults.hh"
#include "base/cprintf.hh"
#include "base/trace.hh"
-
-#include "arch/faults.hh"
+#include "config/the_isa.hh"
#include "cpu/exetrace.hh"
-#include "mem/request.hh"
-
-#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/cpu.hh"
+#include "cpu/inorder/inorder_dyn_inst.hh"
+#include "mem/request.hh"
using namespace std;
using namespace TheISA;
diff --git a/src/cpu/inorder/inorder_dyn_inst.hh b/src/cpu/inorder/inorder_dyn_inst.hh
index a91c6a763..522b4e8d7 100644
--- a/src/cpu/inorder/inorder_dyn_inst.hh
+++ b/src/cpu/inorder/inorder_dyn_inst.hh
@@ -37,28 +37,28 @@
#include <list>
#include <string>
-#include "arch/isa_traits.hh"
#include "arch/faults.hh"
-#include "arch/types.hh"
+#include "arch/isa_traits.hh"
#include "arch/mt.hh"
+#include "arch/types.hh"
#include "base/fast_alloc.hh"
#include "base/trace.hh"
#include "base/types.hh"
-#include "cpu/inorder/inorder_trace.hh"
#include "config/full_system.hh"
-#include "cpu/thread_context.hh"
+#include "config/the_isa.hh"
#include "cpu/exetrace.hh"
+#include "cpu/inorder/inorder_trace.hh"
+#include "cpu/inorder/pipeline_traits.hh"
+#include "cpu/inorder/resource.hh"
+#include "cpu/inorder/thread_state.hh"
#include "cpu/inst_seq.hh"
#include "cpu/op_class.hh"
#include "cpu/static_inst.hh"
-#include "cpu/inorder/thread_state.hh"
-#include "cpu/inorder/resource.hh"
-#include "cpu/inorder/pipeline_traits.hh"
+#include "cpu/thread_context.hh"
#include "mem/packet.hh"
#include "sim/system.hh"
-#include "sim/faults.hh"
-#if THE_ISA==ALPHA_ISA
+#if THE_ISA == ALPHA_ISA
#include "arch/alpha/ev5.hh"
#endif
diff --git a/src/cpu/inorder/inorder_trace.cc b/src/cpu/inorder/inorder_trace.cc
index f12a1b7a9..90c94a4f5 100644
--- a/src/cpu/inorder/inorder_trace.cc
+++ b/src/cpu/inorder/inorder_trace.cc
@@ -31,6 +31,7 @@
#include <iomanip>
+#include "config/the_isa.hh"
#include "cpu/exetrace.hh"
#include "cpu/inorder/inorder_trace.hh"
#include "cpu/static_inst.hh"
diff --git a/src/cpu/inorder/pipeline_stage.cc b/src/cpu/inorder/pipeline_stage.cc
index 46b1cbad0..dc0378bf3 100644
--- a/src/cpu/inorder/pipeline_stage.cc
+++ b/src/cpu/inorder/pipeline_stage.cc
@@ -30,6 +30,7 @@
*/
#include "base/str.hh"
+#include "config/the_isa.hh"
#include "cpu/inorder/pipeline_stage.hh"
#include "cpu/inorder/resource_pool.hh"
#include "cpu/inorder/cpu.hh"
diff --git a/src/cpu/inorder/reg_dep_map.cc b/src/cpu/inorder/reg_dep_map.cc
index a405b1fb9..51782a588 100644
--- a/src/cpu/inorder/reg_dep_map.cc
+++ b/src/cpu/inorder/reg_dep_map.cc
@@ -30,6 +30,7 @@
*/
#include "arch/isa_traits.hh"
+#include "config/the_isa.hh"
#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/reg_dep_map.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
diff --git a/src/cpu/inorder/reg_dep_map.hh b/src/cpu/inorder/reg_dep_map.hh
index ba2a8c8a3..b78e211bb 100644
--- a/src/cpu/inorder/reg_dep_map.hh
+++ b/src/cpu/inorder/reg_dep_map.hh
@@ -36,6 +36,7 @@
#include <vector>
#include "arch/isa_traits.hh"
+#include "config/the_isa.hh"
#include "cpu/inorder/pipeline_traits.hh"
class InOrderCPU;
diff --git a/src/cpu/inorder/resources/bpred_unit.cc b/src/cpu/inorder/resources/bpred_unit.cc
index 2ed8586aa..0e8526fa1 100644
--- a/src/cpu/inorder/resources/bpred_unit.cc
+++ b/src/cpu/inorder/resources/bpred_unit.cc
@@ -33,6 +33,7 @@
#include "base/trace.hh"
#include "base/traceflags.hh"
+#include "config/the_isa.hh"
#include "cpu/inorder/resources/bpred_unit.hh"
using namespace std;
diff --git a/src/cpu/inorder/resources/branch_predictor.cc b/src/cpu/inorder/resources/branch_predictor.cc
index 905de0794..ecac5fff0 100644
--- a/src/cpu/inorder/resources/branch_predictor.cc
+++ b/src/cpu/inorder/resources/branch_predictor.cc
@@ -29,6 +29,7 @@
*
*/
+#include "config/the_isa.hh"
#include "cpu/inorder/resources/branch_predictor.hh"
using namespace std;
diff --git a/src/cpu/inorder/resources/cache_unit.cc b/src/cpu/inorder/resources/cache_unit.cc
index 5677810f6..eb66e10f8 100644
--- a/src/cpu/inorder/resources/cache_unit.cc
+++ b/src/cpu/inorder/resources/cache_unit.cc
@@ -31,10 +31,12 @@
#include <vector>
#include <list>
+
#include "arch/isa_traits.hh"
#include "arch/locked_mem.hh"
#include "arch/utility.hh"
#include "arch/predecoder.hh"
+#include "config/the_isa.hh"
#include "cpu/inorder/resources/cache_unit.hh"
#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/cpu.hh"
diff --git a/src/cpu/inorder/resources/cache_unit.hh b/src/cpu/inorder/resources/cache_unit.hh
index 8946ad5d3..c467e9771 100644
--- a/src/cpu/inorder/resources/cache_unit.hh
+++ b/src/cpu/inorder/resources/cache_unit.hh
@@ -36,17 +36,17 @@
#include <list>
#include <string>
-#include "arch/tlb.hh"
#include "arch/predecoder.hh"
-#include "cpu/inorder/resource.hh"
+#include "arch/tlb.hh"
+#include "config/the_isa.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
+#include "cpu/inorder/pipeline_traits.hh"
+#include "cpu/inorder/resource.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "mem/port.hh"
-#include "cpu/inorder/pipeline_traits.hh"
-#include "sim/sim_object.hh"
-
#include "params/InOrderCPU.hh"
+#include "sim/sim_object.hh"
class CacheRequest;
typedef CacheRequest* CacheReqPtr;
diff --git a/src/cpu/inorder/resources/decode_unit.cc b/src/cpu/inorder/resources/decode_unit.cc
index 033c318f2..33f5aba1a 100644
--- a/src/cpu/inorder/resources/decode_unit.cc
+++ b/src/cpu/inorder/resources/decode_unit.cc
@@ -29,6 +29,7 @@
*
*/
+#include "config/the_isa.hh"
#include "cpu/inorder/resources/decode_unit.hh"
using namespace TheISA;
diff --git a/src/cpu/inorder/resources/fetch_seq_unit.cc b/src/cpu/inorder/resources/fetch_seq_unit.cc
index bc809b040..1d0b92075 100644
--- a/src/cpu/inorder/resources/fetch_seq_unit.cc
+++ b/src/cpu/inorder/resources/fetch_seq_unit.cc
@@ -29,6 +29,7 @@
*
*/
+#include "config/the_isa.hh"
#include "cpu/inorder/resources/fetch_seq_unit.hh"
#include "cpu/inorder/resource_pool.hh"
diff --git a/src/cpu/inorder/resources/fetch_seq_unit.hh b/src/cpu/inorder/resources/fetch_seq_unit.hh
index 3e18d47cb..a4495564b 100644
--- a/src/cpu/inorder/resources/fetch_seq_unit.hh
+++ b/src/cpu/inorder/resources/fetch_seq_unit.hh
@@ -36,6 +36,7 @@
#include <list>
#include <string>
+#include "config/the_isa.hh"
#include "cpu/inorder/resource.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/pipeline_traits.hh"
diff --git a/src/cpu/inorder/resources/inst_buffer.cc b/src/cpu/inorder/resources/inst_buffer.cc
index 21df1d053..bb308b0ea 100644
--- a/src/cpu/inorder/resources/inst_buffer.cc
+++ b/src/cpu/inorder/resources/inst_buffer.cc
@@ -31,7 +31,9 @@
#include <vector>
#include <list>
+
#include "arch/isa_traits.hh"
+#include "config/the_isa.hh"
#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/resources/inst_buffer.hh"
#include "cpu/inorder/cpu.hh"
diff --git a/src/cpu/inorder/resources/inst_buffer_new.cc b/src/cpu/inorder/resources/inst_buffer_new.cc
index cc534ef3e..2e5a9666a 100644
--- a/src/cpu/inorder/resources/inst_buffer_new.cc
+++ b/src/cpu/inorder/resources/inst_buffer_new.cc
@@ -31,7 +31,9 @@
#include <vector>
#include <list>
+
#include "arch/isa_traits.hh"
+#include "config/the_isa.hh"
#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/resources/inst_buffer.hh"
#include "cpu/inorder/cpu.hh"
diff --git a/src/cpu/inorder/resources/tlb_unit.cc b/src/cpu/inorder/resources/tlb_unit.cc
index 95bade36a..0410d6b24 100644
--- a/src/cpu/inorder/resources/tlb_unit.cc
+++ b/src/cpu/inorder/resources/tlb_unit.cc
@@ -31,7 +31,9 @@
#include <vector>
#include <list>
+
#include "arch/isa_traits.hh"
+#include "config/the_isa.hh"
#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/first_stage.hh"
#include "cpu/inorder/resources/tlb_unit.hh"
diff --git a/src/cpu/inorder/resources/tlb_unit.hh b/src/cpu/inorder/resources/tlb_unit.hh
index 1c08bd822..5c62c7751 100644
--- a/src/cpu/inorder/resources/tlb_unit.hh
+++ b/src/cpu/inorder/resources/tlb_unit.hh
@@ -36,6 +36,7 @@
#include <list>
#include <string>
+#include "config/the_isa.hh"
#include "cpu/inorder/resources/inst_buffer.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/pipeline_traits.hh"
diff --git a/src/cpu/inorder/resources/use_def.cc b/src/cpu/inorder/resources/use_def.cc
index 2f1652c08..36392d054 100644
--- a/src/cpu/inorder/resources/use_def.cc
+++ b/src/cpu/inorder/resources/use_def.cc
@@ -31,7 +31,9 @@
#include <vector>
#include <list>
+
#include "arch/isa_traits.hh"
+#include "config/the_isa.hh"
#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/resources/use_def.hh"
#include "cpu/inorder/cpu.hh"
diff --git a/src/cpu/inorder/thread_context.cc b/src/cpu/inorder/thread_context.cc
index 8247bf1fb..41d16b633 100644
--- a/src/cpu/inorder/thread_context.cc
+++ b/src/cpu/inorder/thread_context.cc
@@ -30,6 +30,7 @@
*/
#include "arch/isa_traits.hh"
+#include "config/the_isa.hh"
#include "cpu/exetrace.hh"
#include "cpu/inorder/thread_context.hh"
diff --git a/src/cpu/inorder/thread_context.hh b/src/cpu/inorder/thread_context.hh
index 2489c525f..820f3077f 100644
--- a/src/cpu/inorder/thread_context.hh
+++ b/src/cpu/inorder/thread_context.hh
@@ -32,6 +32,7 @@
#ifndef __CPU_INORDER_THREAD_CONTEXT_HH__
#define __CPU_INORDER_THREAD_CONTEXT_HH__
+#include "config/the_isa.hh"
#include "cpu/exetrace.hh"
#include "cpu/thread_context.hh"
#include "cpu/inorder/thread_state.hh"
diff --git a/src/cpu/inteltrace.cc b/src/cpu/inteltrace.cc
index 145075dc1..ec51b80e7 100644
--- a/src/cpu/inteltrace.cc
+++ b/src/cpu/inteltrace.cc
@@ -33,6 +33,7 @@
#include <iomanip>
+#include "config/the_isa.hh"
#include "cpu/exetrace.hh"
#include "cpu/inteltrace.hh"
#include "cpu/static_inst.hh"
diff --git a/src/cpu/legiontrace.cc b/src/cpu/legiontrace.cc
index 5face4391..f1980c713 100644
--- a/src/cpu/legiontrace.cc
+++ b/src/cpu/legiontrace.cc
@@ -31,7 +31,7 @@
* Steve Raasch
*/
-#include "arch/isa_specific.hh"
+#include "config/the_isa.hh"
#if THE_ISA != SPARC_ISA
#error Legion tracing only works with SPARC simulations!
#endif
diff --git a/src/cpu/o3/bpred_unit_impl.hh b/src/cpu/o3/bpred_unit_impl.hh
index 1378ac135..ed3471761 100644
--- a/src/cpu/o3/bpred_unit_impl.hh
+++ b/src/cpu/o3/bpred_unit_impl.hh
@@ -28,16 +28,16 @@
* Authors: Kevin Lim
*/
+#include <algorithm>
+
#include "arch/types.hh"
#include "arch/isa_traits.hh"
#include "base/trace.hh"
#include "base/traceflags.hh"
+#include "config/the_isa.hh"
#include "cpu/o3/bpred_unit.hh"
-
#include "params/DerivO3CPU.hh"
-#include <algorithm>
-
template<class Impl>
BPredUnit<Impl>::BPredUnit(DerivO3CPUParams *params)
: _name(params->name + ".BPredUnit"),
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 7286f1b6f..aa0f79272 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -37,6 +37,7 @@
#include "base/loader/symtab.hh"
#include "base/timebuf.hh"
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "config/use_checker.hh"
#include "cpu/exetrace.hh"
#include "cpu/o3/commit.hh"
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 6722941e4..de1e24201 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -30,8 +30,8 @@
*/
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "config/use_checker.hh"
-
#include "cpu/activity.hh"
#include "cpu/simple_thread.hh"
#include "cpu/thread_context.hh"
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index 0cc8eab78..65170d8b2 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -42,6 +42,7 @@
#include "base/statistics.hh"
#include "base/timebuf.hh"
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "config/use_checker.hh"
#include "cpu/activity.hh"
#include "cpu/base.hh"
diff --git a/src/cpu/o3/decode_impl.hh b/src/cpu/o3/decode_impl.hh
index 86f87991c..1b76de132 100644
--- a/src/cpu/o3/decode_impl.hh
+++ b/src/cpu/o3/decode_impl.hh
@@ -28,6 +28,7 @@
* Authors: Kevin Lim
*/
+#include "config/the_isa.hh"
#include "cpu/o3/decode.hh"
#include "params/DerivO3CPU.hh"
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index 3ef42e91f..e1279f82b 100644
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -32,6 +32,7 @@
#define __CPU_O3_DYN_INST_HH__
#include "arch/isa_traits.hh"
+#include "config/the_isa.hh"
#include "cpu/base_dyn_inst.hh"
#include "cpu/inst_seq.hh"
#include "cpu/o3/cpu.hh"
diff --git a/src/cpu/o3/fetch.hh b/src/cpu/o3/fetch.hh
index 9cbc50899..425c34428 100644
--- a/src/cpu/o3/fetch.hh
+++ b/src/cpu/o3/fetch.hh
@@ -36,6 +36,7 @@
#include "arch/predecoder.hh"
#include "base/statistics.hh"
#include "base/timebuf.hh"
+#include "config/the_isa.hh"
#include "cpu/pc_event.hh"
#include "mem/packet.hh"
#include "mem/port.hh"
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 3781113bd..5c6e287dc 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -35,6 +35,7 @@
#include "arch/isa_traits.hh"
#include "arch/utility.hh"
#include "base/types.hh"
+#include "config/the_isa.hh"
#include "config/use_checker.hh"
#include "cpu/checker/cpu.hh"
#include "cpu/exetrace.hh"
diff --git a/src/cpu/o3/free_list.hh b/src/cpu/o3/free_list.hh
index e28c4910e..96289f641 100644
--- a/src/cpu/o3/free_list.hh
+++ b/src/cpu/o3/free_list.hh
@@ -38,6 +38,7 @@
#include "base/misc.hh"
#include "base/trace.hh"
#include "base/traceflags.hh"
+#include "config/the_isa.hh"
#include "cpu/o3/comm.hh"
/**
diff --git a/src/cpu/o3/iew_impl.hh b/src/cpu/o3/iew_impl.hh
index ba29df196..751a26afd 100644
--- a/src/cpu/o3/iew_impl.hh
+++ b/src/cpu/o3/iew_impl.hh
@@ -35,6 +35,7 @@
#include <queue>
#include "base/timebuf.hh"
+#include "config/the_isa.hh"
#include "cpu/o3/fu_pool.hh"
#include "cpu/o3/iew.hh"
#include "params/DerivO3CPU.hh"
diff --git a/src/cpu/o3/impl.hh b/src/cpu/o3/impl.hh
index 4b29b4daa..ffccd4a84 100644
--- a/src/cpu/o3/impl.hh
+++ b/src/cpu/o3/impl.hh
@@ -32,7 +32,7 @@
#define __CPU_O3_IMPL_HH__
#include "arch/isa_traits.hh"
-
+#include "config/the_isa.hh"
#include "cpu/o3/cpu_policy.hh"
diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh
index a917caef3..6ff36d929 100644
--- a/src/cpu/o3/lsq_unit.hh
+++ b/src/cpu/o3/lsq_unit.hh
@@ -40,6 +40,7 @@
#include "arch/faults.hh"
#include "arch/locked_mem.hh"
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "base/fast_alloc.hh"
#include "base/hashmap.hh"
#include "cpu/inst_seq.hh"
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh
index edc8c9b3f..9ee1de45a 100644
--- a/src/cpu/o3/lsq_unit_impl.hh
+++ b/src/cpu/o3/lsq_unit_impl.hh
@@ -30,8 +30,8 @@
*/
#include "arch/locked_mem.hh"
+#include "config/the_isa.hh"
#include "config/use_checker.hh"
-
#include "cpu/o3/lsq.hh"
#include "cpu/o3/lsq_unit.hh"
#include "base/str.hh"
diff --git a/src/cpu/o3/regfile.hh b/src/cpu/o3/regfile.hh
index d6beecdc5..e252fa362 100644
--- a/src/cpu/o3/regfile.hh
+++ b/src/cpu/o3/regfile.hh
@@ -32,18 +32,19 @@
#ifndef __CPU_O3_REGFILE_HH__
#define __CPU_O3_REGFILE_HH__
+#include <vector>
+
#include "arch/isa_traits.hh"
#include "arch/types.hh"
#include "base/trace.hh"
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "cpu/o3/comm.hh"
#if FULL_SYSTEM
#include "arch/kernel_stats.hh"
#endif
-#include <vector>
-
/**
* Simple physical register file class.
* Right now this is specific to Alpha until we decide if/how to make things
diff --git a/src/cpu/o3/rename.hh b/src/cpu/o3/rename.hh
index 734b63105..8c21dda0a 100644
--- a/src/cpu/o3/rename.hh
+++ b/src/cpu/o3/rename.hh
@@ -35,6 +35,7 @@
#include "base/statistics.hh"
#include "base/timebuf.hh"
+#include "config/the_isa.hh"
class DerivO3CPUParams;
diff --git a/src/cpu/o3/rename_impl.hh b/src/cpu/o3/rename_impl.hh
index e4cc2674b..ce206435c 100644
--- a/src/cpu/o3/rename_impl.hh
+++ b/src/cpu/o3/rename_impl.hh
@@ -34,6 +34,7 @@
#include "arch/isa_traits.hh"
#include "arch/registers.hh"
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "cpu/o3/rename.hh"
#include "params/DerivO3CPU.hh"
diff --git a/src/cpu/o3/rename_map.hh b/src/cpu/o3/rename_map.hh
index 896c66f3e..51d8db4d8 100644
--- a/src/cpu/o3/rename_map.hh
+++ b/src/cpu/o3/rename_map.hh
@@ -39,8 +39,9 @@
#include <utility>
#include <vector>
-#include "cpu/o3/free_list.hh"
#include "arch/types.hh"
+#include "config/the_isa.hh"
+#include "cpu/o3/free_list.hh"
class SimpleRenameMap
{
diff --git a/src/cpu/o3/rob.hh b/src/cpu/o3/rob.hh
index 657bc8d06..bdea07d1a 100644
--- a/src/cpu/o3/rob.hh
+++ b/src/cpu/o3/rob.hh
@@ -36,6 +36,8 @@
#include <utility>
#include <vector>
+#include "config/the_isa.hh"
+
/**
* ROB class. The ROB is largely what drives squashing.
*/
diff --git a/src/cpu/o3/scoreboard.cc b/src/cpu/o3/scoreboard.cc
index e7f8b7949..ae1e13717 100644
--- a/src/cpu/o3/scoreboard.cc
+++ b/src/cpu/o3/scoreboard.cc
@@ -29,7 +29,7 @@
* Kevin Lim
*/
-#include "arch/isa_specific.hh"
+#include "config/the_isa.hh"
#include "cpu/o3/scoreboard.hh"
Scoreboard::Scoreboard(unsigned activeThreads,
diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh
index ed5c6ac20..695b3b91a 100755
--- a/src/cpu/o3/thread_context.hh
+++ b/src/cpu/o3/thread_context.hh
@@ -31,6 +31,7 @@
#ifndef __CPU_O3_THREAD_CONTEXT_HH__
#define __CPU_O3_THREAD_CONTEXT_HH__
+#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
#include "cpu/o3/isa_specific.hh"
diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh
index e631c9244..940d460ce 100755
--- a/src/cpu/o3/thread_context_impl.hh
+++ b/src/cpu/o3/thread_context_impl.hh
@@ -30,6 +30,7 @@
*/
#include "arch/registers.hh"
+#include "config/the_isa.hh"
#include "cpu/o3/thread_context.hh"
#include "cpu/quiesce_event.hh"
diff --git a/src/cpu/ozone/cpu.hh b/src/cpu/ozone/cpu.hh
index 5e36332af..a16986c99 100644
--- a/src/cpu/ozone/cpu.hh
+++ b/src/cpu/ozone/cpu.hh
@@ -36,6 +36,7 @@
#include "base/statistics.hh"
#include "base/timebuf.hh"
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
#include "cpu/inst_seq.hh"
diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh
index f86b882d1..c09dd9046 100644
--- a/src/cpu/ozone/cpu_impl.hh
+++ b/src/cpu/ozone/cpu_impl.hh
@@ -34,6 +34,7 @@
#include "arch/isa_traits.hh" // For MachInst
#include "base/trace.hh"
+#include "config/the_isa.hh"
#include "cpu/base.hh"
#include "cpu/simple_thread.hh"
#include "cpu/thread_context.hh"
diff --git a/src/cpu/ozone/dyn_inst.hh b/src/cpu/ozone/dyn_inst.hh
index a39f383ba..cca72ef18 100644
--- a/src/cpu/ozone/dyn_inst.hh
+++ b/src/cpu/ozone/dyn_inst.hh
@@ -34,6 +34,7 @@
#include "arch/isa_traits.hh"
#include "arch/types.hh"
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "cpu/base_dyn_inst.hh"
#include "cpu/inst_seq.hh"
#include "cpu/ozone/cpu.hh" // MUST include this
diff --git a/src/cpu/ozone/dyn_inst_impl.hh b/src/cpu/ozone/dyn_inst_impl.hh
index 8519917f5..bfefb9428 100644
--- a/src/cpu/ozone/dyn_inst_impl.hh
+++ b/src/cpu/ozone/dyn_inst_impl.hh
@@ -30,6 +30,7 @@
#include "sim/faults.hh"
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "cpu/ozone/dyn_inst.hh"
#if FULL_SYSTEM
diff --git a/src/cpu/ozone/front_end.hh b/src/cpu/ozone/front_end.hh
index 38fc89e3f..3809db00d 100644
--- a/src/cpu/ozone/front_end.hh
+++ b/src/cpu/ozone/front_end.hh
@@ -35,6 +35,7 @@
#include "arch/utility.hh"
#include "base/timebuf.hh"
+#include "config/the_isa.hh"
#include "cpu/inst_seq.hh"
#include "cpu/o3/bpred_unit.hh"
#include "cpu/ozone/rename_table.hh"
diff --git a/src/cpu/ozone/front_end_impl.hh b/src/cpu/ozone/front_end_impl.hh
index 516823b47..884136927 100644
--- a/src/cpu/ozone/front_end_impl.hh
+++ b/src/cpu/ozone/front_end_impl.hh
@@ -28,12 +28,12 @@
* Authors: Kevin Lim
*/
-#include "config/use_checker.hh"
-
#include "sim/faults.hh"
#include "arch/isa_traits.hh"
#include "arch/utility.hh"
#include "base/statistics.hh"
+#include "config/the_isa.hh"
+#include "config/use_checker.hh"
#include "cpu/thread_context.hh"
#include "cpu/exetrace.hh"
#include "cpu/ozone/front_end.hh"
diff --git a/src/cpu/ozone/inorder_back_end_impl.hh b/src/cpu/ozone/inorder_back_end_impl.hh
index 798b628d6..2d4d225c7 100644
--- a/src/cpu/ozone/inorder_back_end_impl.hh
+++ b/src/cpu/ozone/inorder_back_end_impl.hh
@@ -30,6 +30,7 @@
#include "sim/faults.hh"
#include "arch/types.hh"
+#include "config/the_isa.hh"
#include "cpu/ozone/inorder_back_end.hh"
#include "cpu/ozone/thread_state.hh"
diff --git a/src/cpu/ozone/lsq_unit.hh b/src/cpu/ozone/lsq_unit.hh
index 47be245e5..d8e402b65 100644
--- a/src/cpu/ozone/lsq_unit.hh
+++ b/src/cpu/ozone/lsq_unit.hh
@@ -38,6 +38,7 @@
#include "arch/faults.hh"
#include "arch/types.hh"
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "base/hashmap.hh"
#include "cpu/inst_seq.hh"
#include "mem/mem_interface.hh"
diff --git a/src/cpu/ozone/lsq_unit_impl.hh b/src/cpu/ozone/lsq_unit_impl.hh
index 833aa0581..dd44adf6e 100644
--- a/src/cpu/ozone/lsq_unit_impl.hh
+++ b/src/cpu/ozone/lsq_unit_impl.hh
@@ -30,6 +30,7 @@
#include "arch/faults.hh"
#include "base/str.hh"
+#include "config/the_isa.hh"
#include "cpu/ozone/lsq_unit.hh"
template <class Impl>
diff --git a/src/cpu/ozone/lw_back_end_impl.hh b/src/cpu/ozone/lw_back_end_impl.hh
index 86d4531a0..cbc386cb0 100644
--- a/src/cpu/ozone/lw_back_end_impl.hh
+++ b/src/cpu/ozone/lw_back_end_impl.hh
@@ -28,8 +28,8 @@
* Authors: Kevin Lim
*/
+#include "config/the_isa.hh"
#include "config/use_checker.hh"
-
#include "cpu/ozone/lw_back_end.hh"
#include "cpu/op_class.hh"
diff --git a/src/cpu/ozone/lw_lsq.hh b/src/cpu/ozone/lw_lsq.hh
index 6e9bb77af..ee0312969 100644
--- a/src/cpu/ozone/lw_lsq.hh
+++ b/src/cpu/ozone/lw_lsq.hh
@@ -39,6 +39,7 @@
#include "arch/faults.hh"
#include "arch/types.hh"
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "base/fast_alloc.hh"
#include "base/hashmap.hh"
#include "cpu/inst_seq.hh"
diff --git a/src/cpu/ozone/lw_lsq_impl.hh b/src/cpu/ozone/lw_lsq_impl.hh
index 4d290a1e9..c714c5d38 100644
--- a/src/cpu/ozone/lw_lsq_impl.hh
+++ b/src/cpu/ozone/lw_lsq_impl.hh
@@ -28,10 +28,10 @@
* Authors: Kevin Lim
*/
-#include "config/use_checker.hh"
-
#include "arch/faults.hh"
#include "base/str.hh"
+#include "config/the_isa.hh"
+#include "config/use_checker.hh"
#include "cpu/ozone/lw_lsq.hh"
#include "cpu/checker/cpu.hh"
diff --git a/src/cpu/ozone/rename_table.hh b/src/cpu/ozone/rename_table.hh
index 0b67d9635..9a5579158 100644
--- a/src/cpu/ozone/rename_table.hh
+++ b/src/cpu/ozone/rename_table.hh
@@ -32,6 +32,7 @@
#define __CPU_OZONE_RENAME_TABLE_HH__
#include "arch/isa_traits.hh"
+#include "config/the_isa.hh"
/** Rename table that holds the rename of each architectural register to
* producing DynInst. Needs to support copying from one table to another.
diff --git a/src/cpu/ozone/rename_table_impl.hh b/src/cpu/ozone/rename_table_impl.hh
index 67bab7337..e8071e2b3 100644
--- a/src/cpu/ozone/rename_table_impl.hh
+++ b/src/cpu/ozone/rename_table_impl.hh
@@ -29,6 +29,8 @@
*/
#include <cstdlib> // Not really sure what to include to get NULL
+
+#include "config/the_isa.hh"
#include "cpu/ozone/rename_table.hh"
template <class Impl>
diff --git a/src/cpu/ozone/simple_params.hh b/src/cpu/ozone/simple_params.hh
index 7687fdf60..b241dea73 100644
--- a/src/cpu/ozone/simple_params.hh
+++ b/src/cpu/ozone/simple_params.hh
@@ -31,6 +31,7 @@
#ifndef __CPU_OZONE_SIMPLE_PARAMS_HH__
#define __CPU_OZONE_SIMPLE_PARAMS_HH__
+#include "config/the_isa.hh"
#include "cpu/ozone/cpu.hh"
//Forward declarations
diff --git a/src/cpu/ozone/thread_state.hh b/src/cpu/ozone/thread_state.hh
index 971fba886..638b9d86c 100644
--- a/src/cpu/ozone/thread_state.hh
+++ b/src/cpu/ozone/thread_state.hh
@@ -31,13 +31,14 @@
#ifndef __CPU_OZONE_THREAD_STATE_HH__
#define __CPU_OZONE_THREAD_STATE_HH__
-#include "sim/faults.hh"
-#include "arch/types.hh"
#include "arch/regfile.hh"
+#include "arch/types.hh"
#include "base/callback.hh"
#include "base/output.hh"
+#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
#include "cpu/thread_state.hh"
+#include "sim/faults.hh"
#include "sim/process.hh"
#include "sim/sim_exit.hh"
diff --git a/src/cpu/profile.hh b/src/cpu/profile.hh
index 9606ed24d..dd856b5a7 100644
--- a/src/cpu/profile.hh
+++ b/src/cpu/profile.hh
@@ -34,6 +34,7 @@
#include <map>
#include "arch/stacktrace.hh"
+#include "config/the_isa.hh"
#include "cpu/static_inst.hh"
#include "base/types.hh"
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 83da618f8..cd4f5457e 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -32,6 +32,7 @@
#include "arch/mmaped_ipr.hh"
#include "arch/utility.hh"
#include "base/bigint.hh"
+#include "config/the_isa.hh"
#include "cpu/exetrace.hh"
#include "cpu/simple/atomic.hh"
#include "mem/packet.hh"
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 732bb637b..0104e1b1f 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -40,6 +40,7 @@
#include "base/stats/events.hh"
#include "base/trace.hh"
#include "base/types.hh"
+#include "config/the_isa.hh"
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
#include "cpu/profile.hh"
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index 466d0d1c9..39961fb88 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -36,6 +36,7 @@
#include "arch/predecoder.hh"
#include "base/statistics.hh"
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "cpu/base.hh"
#include "cpu/simple_thread.hh"
#include "cpu/pc_event.hh"
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 672fd9414..8d3bae3f6 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -32,6 +32,7 @@
#include "arch/mmaped_ipr.hh"
#include "arch/utility.hh"
#include "base/bigint.hh"
+#include "config/the_isa.hh"
#include "cpu/exetrace.hh"
#include "cpu/simple/timing.hh"
#include "mem/packet.hh"
diff --git a/src/cpu/simple_thread.cc b/src/cpu/simple_thread.cc
index 22bc283a3..92c6ad69b 100644
--- a/src/cpu/simple_thread.cc
+++ b/src/cpu/simple_thread.cc
@@ -34,6 +34,7 @@
#include <string>
#include "arch/isa_traits.hh"
+#include "config/the_isa.hh"
#include "cpu/base.hh"
#include "cpu/simple_thread.hh"
#include "cpu/thread_context.hh"
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index 8a44eba37..2d28607b4 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -39,6 +39,7 @@
#include "arch/types.hh"
#include "base/types.hh"
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
#include "cpu/thread_state.hh"
#include "mem/request.hh"
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index b1298e0e9..fdec09756 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -36,6 +36,7 @@
#include "arch/isa_traits.hh"
#include "arch/utility.hh"
+#include "config/the_isa.hh"
#include "base/bitfield.hh"
#include "base/hashmap.hh"
#include "base/misc.hh"
diff --git a/src/cpu/thread_context.cc b/src/cpu/thread_context.cc
index ab105a435..f2083ef08 100644
--- a/src/cpu/thread_context.cc
+++ b/src/cpu/thread_context.cc
@@ -30,6 +30,7 @@
#include "base/misc.hh"
#include "base/trace.hh"
+#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
void
diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh
index 9e34204ef..78ecdacf2 100644
--- a/src/cpu/thread_context.hh
+++ b/src/cpu/thread_context.hh
@@ -35,6 +35,7 @@
#include "arch/types.hh"
#include "base/types.hh"
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "mem/request.hh"
#include "sim/byteswap.hh"
#include "sim/faults.hh"
diff --git a/src/cpu/thread_state.hh b/src/cpu/thread_state.hh
index 5c7c0ea56..cf637aeda 100644
--- a/src/cpu/thread_state.hh
+++ b/src/cpu/thread_state.hh
@@ -32,6 +32,7 @@
#define __CPU_THREAD_STATE_HH__
#include "arch/types.hh"
+#include "config/the_isa.hh"
#include "cpu/profile.hh"
#include "cpu/thread_context.hh"
#include "cpu/base.hh"
diff --git a/src/dev/alpha/tsunami.cc b/src/dev/alpha/tsunami.cc
index b6478fe22..b36b5977d 100644
--- a/src/dev/alpha/tsunami.cc
+++ b/src/dev/alpha/tsunami.cc
@@ -36,6 +36,7 @@
#include <string>
#include <vector>
+#include "config/the_isa.hh"
#include "cpu/intr_control.hh"
#include "dev/alpha/tsunami_cchip.hh"
#include "dev/alpha/tsunami_pchip.hh"
diff --git a/src/dev/alpha/tsunami_cchip.cc b/src/dev/alpha/tsunami_cchip.cc
index 52a2aea14..fd76fd93e 100644
--- a/src/dev/alpha/tsunami_cchip.cc
+++ b/src/dev/alpha/tsunami_cchip.cc
@@ -39,6 +39,7 @@
#include "arch/alpha/ev5.hh"
#include "base/trace.hh"
+#include "config/the_isa.hh"
#include "cpu/intr_control.hh"
#include "cpu/thread_context.hh"
#include "dev/alpha/tsunami.hh"
diff --git a/src/dev/alpha/tsunami_io.cc b/src/dev/alpha/tsunami_io.cc
index 9c88904e3..8b06f5170 100644
--- a/src/dev/alpha/tsunami_io.cc
+++ b/src/dev/alpha/tsunami_io.cc
@@ -42,6 +42,7 @@
#include "base/time.hh"
#include "base/trace.hh"
+#include "config/the_isa.hh"
#include "dev/rtcreg.h"
#include "dev/alpha/tsunami_cchip.hh"
#include "dev/alpha/tsunami.hh"
diff --git a/src/dev/alpha/tsunami_pchip.cc b/src/dev/alpha/tsunami_pchip.cc
index 4df7d1150..df980cf79 100644
--- a/src/dev/alpha/tsunami_pchip.cc
+++ b/src/dev/alpha/tsunami_pchip.cc
@@ -38,6 +38,7 @@
#include <vector>
#include "base/trace.hh"
+#include "config/the_isa.hh"
#include "dev/alpha/tsunami_pchip.hh"
#include "dev/alpha/tsunamireg.h"
#include "dev/alpha/tsunami.hh"
diff --git a/src/dev/baddev.cc b/src/dev/baddev.cc
index 6cdee0310..356574c71 100644
--- a/src/dev/baddev.cc
+++ b/src/dev/baddev.cc
@@ -37,6 +37,7 @@
#include <vector>
#include "base/trace.hh"
+#include "config/the_isa.hh"
#include "dev/baddev.hh"
#include "dev/platform.hh"
#include "mem/port.hh"
diff --git a/src/dev/ide_disk.cc b/src/dev/ide_disk.cc
index 83faf508e..fe93924f9 100644
--- a/src/dev/ide_disk.cc
+++ b/src/dev/ide_disk.cc
@@ -39,6 +39,7 @@
#include <string>
#include "arch/isa_traits.hh"
+#include "config/the_isa.hh"
#include "base/chunk_generator.hh"
#include "base/cprintf.hh" // csprintf
#include "base/trace.hh"
diff --git a/src/dev/mips/malta.cc b/src/dev/mips/malta.cc
index 1401fe9ee..73dc9f116 100755
--- a/src/dev/mips/malta.cc
+++ b/src/dev/mips/malta.cc
@@ -37,6 +37,7 @@
#include <string>
#include <vector>
+#include "config/the_isa.hh"
#include "cpu/intr_control.hh"
#include "dev/mips/malta_cchip.hh"
#include "dev/mips/malta_pchip.hh"
@@ -46,7 +47,6 @@
#include "params/Malta.hh"
#include "sim/system.hh"
-
using namespace std;
using namespace TheISA;
diff --git a/src/dev/mips/malta_cchip.cc b/src/dev/mips/malta_cchip.cc
index 265977665..b2d5069c5 100755
--- a/src/dev/mips/malta_cchip.cc
+++ b/src/dev/mips/malta_cchip.cc
@@ -39,6 +39,7 @@
#include "arch/mips/mips_core_specific.hh"
#include "base/trace.hh"
+#include "config/the_isa.hh"
#include "cpu/intr_control.hh"
#include "cpu/thread_context.hh"
#include "dev/mips/malta.hh"
@@ -56,7 +57,7 @@ using namespace TheISA;
MaltaCChip::MaltaCChip(Params *p)
: BasicPioDevice(p), malta(p->malta)
{
- warn("MaltaCCHIP::MaltaCChip() not implemented.");
+ warn("MaltaCCHIP::MaltaCChip() not implemented.");
pioSize = 0xfffffff;
//Put back pointer in malta
diff --git a/src/dev/mips/malta_io.cc b/src/dev/mips/malta_io.cc
index 7f04789db..5a738a9b4 100755
--- a/src/dev/mips/malta_io.cc
+++ b/src/dev/mips/malta_io.cc
@@ -42,6 +42,7 @@
#include "base/time.hh"
#include "base/trace.hh"
+#include "config/the_isa.hh"
#include "dev/rtcreg.h"
#include "dev/mips/malta_cchip.hh"
#include "dev/mips/malta.hh"
diff --git a/src/dev/mips/malta_pchip.cc b/src/dev/mips/malta_pchip.cc
index b357e3b61..035433021 100755
--- a/src/dev/mips/malta_pchip.cc
+++ b/src/dev/mips/malta_pchip.cc
@@ -38,6 +38,7 @@
#include <vector>
#include "base/trace.hh"
+#include "config/the_isa.hh"
#include "dev/mips/malta_pchip.hh"
#include "dev/mips/maltareg.h"
#include "dev/mips/malta.hh"
diff --git a/src/dev/ns_gige.cc b/src/dev/ns_gige.cc
index 912ca7f0f..86f081ec5 100644
--- a/src/dev/ns_gige.cc
+++ b/src/dev/ns_gige.cc
@@ -39,6 +39,7 @@
#include "base/debug.hh"
#include "base/inet.hh"
#include "base/types.hh"
+#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
#include "dev/etherlink.hh"
#include "dev/ns_gige.hh"
diff --git a/src/dev/platform.cc b/src/dev/platform.cc
index 2b51a6245..a91a5abf9 100644
--- a/src/dev/platform.cc
+++ b/src/dev/platform.cc
@@ -30,6 +30,7 @@
*/
#include "base/misc.hh"
+#include "config/the_isa.hh"
#include "dev/platform.hh"
#include "sim/sim_exit.hh"
diff --git a/src/dev/sinic.cc b/src/dev/sinic.cc
index 133f70b0b..86090e048 100644
--- a/src/dev/sinic.cc
+++ b/src/dev/sinic.cc
@@ -36,6 +36,7 @@
#include "base/debug.hh"
#include "base/inet.hh"
#include "base/types.hh"
+#include "config/the_isa.hh"
#include "cpu/intr_control.hh"
#include "cpu/thread_context.hh"
#include "dev/etherlink.hh"
diff --git a/src/dev/sparc/dtod.cc b/src/dev/sparc/dtod.cc
index 81132ac65..c7243cfb8 100644
--- a/src/dev/sparc/dtod.cc
+++ b/src/dev/sparc/dtod.cc
@@ -39,6 +39,7 @@
#include "base/time.hh"
#include "base/trace.hh"
+#include "config/the_isa.hh"
#include "dev/sparc/dtod.hh"
#include "dev/platform.hh"
#include "mem/packet_access.hh"
diff --git a/src/dev/sparc/t1000.cc b/src/dev/sparc/t1000.cc
index 88fb358ef..c00d942c9 100644
--- a/src/dev/sparc/t1000.cc
+++ b/src/dev/sparc/t1000.cc
@@ -36,6 +36,7 @@
#include <string>
#include <vector>
+#include "config/the_isa.hh"
#include "cpu/intr_control.hh"
#include "dev/sparc/t1000.hh"
#include "dev/terminal.hh"
diff --git a/src/dev/uart8250.cc b/src/dev/uart8250.cc
index 93f71f49b..e3eacaaa2 100644
--- a/src/dev/uart8250.cc
+++ b/src/dev/uart8250.cc
@@ -38,6 +38,7 @@
#include "base/inifile.hh"
#include "base/str.hh" // for to_number
#include "base/trace.hh"
+#include "config/the_isa.hh"
#include "dev/platform.hh"
#include "dev/terminal.hh"
#include "dev/uart8250.hh"
diff --git a/src/dev/x86/pc.cc b/src/dev/x86/pc.cc
index 7dc1d8711..e3449abf6 100644
--- a/src/dev/x86/pc.cc
+++ b/src/dev/x86/pc.cc
@@ -38,6 +38,7 @@
#include "arch/x86/intmessage.hh"
#include "arch/x86/x86_traits.hh"
+#include "config/the_isa.hh"
#include "cpu/intr_control.hh"
#include "dev/terminal.hh"
#include "dev/x86/i82094aa.hh"
diff --git a/src/kern/linux/printk.hh b/src/kern/linux/printk.hh
index da9564b7e..5c6ee073d 100644
--- a/src/kern/linux/printk.hh
+++ b/src/kern/linux/printk.hh
@@ -32,8 +32,6 @@
#ifndef __PRINTK_HH__
#define __PRINTK_HH__
-#include "arch/isa_specific.hh"
-
#include <sstream>
class Arguments;
diff --git a/src/kern/system_events.cc b/src/kern/system_events.cc
index 6fd9e1563..bd01ed9ed 100644
--- a/src/kern/system_events.cc
+++ b/src/kern/system_events.cc
@@ -29,9 +29,9 @@
* Nathan Binkert
*/
-//For ISA_HAS_DELAY_SLOT
#include "arch/isa_traits.hh"
#include "base/trace.hh"
+#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
#include "kern/system_events.hh"
diff --git a/src/kern/tru64/dump_mbuf.cc b/src/kern/tru64/dump_mbuf.cc
index 517aad6fa..207d30792 100644
--- a/src/kern/tru64/dump_mbuf.cc
+++ b/src/kern/tru64/dump_mbuf.cc
@@ -37,6 +37,7 @@
#include "base/loader/symtab.hh"
#include "base/trace.hh"
#include "base/types.hh"
+#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
#include "kern/tru64/mbuf.hh"
#include "sim/arguments.hh"
diff --git a/src/kern/tru64/tru64.hh b/src/kern/tru64/tru64.hh
index bf46e0de4..c2bdd2776 100644
--- a/src/kern/tru64/tru64.hh
+++ b/src/kern/tru64/tru64.hh
@@ -31,6 +31,7 @@
#ifndef __TRU64_HH__
#define __TRU64_HH__
+
#include "config/full_system.hh"
#include "kern/operatingsystem.hh"
@@ -55,6 +56,7 @@ class Tru64 {};
#include <string.h> // for memset()
#include <unistd.h>
+#include "config/the_isa.hh"
#include "arch/alpha/registers.hh"
#include "cpu/base.hh"
#include "sim/core.hh"
diff --git a/src/kern/tru64/tru64_events.cc b/src/kern/tru64/tru64_events.cc
index 4867df559..460f75dea 100644
--- a/src/kern/tru64/tru64_events.cc
+++ b/src/kern/tru64/tru64_events.cc
@@ -31,6 +31,7 @@
#include "arch/alpha/ev5.hh"
#include "arch/isa_traits.hh"
+#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
#include "cpu/base.hh"
#include "kern/system_events.hh"
diff --git a/src/mem/cache/builder.cc b/src/mem/cache/builder.cc
index 599353b88..bd9eb9acc 100644
--- a/src/mem/cache/builder.cc
+++ b/src/mem/cache/builder.cc
@@ -33,9 +33,10 @@
* @file
* Simobject instatiation of caches.
*/
+#include <list>
#include <vector>
-// Must be included first to determine which caches we want
+#include "config/the_isa.hh"
#include "enums/Prefetch.hh"
#include "mem/config/cache.hh"
#include "mem/cache/base.hh"
diff --git a/src/mem/cache/prefetch/base.cc b/src/mem/cache/prefetch/base.cc
index f20a306cb..f0e244a09 100644
--- a/src/mem/cache/prefetch/base.cc
+++ b/src/mem/cache/prefetch/base.cc
@@ -33,12 +33,14 @@
* Hardware Prefetcher Definition.
*/
+#include <list>
+
#include "arch/isa_traits.hh"
#include "base/trace.hh"
+#include "config/the_isa.hh"
#include "mem/cache/base.hh"
#include "mem/cache/prefetch/base.hh"
#include "mem/request.hh"
-#include <list>
BasePrefetcher::BasePrefetcher(const BaseCacheParams *p)
: size(p->prefetcher_size), pageStop(!p->prefetch_past_page),
diff --git a/src/mem/packet_access.hh b/src/mem/packet_access.hh
index f70d508b2..fca9606fc 100644
--- a/src/mem/packet_access.hh
+++ b/src/mem/packet_access.hh
@@ -31,6 +31,7 @@
#include "arch/isa_traits.hh"
#include "base/bigint.hh"
+#include "config/the_isa.hh"
#include "mem/packet.hh"
#include "sim/byteswap.hh"
diff --git a/src/mem/page_table.cc b/src/mem/page_table.cc
index bf35932a6..4bc3a4434 100644
--- a/src/mem/page_table.cc
+++ b/src/mem/page_table.cc
@@ -42,6 +42,7 @@
#include "base/bitfield.hh"
#include "base/intmath.hh"
#include "base/trace.hh"
+#include "config/the_isa.hh"
#include "mem/page_table.hh"
#include "sim/process.hh"
#include "sim/sim_object.hh"
diff --git a/src/mem/page_table.hh b/src/mem/page_table.hh
index 3ce720ad4..0d93d37c7 100644
--- a/src/mem/page_table.hh
+++ b/src/mem/page_table.hh
@@ -42,6 +42,7 @@
#include "arch/tlb.hh"
#include "base/hashmap.hh"
#include "base/types.hh"
+#include "config/the_isa.hh"
#include "mem/request.hh"
#include "sim/faults.hh"
#include "sim/serialize.hh"
diff --git a/src/mem/physical.cc b/src/mem/physical.cc
index d87ad3b22..be4086cd9 100644
--- a/src/mem/physical.cc
+++ b/src/mem/physical.cc
@@ -44,6 +44,7 @@
#include "base/random.hh"
#include "base/types.hh"
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "mem/packet_access.hh"
#include "mem/physical.hh"
#include "sim/eventq.hh"
diff --git a/src/mem/port_impl.hh b/src/mem/port_impl.hh
index 989cfd338..bc9592164 100644
--- a/src/mem/port_impl.hh
+++ b/src/mem/port_impl.hh
@@ -28,9 +28,8 @@
* Authors: Ali Saidi
*/
-//To get endianness
#include "arch/isa_traits.hh"
-
+#include "config/the_isa.hh"
#include "mem/port.hh"
#include "sim/byteswap.hh"
diff --git a/src/mem/rubymem.cc b/src/mem/rubymem.cc
index 4d9f8051f..2fb529e12 100644
--- a/src/mem/rubymem.cc
+++ b/src/mem/rubymem.cc
@@ -35,6 +35,7 @@
#include "base/output.hh"
#include "base/str.hh"
#include "base/types.hh"
+#include "config/the_isa.hh"
#include "mem/ruby/common/Debug.hh"
#include "mem/ruby/libruby.hh"
#include "mem/ruby/system/RubyPort.hh"
diff --git a/src/mem/translating_port.cc b/src/mem/translating_port.cc
index 54de6625e..700229b23 100644
--- a/src/mem/translating_port.cc
+++ b/src/mem/translating_port.cc
@@ -30,7 +30,9 @@
*/
#include <string>
+
#include "base/chunk_generator.hh"
+#include "config/the_isa.hh"
#include "mem/port.hh"
#include "mem/translating_port.hh"
#include "mem/page_table.hh"
diff --git a/src/mem/vport.cc b/src/mem/vport.cc
index 15be45c2a..ab061c019 100644
--- a/src/mem/vport.cc
+++ b/src/mem/vport.cc
@@ -34,6 +34,7 @@
*/
#include "base/chunk_generator.hh"
+#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
#include "mem/vport.hh"
diff --git a/src/sim/arguments.cc b/src/sim/arguments.cc
index 5aa57755a..339a57f90 100644
--- a/src/sim/arguments.cc
+++ b/src/sim/arguments.cc
@@ -28,11 +28,10 @@
* Authors: Nathan Binkert
*/
-#include "sim/arguments.hh"
#include "arch/utility.hh"
+#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
-
-using namespace TheISA;
+#include "sim/arguments.hh"
Arguments::Data::~Data()
{
diff --git a/src/sim/process.cc b/src/sim/process.cc
index 55bd2f209..ec6ac0449 100644
--- a/src/sim/process.cc
+++ b/src/sim/process.cc
@@ -40,6 +40,7 @@
#include "base/loader/symtab.hh"
#include "base/statistics.hh"
#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
#include "mem/page_table.hh"
#include "mem/physical.hh"
@@ -53,7 +54,6 @@
#include "sim/syscall_emul.hh"
#include "sim/system.hh"
-#include "arch/isa_specific.hh"
#if THE_ISA == ALPHA_ISA
#include "arch/alpha/linux/process.hh"
#include "arch/alpha/tru64/process.hh"
diff --git a/src/sim/process.hh b/src/sim/process.hh
index 05a48071a..7922ce073 100644
--- a/src/sim/process.hh
+++ b/src/sim/process.hh
@@ -47,9 +47,11 @@
#include "arch/registers.hh"
#include "base/statistics.hh"
#include "base/types.hh"
+#include "config/the_isa.hh"
#include "sim/sim_object.hh"
#include "sim/syscallreturn.hh"
+class BaseRemoteGDB;
class GDBListener;
class PageTable;
class ProcessParams;
@@ -58,10 +60,6 @@ class SyscallDesc;
class System;
class ThreadContext;
class TranslatingPort;
-namespace TheISA
-{
- class RemoteGDB;
-}
template<class IntType>
struct AuxVector
@@ -94,7 +92,7 @@ class Process : public SimObject
std::vector<int> contextIds;
// remote gdb objects
- std::vector<TheISA::RemoteGDB *> remoteGDB;
+ std::vector<BaseRemoteGDB *> remoteGDB;
std::vector<GDBListener *> gdbListen;
bool breakpoint();
diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc
index 6182150d4..cf063818b 100644
--- a/src/sim/pseudo_inst.cc
+++ b/src/sim/pseudo_inst.cc
@@ -35,10 +35,10 @@
#include <fstream>
#include <string>
-#include "config/full_system.hh"
-
#include "arch/vtophys.hh"
#include "base/debug.hh"
+#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
#include "cpu/quiesce_event.hh"
diff --git a/src/sim/syscall_emul.cc b/src/sim/syscall_emul.cc
index 811bdb73a..bd66594af 100644
--- a/src/sim/syscall_emul.cc
+++ b/src/sim/syscall_emul.cc
@@ -38,12 +38,12 @@
#include "sim/syscall_emul.hh"
#include "base/chunk_generator.hh"
#include "base/trace.hh"
+#include "config/the_isa.hh"
#include "cpu/thread_context.hh"
#include "cpu/base.hh"
#include "mem/page_table.hh"
#include "sim/process.hh"
#include "sim/system.hh"
-
#include "sim/sim_exit.hh"
using namespace std;
diff --git a/src/sim/syscall_emul.hh b/src/sim/syscall_emul.hh
index c00edfdc6..c9ce4b14f 100644
--- a/src/sim/syscall_emul.hh
+++ b/src/sim/syscall_emul.hh
@@ -55,6 +55,7 @@
#include "base/misc.hh"
#include "base/trace.hh"
#include "base/types.hh"
+#include "config/the_isa.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
#include "mem/translating_port.hh"
diff --git a/src/sim/system.cc b/src/sim/system.cc
index f10167bba..da77f1995 100644
--- a/src/sim/system.cc
+++ b/src/sim/system.cc
@@ -38,11 +38,14 @@
#include "base/loader/symtab.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
+#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "mem/mem_object.hh"
#include "mem/physical.hh"
#include "sim/byteswap.hh"
#include "sim/system.hh"
#include "sim/debug.hh"
+
#if FULL_SYSTEM
#include "arch/vtophys.hh"
#include "kern/kernel_stats.hh"
diff --git a/src/sim/system.hh b/src/sim/system.hh
index aa89866bd..eabbc8351 100644
--- a/src/sim/system.hh
+++ b/src/sim/system.hh
@@ -45,6 +45,7 @@
#include "mem/port.hh"
#include "params/System.hh"
#include "sim/sim_object.hh"
+
#if FULL_SYSTEM
#include "kern/system_events.hh"
#include "mem/vport.hh"
@@ -59,10 +60,7 @@ class PhysicalMemory;
class Platform;
#endif
class GDBListener;
-namespace TheISA
-{
- class RemoteGDB;
-}
+class BaseRemoteGDB;
class System : public SimObject
{
@@ -187,7 +185,7 @@ class System : public SimObject
#endif
public:
- std::vector<TheISA::RemoteGDB *> remoteGDB;
+ std::vector<BaseRemoteGDB *> remoteGDB;
std::vector<GDBListener *> gdbListen;
bool breakpoint();