diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/x86/isa/insts/data_transfer/stack_operations.py | 6 | ||||
| -rw-r--r-- | src/arch/x86/isa/insts/logical.py | 8 |
2 files changed, 0 insertions, 14 deletions
diff --git a/src/arch/x86/isa/insts/data_transfer/stack_operations.py b/src/arch/x86/isa/insts/data_transfer/stack_operations.py index 50b690354..ad95fd468 100644 --- a/src/arch/x86/isa/insts/data_transfer/stack_operations.py +++ b/src/arch/x86/isa/insts/data_transfer/stack_operations.py @@ -73,16 +73,10 @@ def macroop PUSH_R { }; ''' #let {{ -# class POP(Inst): -# "GenFault ${new UnimpInstFault}" -# class POPA(Inst): -# "GenFault ${new UnimpInstFault}" # class POPA(Inst): # "GenFault ${new UnimpInstFault}" # class POPAD(Inst): # "GenFault ${new UnimpInstFault}" -# class PUSH(Inst): -# "GenFault ${new UnimpInstFault}" # class PUSHA(Inst): # "GenFault ${new UnimpInstFault}" # class PUSHAD(Inst): diff --git a/src/arch/x86/isa/insts/logical.py b/src/arch/x86/isa/insts/logical.py index 824c75053..0b7c41208 100644 --- a/src/arch/x86/isa/insts/logical.py +++ b/src/arch/x86/isa/insts/logical.py @@ -94,18 +94,10 @@ def macroop AND_M_I ''' #let {{ #microcodeString = ''' -# def macroop AND -# { -# And reg reg regm -# }; # def macroop OR # { # Or reg reg regm # }; -# def macroop XOR -# { -# Xor reg reg regm -# }; # def macroop NOT # { # Xor reg reg "0xFFFFFFFFFFFFFFFFULL" |