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-rw-r--r--src/arch/arm/isa/operands.isa1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa
index d80c0c712..84bd81ca0 100644
--- a/src/arch/arm/isa/operands.isa
+++ b/src/arch/arm/isa/operands.isa
@@ -114,6 +114,7 @@ def operands {{
#Register fields for microops
'Ra' : ('IntReg', 'uw', 'ura', 'IsInteger', 11, maybePCRead, maybePCWrite),
+ 'Fa' : ('FloatReg', 'sf', 'ura', 'IsFloating', 11),
'Rb' : ('IntReg', 'uw', 'urb', 'IsInteger', 12, maybePCRead, maybePCWrite),
#General Purpose Floating Point Reg Operands