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-rw-r--r--src/arch/arm/isa/insts/neon64_mem.isa3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/arch/arm/isa/insts/neon64_mem.isa b/src/arch/arm/isa/insts/neon64_mem.isa
index 4d3241226..4511ad105 100644
--- a/src/arch/arm/isa/insts/neon64_mem.isa
+++ b/src/arch/arm/isa/insts/neon64_mem.isa
@@ -336,7 +336,8 @@ let {{
eCode = '''
//input data from scratch area
VReg input[4] = { {0, 0}, {0, 0}, {0, 0}, {0, 0} };
- VReg output[2]; //output data to arch. SIMD regs
+ //output data to arch. SIMD regs
+ VReg output[2] = { {0, 0}, {0, 0} };
'''
eCode += getInputCodeOp1L