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-rw-r--r--src/arch/alpha/isa/main.isa3
-rw-r--r--src/arch/mips/isa/includes.isa3
-rw-r--r--src/cpu/checker/cpu.cc4
-rw-r--r--src/cpu/checker/cpu_impl.hh2
-rw-r--r--src/cpu/memtest/memtest.cc10
-rw-r--r--src/cpu/o3/fetch.hh2
-rw-r--r--src/cpu/o3/lsq_unit.hh2
-rw-r--r--src/cpu/simple/atomic.cc3
-rw-r--r--src/cpu/simple/base.cc2
-rw-r--r--src/cpu/simple/timing.cc3
-rw-r--r--src/dev/alpha_console.cc2
-rw-r--r--src/dev/ide_ctrl.cc1
-rw-r--r--src/dev/io_device.hh4
-rw-r--r--src/dev/isa_fake.cc1
-rw-r--r--src/dev/isa_fake.hh3
-rw-r--r--src/dev/ns_gige.cc1
-rw-r--r--src/dev/pciconfigall.cc1
-rw-r--r--src/dev/pcidev.cc1
-rw-r--r--src/dev/pcidev.hh1
-rw-r--r--src/dev/sinic.cc1
-rw-r--r--src/dev/tsunami_cchip.cc8
-rw-r--r--src/dev/tsunami_io.cc2
-rw-r--r--src/dev/tsunami_pchip.cc1
-rw-r--r--src/dev/uart8250.cc2
-rw-r--r--src/mem/cache/base_cache.cc5
-rw-r--r--src/mem/packet.cc3
-rw-r--r--src/mem/packet.hh85
-rw-r--r--src/mem/packet_access.hh62
-rw-r--r--src/mem/physical.cc8
-rw-r--r--src/mem/port.cc1
30 files changed, 172 insertions, 55 deletions
diff --git a/src/arch/alpha/isa/main.isa b/src/arch/alpha/isa/main.isa
index 1270bf8d8..0eb611a60 100644
--- a/src/arch/alpha/isa/main.isa
+++ b/src/arch/alpha/isa/main.isa
@@ -73,8 +73,9 @@ output exec {{
#include "config/ss_compatible_fp.hh"
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
+#include "mem/packet.hh"
+#include "mem/packet_access.hh"
#include "sim/sim_exit.hh"
-#include "mem/packet_impl.hh"
using namespace AlphaISA;
}};
diff --git a/src/arch/mips/isa/includes.isa b/src/arch/mips/isa/includes.isa
index f58c8adaa..44926d772 100644
--- a/src/arch/mips/isa/includes.isa
+++ b/src/arch/mips/isa/includes.isa
@@ -74,8 +74,9 @@ output exec {{
#endif
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
+#include "mem/packet.hh"
+#include "mem/packet_access.hh"
#include "sim/sim_exit.hh"
-#include "mem/packet_impl.hh"
using namespace MipsISA;
}};
diff --git a/src/cpu/checker/cpu.cc b/src/cpu/checker/cpu.cc
index f6d56eef6..c2c81bf9b 100644
--- a/src/cpu/checker/cpu.cc
+++ b/src/cpu/checker/cpu.cc
@@ -34,10 +34,8 @@
#include "cpu/base.hh"
#include "cpu/checker/cpu.hh"
#include "cpu/simple_thread.hh"
-#include "cpu/thread_context.hh"
#include "cpu/static_inst.hh"
-#include "mem/packet_impl.hh"
-#include "sim/byteswap.hh"
+#include "cpu/thread_context.hh"
#if FULL_SYSTEM
#include "arch/vtophys.hh"
diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh
index 8aec79754..7f1efc036 100644
--- a/src/cpu/checker/cpu_impl.hh
+++ b/src/cpu/checker/cpu_impl.hh
@@ -37,8 +37,6 @@
#include "cpu/simple_thread.hh"
#include "cpu/thread_context.hh"
#include "cpu/static_inst.hh"
-#include "mem/packet_impl.hh"
-#include "sim/byteswap.hh"
#include "sim/sim_object.hh"
#include "sim/stats.hh"
diff --git a/src/cpu/memtest/memtest.cc b/src/cpu/memtest/memtest.cc
index cb643e5d9..23f2eacbc 100644
--- a/src/cpu/memtest/memtest.cc
+++ b/src/cpu/memtest/memtest.cc
@@ -38,17 +38,17 @@
#include "base/misc.hh"
#include "base/statistics.hh"
-//#include "cpu/simple_thread.hh"
#include "cpu/memtest/memtest.hh"
+//#include "cpu/simple_thread.hh"
//#include "mem/cache/base_cache.hh"
+#include "mem/mem_object.hh"
+#include "mem/port.hh"
+#include "mem/packet.hh"
//#include "mem/physical.hh"
+#include "mem/request.hh"
#include "sim/builder.hh"
#include "sim/sim_events.hh"
#include "sim/stats.hh"
-#include "mem/packet.hh"
-#include "mem/request.hh"
-#include "mem/port.hh"
-#include "mem/mem_object.hh"
using namespace std;
diff --git a/src/cpu/o3/fetch.hh b/src/cpu/o3/fetch.hh
index 280bf0e71..5555bff85 100644
--- a/src/cpu/o3/fetch.hh
+++ b/src/cpu/o3/fetch.hh
@@ -36,7 +36,7 @@
#include "base/statistics.hh"
#include "base/timebuf.hh"
#include "cpu/pc_event.hh"
-#include "mem/packet_impl.hh"
+#include "mem/packet.hh"
#include "mem/port.hh"
#include "sim/eventq.hh"
diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh
index 11a02e7c7..0aac466b5 100644
--- a/src/cpu/o3/lsq_unit.hh
+++ b/src/cpu/o3/lsq_unit.hh
@@ -40,7 +40,7 @@
#include "config/full_system.hh"
#include "base/hashmap.hh"
#include "cpu/inst_seq.hh"
-#include "mem/packet_impl.hh"
+#include "mem/packet.hh"
#include "mem/port.hh"
/**
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index acda254c3..fcda974e3 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -32,7 +32,8 @@
#include "arch/utility.hh"
#include "cpu/exetrace.hh"
#include "cpu/simple/atomic.hh"
-#include "mem/packet_impl.hh"
+#include "mem/packet.hh"
+#include "mem/packet_access.hh"
#include "sim/builder.hh"
#include "sim/system.hh"
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 522fe79aa..a79d3c542 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -47,7 +47,7 @@
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
#include "kern/kernel_stats.hh"
-#include "mem/packet_impl.hh"
+#include "mem/packet.hh"
#include "sim/builder.hh"
#include "sim/byteswap.hh"
#include "sim/debug.hh"
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 0cc10ae94..3ddc938c3 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -32,7 +32,8 @@
#include "arch/utility.hh"
#include "cpu/exetrace.hh"
#include "cpu/simple/timing.hh"
-#include "mem/packet_impl.hh"
+#include "mem/packet.hh"
+#include "mem/packet_access.hh"
#include "sim/builder.hh"
#include "sim/system.hh"
diff --git a/src/dev/alpha_console.cc b/src/dev/alpha_console.cc
index 181bbf934..299389d00 100644
--- a/src/dev/alpha_console.cc
+++ b/src/dev/alpha_console.cc
@@ -48,6 +48,8 @@
#include "dev/platform.hh"
#include "dev/simconsole.hh"
#include "dev/simple_disk.hh"
+#include "mem/packet.hh"
+#include "mem/packet_access.hh"
#include "mem/physical.hh"
#include "sim/builder.hh"
#include "sim/sim_object.hh"
diff --git a/src/dev/ide_ctrl.cc b/src/dev/ide_ctrl.cc
index 8007fda5e..b3b7f5927 100644
--- a/src/dev/ide_ctrl.cc
+++ b/src/dev/ide_ctrl.cc
@@ -43,6 +43,7 @@
#include "dev/pcireg.h"
#include "dev/platform.hh"
#include "mem/packet.hh"
+#include "mem/packet_access.hh"
#include "sim/builder.hh"
#include "sim/sim_object.hh"
#include "sim/byteswap.hh"
diff --git a/src/dev/io_device.hh b/src/dev/io_device.hh
index 24e822a40..654e38a71 100644
--- a/src/dev/io_device.hh
+++ b/src/dev/io_device.hh
@@ -33,9 +33,9 @@
#define __DEV_IO_DEVICE_HH__
#include "mem/mem_object.hh"
-#include "mem/packet_impl.hh"
-#include "sim/sim_object.hh"
+#include "mem/packet.hh"
#include "mem/tport.hh"
+#include "sim/sim_object.hh"
class Event;
class Platform;
diff --git a/src/dev/isa_fake.cc b/src/dev/isa_fake.cc
index 9622f015c..82f823e6e 100644
--- a/src/dev/isa_fake.cc
+++ b/src/dev/isa_fake.cc
@@ -40,6 +40,7 @@
#include "base/trace.hh"
#include "dev/isa_fake.hh"
#include "mem/packet.hh"
+#include "mem/packet_access.hh"
#include "sim/builder.hh"
#include "sim/system.hh"
diff --git a/src/dev/isa_fake.hh b/src/dev/isa_fake.hh
index 5166882f8..32b9045ca 100644
--- a/src/dev/isa_fake.hh
+++ b/src/dev/isa_fake.hh
@@ -36,9 +36,10 @@
#ifndef __ISA_FAKE_HH__
#define __ISA_FAKE_HH__
-#include "dev/tsunami.hh"
#include "base/range.hh"
#include "dev/io_device.hh"
+#include "dev/tsunami.hh"
+#include "mem/packet.hh"
/**
* IsaFake is a device that returns -1 on all reads and
diff --git a/src/dev/ns_gige.cc b/src/dev/ns_gige.cc
index 704afcf7d..77dbf3501 100644
--- a/src/dev/ns_gige.cc
+++ b/src/dev/ns_gige.cc
@@ -43,6 +43,7 @@
#include "dev/ns_gige.hh"
#include "dev/pciconfigall.hh"
#include "mem/packet.hh"
+#include "mem/packet_access.hh"
#include "sim/builder.hh"
#include "sim/debug.hh"
#include "sim/host.hh"
diff --git a/src/dev/pciconfigall.cc b/src/dev/pciconfigall.cc
index 68013eab8..d5c5310a2 100644
--- a/src/dev/pciconfigall.cc
+++ b/src/dev/pciconfigall.cc
@@ -38,6 +38,7 @@
#include "dev/pcireg.h"
#include "dev/platform.hh"
#include "mem/packet.hh"
+#include "mem/packet_access.hh"
#include "sim/builder.hh"
#include "sim/system.hh"
diff --git a/src/dev/pcidev.cc b/src/dev/pcidev.cc
index b16ddb31a..3d2553573 100644
--- a/src/dev/pcidev.cc
+++ b/src/dev/pcidev.cc
@@ -47,6 +47,7 @@
#include "dev/pcidev.hh"
#include "dev/tsunamireg.h"
#include "mem/packet.hh"
+#include "mem/packet_access.hh"
#include "sim/builder.hh"
#include "sim/byteswap.hh"
#include "sim/param.hh"
diff --git a/src/dev/pcidev.hh b/src/dev/pcidev.hh
index 22dd6296e..36ae4f493 100644
--- a/src/dev/pcidev.hh
+++ b/src/dev/pcidev.hh
@@ -40,6 +40,7 @@
#include "dev/io_device.hh"
#include "dev/pcireg.h"
#include "dev/platform.hh"
+#include "sim/byteswap.hh"
#define BAR_IO_MASK 0x3
#define BAR_MEM_MASK 0xF
diff --git a/src/dev/sinic.cc b/src/dev/sinic.cc
index 61fb3aa24..0823e30c7 100644
--- a/src/dev/sinic.cc
+++ b/src/dev/sinic.cc
@@ -38,6 +38,7 @@
#include "dev/etherlink.hh"
#include "dev/sinic.hh"
#include "mem/packet.hh"
+#include "mem/packet_access.hh"
#include "sim/builder.hh"
#include "sim/debug.hh"
#include "sim/eventq.hh"
diff --git a/src/dev/tsunami_cchip.cc b/src/dev/tsunami_cchip.cc
index 3feb7439f..10f4f58e7 100644
--- a/src/dev/tsunami_cchip.cc
+++ b/src/dev/tsunami_cchip.cc
@@ -39,12 +39,14 @@
#include "arch/alpha/ev5.hh"
#include "base/trace.hh"
+#include "cpu/intr_control.hh"
+#include "cpu/thread_context.hh"
+#include "dev/tsunami.hh"
#include "dev/tsunami_cchip.hh"
#include "dev/tsunamireg.h"
-#include "dev/tsunami.hh"
+#include "mem/packet.hh"
+#include "mem/packet_access.hh"
#include "mem/port.hh"
-#include "cpu/thread_context.hh"
-#include "cpu/intr_control.hh"
#include "sim/builder.hh"
#include "sim/system.hh"
diff --git a/src/dev/tsunami_io.cc b/src/dev/tsunami_io.cc
index e3da10eb5..f8753edb9 100644
--- a/src/dev/tsunami_io.cc
+++ b/src/dev/tsunami_io.cc
@@ -47,6 +47,8 @@
#include "dev/tsunami.hh"
#include "dev/tsunami_io.hh"
#include "dev/tsunamireg.h"
+#include "mem/packet.hh"
+#include "mem/packet_access.hh"
#include "mem/port.hh"
#include "sim/builder.hh"
#include "sim/system.hh"
diff --git a/src/dev/tsunami_pchip.cc b/src/dev/tsunami_pchip.cc
index 8a542b9b0..a24b65436 100644
--- a/src/dev/tsunami_pchip.cc
+++ b/src/dev/tsunami_pchip.cc
@@ -42,6 +42,7 @@
#include "dev/tsunamireg.h"
#include "dev/tsunami.hh"
#include "mem/packet.hh"
+#include "mem/packet_access.hh"
#include "sim/builder.hh"
#include "sim/system.hh"
diff --git a/src/dev/uart8250.cc b/src/dev/uart8250.cc
index b92527b5a..660bd71ec 100644
--- a/src/dev/uart8250.cc
+++ b/src/dev/uart8250.cc
@@ -42,6 +42,8 @@
#include "dev/simconsole.hh"
#include "dev/uart8250.hh"
#include "dev/platform.hh"
+#include "mem/packet.hh"
+#include "mem/packet_access.hh"
#include "sim/builder.hh"
using namespace std;
diff --git a/src/mem/cache/base_cache.cc b/src/mem/cache/base_cache.cc
index e0301a757..7a8776522 100644
--- a/src/mem/cache/base_cache.cc
+++ b/src/mem/cache/base_cache.cc
@@ -33,11 +33,10 @@
* Definition of BaseCache functions.
*/
+#include "cpu/base.hh"
+#include "cpu/smt.hh"
#include "mem/cache/base_cache.hh"
#include "mem/cache/miss/mshr.hh"
-#include "mem/packet_impl.hh"
-#include "cpu/smt.hh"
-#include "cpu/base.hh"
using namespace std;
diff --git a/src/mem/packet.cc b/src/mem/packet.cc
index a16e590e3..8e502f2be 100644
--- a/src/mem/packet.cc
+++ b/src/mem/packet.cc
@@ -36,9 +36,10 @@
*/
#include <iostream>
+
#include "base/misc.hh"
-#include "mem/packet.hh"
#include "base/trace.hh"
+#include "mem/packet.hh"
static const std::string ReadReqString("ReadReq");
static const std::string WriteReqString("WriteReq");
diff --git a/src/mem/packet.hh b/src/mem/packet.hh
index f6197885e..29b421862 100644
--- a/src/mem/packet.hh
+++ b/src/mem/packet.hh
@@ -38,11 +38,12 @@
#ifndef __MEM_PACKET_HH__
#define __MEM_PACKET_HH__
+#include <cassert>
+#include <list>
+
#include "mem/request.hh"
#include "sim/host.hh"
#include "sim/root.hh"
-#include <list>
-#include <cassert>
struct Packet;
typedef Packet* PacketPtr;
@@ -342,10 +343,12 @@ class Packet
srcValid = false;
}
- /** Take a request packet and modify it in place to be suitable
- * for returning as a response to that request.
+ /**
+ * Take a request packet and modify it in place to be suitable for
+ * returning as a response to that request.
*/
- void makeAtomicResponse() {
+ void makeAtomicResponse()
+ {
assert(needsResponse());
assert(isRequest());
int icmd = (int)cmd;
@@ -358,43 +361,83 @@ class Packet
cmd = (Command)icmd;
}
- /** Take a request packet that has been returned as NACKED and modify it so
- * that it can be sent out again. Only packets that need a response can be
- * NACKED, so verify that that is true. */
- void reinitNacked() {
+ /**
+ * Take a request packet that has been returned as NACKED and
+ * modify it so that it can be sent out again. Only packets that
+ * need a response can be NACKED, so verify that that is true.
+ */
+ void
+ reinitNacked()
+ {
assert(needsResponse() && result == Nacked);
dest = Broadcast;
result = Unknown;
}
- /** Set the data pointer to the following value that should not be freed. */
+ /**
+ * Set the data pointer to the following value that should not be
+ * freed.
+ */
template <typename T>
- void dataStatic(T *p);
+ void
+ dataStatic(T *p)
+ {
+ if(dynamicData)
+ dynamicData = false;
+ data = (PacketDataPtr)p;
+ staticData = true;
+ }
- /** Set the data pointer to a value that should have delete [] called on it.
+ /**
+ * Set the data pointer to a value that should have delete []
+ * called on it.
*/
template <typename T>
- void dataDynamicArray(T *p);
+ void
+ dataDynamicArray(T *p)
+ {
+ assert(!staticData && !dynamicData);
+ data = (PacketDataPtr)p;
+ dynamicData = true;
+ arrayData = true;
+ }
- /** set the data pointer to a value that should have delete called on it. */
+ /**
+ * set the data pointer to a value that should have delete called
+ * on it.
+ */
template <typename T>
- void dataDynamic(T *p);
+ void
+ dataDynamic(T *p)
+ {
+ assert(!staticData && !dynamicData);
+ data = (PacketDataPtr)p;
+ dynamicData = true;
+ arrayData = false;
+ }
- /** return the value of what is pointed to in the packet. */
+ /** get a pointer to the data ptr. */
template <typename T>
- T get();
+ T*
+ getPtr()
+ {
+ assert(staticData || dynamicData);
+ return (T*)data;
+ }
- /** get a pointer to the data ptr. */
+ /** return the value of what is pointed to in the packet. */
template <typename T>
- T* getPtr();
+ T get();
/** set the value in the data pointer to v. */
template <typename T>
void set(T v);
- /** delete the data pointed to in the data pointer. Ok to call to matter how
- * data was allocted. */
+ /**
+ * delete the data pointed to in the data pointer. Ok to call to
+ * matter how data was allocted.
+ */
void deleteData();
/** If there isn't data in the packet, allocate some. */
diff --git a/src/mem/packet_access.hh b/src/mem/packet_access.hh
new file mode 100644
index 000000000..aac0c3ae5
--- /dev/null
+++ b/src/mem/packet_access.hh
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2006 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ * Nathan Binkert
+ */
+
+#include "arch/isa_traits.hh"
+#include "mem/packet.hh"
+#include "sim/byteswap.hh"
+
+#ifndef __MEM_PACKET_ACCESS_HH__
+#define __MEM_PACKET_ACCESS_HH__
+// The memory system needs to have an endianness. This is the easiest
+// way to deal with it for now. At some point, we will have to remove
+// these functions and make the users do their own byte swapping since
+// the memory system does not in fact have an endianness.
+
+/** return the value of what is pointed to in the packet. */
+template <typename T>
+inline T
+Packet::get()
+{
+ assert(staticData || dynamicData);
+ assert(sizeof(T) <= size);
+ return TheISA::gtoh(*(T*)data);
+}
+
+/** set the value in the data pointer to v. */
+template <typename T>
+inline void
+Packet::set(T v)
+{
+ assert(sizeof(T) <= size);
+ *(T*)data = TheISA::htog(v);
+}
+
+#endif //__MEM_PACKET_ACCESS_HH__
diff --git a/src/mem/physical.cc b/src/mem/physical.cc
index f5a0ade15..43a7c5cb4 100644
--- a/src/mem/physical.cc
+++ b/src/mem/physical.cc
@@ -39,21 +39,17 @@
#include <iostream>
#include <string>
-
+#include "arch/isa_traits.hh"
#include "base/misc.hh"
#include "config/full_system.hh"
-#include "mem/packet_impl.hh"
#include "mem/physical.hh"
-#include "sim/host.hh"
#include "sim/builder.hh"
#include "sim/eventq.hh"
-#include "arch/isa_traits.hh"
-
+#include "sim/host.hh"
using namespace std;
using namespace TheISA;
-
PhysicalMemory::PhysicalMemory(Params *p)
: MemObject(p->name), pmemAddr(NULL), port(NULL), lat(p->latency), _params(p)
{
diff --git a/src/mem/port.cc b/src/mem/port.cc
index 17924b759..bbc98c160 100644
--- a/src/mem/port.cc
+++ b/src/mem/port.cc
@@ -35,7 +35,6 @@
#include "base/chunk_generator.hh"
#include "base/trace.hh"
-#include "mem/packet_impl.hh"
#include "mem/port.hh"
void