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-rw-r--r--src/python/m5/SimObject.py17
-rw-r--r--src/python/m5/params.py4
-rw-r--r--src/python/m5/simulate.py9
3 files changed, 15 insertions, 15 deletions
diff --git a/src/python/m5/SimObject.py b/src/python/m5/SimObject.py
index 14978dd75..d3e7d7975 100644
--- a/src/python/m5/SimObject.py
+++ b/src/python/m5/SimObject.py
@@ -721,37 +721,38 @@ class SimObject(object):
for child in child_names:
self._children[child].unproxy_all()
- def print_ini(self):
- print '[' + self.path() + ']' # .ini section header
+ def print_ini(self, ini_file):
+ print >>ini_file, '[' + self.path() + ']' # .ini section header
instanceDict[self.path()] = self
if hasattr(self, 'type'):
- print 'type=%s' % self.type
+ print >>ini_file, 'type=%s' % self.type
child_names = self._children.keys()
child_names.sort()
if len(child_names):
- print 'children=%s' % ' '.join(child_names)
+ print >>ini_file, 'children=%s' % ' '.join(child_names)
param_names = self._params.keys()
param_names.sort()
for param in param_names:
value = self._values.get(param)
if value != None:
- print '%s=%s' % (param, self._values[param].ini_str())
+ print >>ini_file, '%s=%s' % (param,
+ self._values[param].ini_str())
port_names = self._ports.keys()
port_names.sort()
for port_name in port_names:
port = self._port_refs.get(port_name, None)
if port != None:
- print '%s=%s' % (port_name, port.ini_str())
+ print >>ini_file, '%s=%s' % (port_name, port.ini_str())
- print # blank line between objects
+ print >>ini_file # blank line between objects
for child in child_names:
- self._children[child].print_ini()
+ self._children[child].print_ini(ini_file)
def getCCParams(self):
if self._ccParams:
diff --git a/src/python/m5/params.py b/src/python/m5/params.py
index 52a927ba3..27bb24bd7 100644
--- a/src/python/m5/params.py
+++ b/src/python/m5/params.py
@@ -176,9 +176,9 @@ class VectorParamValue(list):
return [v.unproxy(base) for v in self]
class SimObjVector(VectorParamValue):
- def print_ini(self):
+ def print_ini(self, ini_file):
for v in self:
- v.print_ini()
+ v.print_ini(ini_file)
class VectorParamDesc(ParamDesc):
# Convert assigned value to appropriate type. If the RHS is not a
diff --git a/src/python/m5/simulate.py b/src/python/m5/simulate.py
index 6c70d8fbd..3d91da368 100644
--- a/src/python/m5/simulate.py
+++ b/src/python/m5/simulate.py
@@ -45,11 +45,10 @@ def instantiate(root):
ticks.fixGlobalFrequency()
root.unproxy_all()
- # ugly temporary hack to get output to config.ini
- sys.stdout = file(os.path.join(options.outdir, 'config.ini'), 'w')
- root.print_ini()
- sys.stdout.close() # close config.ini
- sys.stdout = sys.__stdout__ # restore to original
+
+ ini_file = file(os.path.join(options.outdir, 'config.ini'), 'w')
+ root.print_ini(ini_file)
+ ini_file.close() # close config.ini
# Initialize the global statistics
internal.stats.initSimStats()